Commit Graph

24 Commitit

Tekijä SHA1 Viesti Päivämäärä
Jonathan Kim c9cc529a4f add new queue bit test on clear event
enable thunk query api to report if queue is newly created
test new queue bit test on clear events.
also fixup cleanup to disable debug trap.

Change-Id: I3ebe2d85da66f28b8c82f0e68461ee7d32ec0b0d
Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Reviewed-by: Philip Cox <Philip.Cox@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 1ff5cb33b2]
2019-08-23 11:25:32 -04:00
Jonathan Kim 8fc23418ea libhsakmt: update dbg enable trap and add query debug events
Add data out for enable trap to return poll fd to user space.
Add query debug events interface.

Change-Id: Ia4afde1cf167e6aa61d502380a8b329ee89d5f44
Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>


[ROCm/ROCR-Runtime commit: 836dfd0752]
2019-08-07 10:04:33 -04:00
Oak Zeng dc22f0c67e Remove NodeId parameter from hsaKmtAllocQueueGWS
The NodeId parameter is redundant and can be retrieved
from QueueId parameter.

Change-Id: I12853849b868b304bd27633fa7653ba644d69026
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>


[ROCm/ROCR-Runtime commit: f40f166e20]
2019-08-06 20:20:30 -04:00
Oak Zeng ef47fe0e1e Thunk API to allocate queue GWS
Change-Id: I6c5b109e2567cb71aed9245923cfcbeee6295ab2
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>


[ROCm/ROCR-Runtime commit: 65d554f5e4]
2019-06-10 21:07:45 -05:00
Philip Cox 596a2491c7 libhsakmt: Update wave suspend/resume API
This is updating to the new suspend and resume API for the
KFD and the thunk.  We now support passing in a list of queues
to suspend, and not just all of the queues for the process.

The kfdtest testcase was also updated so it still compiles.

Change-Id: I71d1b178476bd9df0c311bdedaa6a891528cebcf
Signed-off-by: Philip Cox <Philip.Cox@amd.com>


[ROCm/ROCR-Runtime commit: c2c1385e29]
2019-05-03 10:32:47 -04:00
Sean Keely 80ffb43205 Add hsaKmtRegisterMemoryWithFlags.
API follows hsaKmtRegisterMemory but allows passing HsaMemFlags.

Change-Id: I66a230a87c8b085f27c769bdf2cb4d0d96a5d6dd


[ROCm/ROCR-Runtime commit: c7f1277013]
2019-03-28 17:17:40 -04:00
Philip Cox fa45791c1a Initial gfx9 debugger node suspend/resume
Change-Id: I2a5dac3d02265c11f5b6985ab457e2d1caa0a033
Signed-off-by: Philip Cox <Philip.Cox@amd.com>


[ROCm/ROCR-Runtime commit: 37858f2311]
2019-01-11 09:00:54 -05:00
Gang Ba 9147adc1d5 Add code to support packet capture and replay in the Thunk
This feature only support dgpu for now.

Change-Id: Ic766ec06892c955dd605ecc335a776335edc0df2
Signed-off-by: Gang Ba <gaba@amd.com>


[ROCm/ROCR-Runtime commit: c54c1dbdcb]
2018-10-31 16:53:46 -04:00
Philip Cox f85a629639 Add GFX debug trap control code
Add initial support for the kfd debugger trap support
for GFX9 chips.

   - Adding support for Enable/Disable trap support
   - Setting debug trap support data
   - Setting wave launch trap override
   - Setting wave launch mode

Change-Id: If39f2395c4b6cf56249cf76f1c44cfcbdcef891c
Signed-off-by: Philip Cox <Philip.Cox@amd.com>


[ROCm/ROCR-Runtime commit: db92d5af23]
2018-08-22 14:40:15 -04:00
Amber Lin dd782c86c0 Implement hsaKmtGetQueueInfo interface
For items in HsaQueueInfo, control stack information comes from KFD, CU
mask information is maintained in Thunk, and others (queue detail error
and queue type extended) are ignored (value = 0) at this point.

Change-Id: Ib21370b0f52b2bb4ebe6a9b4b6ec6139cccb25ca
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 683fc96325]
2017-06-01 14:15:54 -04:00
Harish Kasiviswanathan b7f6ed08ee Add API entrypoints for Cross Memory Attach
Implement two new API for cross memory read and write operation.
 - hsaKmtProcessVMRead
 - hsaKmtProcessVMWrite

Add new ioclts necessary for the above APIs.

Change-Id: I0c153e3b4e1f32b7a8b102ad5c774d9ae9bfc2fa
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: e79521b556]
2017-02-17 16:59:51 -05:00
Harish Kasiviswanathan 5d2336f1ca Add API entrypoints for IPC functionality
Implement three new APIs for IPC buffer sharing:
	-hsaKmtShareMemory()
	-hsaKmtRegisterSharedHandle()
	-hsaKmtRegisterSharedHandleToNodes()

Add new ioclts necessary for the above APIs.

Change-Id: Ia2b4d0dc91ec64bff959395d11c0536467404792
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 559e31d6ff]
2016-11-28 16:19:22 -05:00
Amber Lin 8a1cef5fbb Add pointer attributes API
Add two pointer attributes APIs:
hsaKmtQueryPointerInfo - allow the user to query the memory information
    using a pointer. This pointer can point to any address inside the
    range known to HSA.
hsaKmtSetMemoryUserData - allow the user to attach data to a pointer to
    add memory tracking information. This pointer must match the start
    address of a memory allocation or registration.
TODO: This patch implements support on dGPU. Needs to add APU.

Change-Id: I4711809274248434901f0794f50ebfa13a7371a8


[ROCm/ROCR-Runtime commit: 51e4d27c37]
2016-09-07 17:24:46 -04:00
Yong Zhao cba37c251c Implement hsaKmtGetTileConfig in thunk
Change-Id: Iba8d8efa46e3c268a03442d3db568e1b19230e94


[ROCm/ROCR-Runtime commit: 8351b3d2e8]
2016-09-06 16:24:29 -04:00
Felix Kuehling 029002d073 Add support for hsaKmtRegisterGraphicsHandleToNodes
Change-Id: I6fd7154dea78188480d5cb89ac237bad572356c4


[ROCm/ROCR-Runtime commit: 61ec3df2f9]
2016-03-10 11:16:02 -05:00
Felix Kuehling 99325bf7c4 Add support for register/deregister memory for dGPU
Allocate SVM address space for the registered memory and use new
userptr support in KFD to create a system memory BO associated with
the given user pointer. Map this BO at the SVM address for CPU
access.

MapMemoryToGPU can be used with the registered user pointer and
will return the SVM address as alternate GPUVA.

Change-Id: I4886e193c51fb6870a567878870c36bf8b5c3748


[ROCm/ROCR-Runtime commit: 85f9efb1a0]
2016-02-16 18:12:05 -05:00
Ben Goz 18aab410cc Adding support to hsaKmtMapMemoryToGPUNodes
Change-Id: Iab6222402a43c3cd31b0efc5a316a6482986258e
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: 7070f7ec5e]
2016-02-09 17:34:29 +02:00
Felix Kuehling c89d3124d9 Implement hsaKmtRegisterMemoryToNodes
Fix hsaKmtRegisterMemory to be a no-op for now and move the multi-GPU
implementation to hsaKmtRegisterMemoryToNodes. Make GPU memory mappings
of host memory visible to all GPUs by default. Device memory is still
visible to the allocating GPU only by default (but can be overridden
with hsaKmtRegisterMemoryToNodes for experimenting with P2P).

Change-Id: I73408afbe3b10c8dad2ab3a780f58413249692e6


[ROCm/ROCR-Runtime commit: 063ad3ad9e]
2016-01-08 16:00:23 -05:00
Flora Cui 0f0e28cbdb Add interface to set CU mask
Signed-off-by: Flora Cui <flora.cui@amd.com>
Acked-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: fc4e07daa3]
2015-07-23 15:44:01 +08:00
Oded Gabbay b6c7551747 Revert "Add execution property in register memory for gfx801."
This reverts commit abf7770d46.


[ROCm/ROCR-Runtime commit: 4c4df38035]
2015-04-28 17:50:00 +03:00
Xihan Zhang abf7770d46 Add execution property in register memory for gfx801.
Signed-off-by: Xihan Zhang <xihan.zhang@amd.com>


[ROCm/ROCR-Runtime commit: 5ed05c99b3]
2015-04-10 22:26:44 +08:00
Oded Gabbay 6afb37dbca Match as much as possible hsakmt.h and hsakmttypes.h to p4
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>


[ROCm/ROCR-Runtime commit: f0a7fcccc9]
2015-02-03 11:13:13 +02:00
Oded Gabbay cb29071e77 Add new definitions of HSA functions and types
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>


[ROCm/ROCR-Runtime commit: d995344ae7]
2014-10-20 08:48:28 +03:00
Oded Gabbay 5b7d807b42 Add definitions of HSA functions and types
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>


[ROCm/ROCR-Runtime commit: 813af2b89a]
2014-07-29 10:55:52 +03:00