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3713 Commits

Author SHA1 Message Date
Chauncey Hui ebeb05289c SWDEV-2 - Change OpenCL version number from 3186 to 3187 
[ROCm/clr commit: e11ef5ecd4]
 2020-08-24 16:33:52 -04:00
Jason Tang bbe0df36bf SWDEV-239502 - Create copyImageBuffer_ without flags 
Change-Id: Ifcb5992d58f3419635d2aca2d51f2dacd7cd466d


[ROCm/clr commit: c33470ab4d]
 2020-08-14 17:25:58 -04:00
agodavar 8b61666254 SWDEV-245503 - Improve hipModuleLoad performance 
Change-Id: Icbcd37d9b4e6d79f296cc8693edf25689b19fa11


[ROCm/clr commit: e914f281ff]
 2020-08-14 05:24:52 -04:00
Vlad Sytchenko 7395ae1366 Remove unnecessary SVM commit 
Change-Id: I5cb887ead166401a59b0c980f29fd615b19745be


[ROCm/clr commit: 6780a9ac66]
 2020-08-13 13:21:03 -04:00
Jason Tang 8199283c0e SWDEV-239502 - Fix image test regression 
Change-Id: Iea35fb0f1964d09a35131b4a20ac8f6f82850a8e


[ROCm/clr commit: db5a2d4c2d]
 2020-08-13 11:58:20 -04:00
German Andryeyev a5ca15a599 Enable prefetch async functionality 
Fix a typo with the name define, when compilation wasn't enabled.
Force CPU prefetch if system was forced in runtime

Change-Id: Id4b578f9fa44a45426fdb5d8ecb1da803aa42313


[ROCm/clr commit: 6e69258b69]
 2020-08-13 11:09:10 -04:00
Jason Tang 3315ef8a45 SWDEV-247463 - Fix regression: ocltst segfaults 
Change-Id: Iadb55ba45d6c8ade0757fd970ac4c6cde1805de3


[ROCm/clr commit: 152a2dfb5a]
 2020-08-09 11:28:09 -04:00
Jason Tang d4cbe1a339 Fix HSAIL build 
Change-Id: I34209b3ae0ce0eefc30e464fd7f081a0b62449b0


[ROCm/clr commit: 7bb671fa55]
 2020-08-07 17:18:38 -04:00
German Andryeyev 4a2b2e77f6 Sync the current queue for P2P staging 
P2P staging uses device queues for transfer, hence the current
queue must be in sync

Change-Id: I8372a60590eed9dde62cb4c67ef4df5df82a8e8d


[ROCm/clr commit: 0dc47d55d2]
 2020-08-07 14:36:50 -04:00
Jason Tang c926997eb8 Use ARCTURUS 
Change-Id: Ib25d150c9314180178d5cf00835a06e47c02c2a9


[ROCm/clr commit: 6f8eaff4df]
 2020-08-07 11:14:24 -04:00
Jason Tang 04054e9b60 SWDEV-246565 - Remove passing -msram-ecc to Comgr 
Change-Id: I1604a0014186a5779561da3ec3eefec65aff5c37


[ROCm/clr commit: f8f6bc16a1]
 2020-08-06 12:48:53 -04:00
Jatin Chaudhary ba5507f650 Adding device memory channel information 
Change-Id: I47dfa3daff97b1e3f42484dde5a4aa64244ac544


[ROCm/clr commit: 2f3df8e691]
 2020-08-06 06:54:35 -04:00
Saleel Kudchadker 820a456980 Add Queue profling param and toggle for HIP 
Use signal timestamps if NDRange command takes forceProfile flag.

Change-Id: Ib7f187d781fd78a7346818afb3344a9378f4c104


[ROCm/clr commit: ec73340348]
 2020-08-06 03:09:53 -04:00
Anusha Godavarthy Surya de10e7e1e6 SWDEV-244600 - HIP BLIT code object needs to have reserved symbol name 
Change-Id: I8401fea5eab71c0f7414eec0666066d9553a6622


[ROCm/clr commit: 093f7fa3ca]
 2020-08-06 01:14:06 -04:00
Jason Tang e1b0edf35c SWDEV-246687 - Do not use std::vector reference as class member cuMask_ 
The current implementation creates default reference in the stack and assigns it to class member cuMasks_, so whenever the content of the stack changes, cuMask_ would change.

Change-Id: Iefab63c335d504b83c4ae90bd34ae76c6afb8f3c


[ROCm/clr commit: 8ef5da00c7]
 2020-08-05 16:57:36 -04:00
Chauncey Hui 7f5db8ed81 SWDEV-2 - Change OpenCL version number from 3185 to 3186 
[ROCm/clr commit: 6373242a03]
 2020-08-05 03:00:05 -04:00
German Andryeyev e34eaf17b9 Process cache coherency before mem dependency tracker 
Optimizaiton to remove extra syncs uncovered a bug with the cache
coherency layer, there runtime could lose the track of mem address
if coherency layer performed a sync.

Change-Id: I25647cfa4a4be9cdbd8577ff076a740bbdac79c8


[ROCm/clr commit: 91a25df04f]
 2020-08-04 16:33:18 -04:00
Vlad Sytchenko 9d72bf6523 Fix typo 
Change-Id: I8b659508f567afa126aeb7749b536b443935e3df


[ROCm/clr commit: 9d0b0c32a9]
 2020-08-04 11:15:21 -04:00
Chauncey Hui bebc5b6e80 SWDEV-2 - Change OpenCL version number from 3184 to 3185 
[ROCm/clr commit: 8f5698cb17]
 2020-07-31 03:00:03 -04:00
Vlad Sytchenko c98a71dc9e Only enable HIP for Vega20 on non-ROCm platforms 
SWDEV-245906

All asics will still be supported for developer builds.

Change-Id: I0eac2246162d133fe63449c200d996fe05bd51bd


[ROCm/clr commit: 24c1c48db7]
 2020-07-27 13:09:58 -04:00
Chauncey Hui f8c00384fd SWDEV-2 - Change OpenCL version number from 3183 to 3184 
[ROCm/clr commit: e793de2ffa]
 2020-07-25 03:00:03 -04:00
Payam aef0dc8422 Fix 32bit warning 
Change-Id: I4c630d78f7bf23dda85ec8480bb2790864495667


[ROCm/clr commit: 2067de1521]
 2020-07-24 13:14:37 -04:00
Chauncey Hui 83ed76f2ac SWDEV-2 - Change OpenCL version number from 3182 to 3183 
[ROCm/clr commit: f779f655fd]
 2020-07-23 03:00:04 -04:00
Tao Sang 44eb207f8d Apply constexpr on global constant varaibles 
When HIP_ENABLE_DEFERRED_LOADING=0, many global variables will be
referenced but they are not initialized in that early time. The patch
will use constexpr to initialze global constant varables in compile
time.

Change-Id: I9d538b7abc6a0ce700ec3332b97fc144db5fc1ef


[ROCm/clr commit: fdef6f722f]
 2020-07-22 22:14:13 -04:00
Jason Tang 11f8a869f1 SWDEV-232197 - Fix PAL build 
Change-Id: Iad306077cadfd8de1491ac0a188eee4802d8ce1f


[ROCm/clr commit: 2800fc2fa3]
 2020-07-22 17:10:03 -04:00
Jason Tang fdf3ebad76 SWDEV-232197 - Use TargetID for action_info_set_isa_name() 
Change-Id: I6661a2bbc2e55586c1b5029694d67cb54a4f23a6


[ROCm/clr commit: 65f4230494]
 2020-07-22 13:47:17 -04:00
Freddy Paul 872b0bedee Align to new hsa cmake target usage. 
HIP or any ROCm component above HIP may not be calling
hsa-runtime directly. OpenCl and HIP are the two components
calling ROCclr and to bring in the transitive dependency of
thunk,ROCR,amd_comgr it is better to have the dependency
chain set correctly in the ROCclr cmake target. With this
change OpenCl or HIP should not be setting ROCR dependency
directly.

This helps to link OpenCl(libamdocl.so) link statically with
comgr,hsa,thunk.

Change-Id: I0d538b7abc6a0ce700ec3332b97fc144db5fc5ff


[ROCm/clr commit: 6b8ae3dd77]
 2020-07-22 11:21:09 -04:00
Chauncey Hui 705fc47138 SWDEV-2 - Change OpenCL version number from 3181 to 3182 
[ROCm/clr commit: c09b1ee0cc]
 2020-07-22 03:00:05 -04:00
Alex Xie c6649a8c7f SWDEV-241977 [ROCm QA] Random Soft hang observed while running TF and Caffe2 benchmarks 
Change-Id: I42016c11db15411b86e7b8130d6ba557bc22dbb7


[ROCm/clr commit: ce038f3163]
 2020-07-22 02:03:48 -04:00
Jatin Chaudhary 7dae2632b9 Adding AnyOrder Flag 
Change-Id: I6baaef42b98adfbc8cf2605e175ec007e008045f


[ROCm/clr commit: 48690f29e9]
 2020-07-22 00:25:04 -04:00
Tao Sang 10f1bfc765 Add numa lib detection in cmake 
If numa lib is in building system, define ROCCLR_NUMA_SUPPORT to
support numa; otherwise, don't support numa.

Change-Id: I3848d7fdec5a3813ff1edad9b71ff04372dc0b9a


[ROCm/clr commit: 214827defa]
 2020-07-21 14:58:56 -04:00
Matt Arsenault 8ff20547f1 Use alignas to effectively define padding and fix 32-bit build 
Change-Id: Ib318d2fe847625567de93c9268cf000ec35a921f


[ROCm/clr commit: a9ffa384e8]
 2020-07-21 10:53:47 -04:00
Rahul Garg 3398448fb0 Handle size 0 symbols 
Change-Id: I1629c5027ec5f9af48c8e9e0696829b844423096


[ROCm/clr commit: 60473ae542]
 2020-07-21 10:10:36 -04:00
Jason Tang cd1ee42c36 SWDEV-232197 - Use HSA_ISA_INFO_NAME as the TargetID 
TargetID will be passed to LC compiler.

Change-Id: I0385634922c11d53b57ebd596047698c47bda72b


[ROCm/clr commit: 8b7e0f3cfe]
 2020-07-21 09:24:03 -04:00
Chauncey Hui e959dffa0b SWDEV-2 - Change OpenCL version number from 3180 to 3181 
[ROCm/clr commit: 9812cf8079]
 2020-07-21 03:00:04 -04:00
Matt Arsenault 4668c291e2 Fix -Wunused-private-field 
Change-Id: Ib60e8dc2625c0c5e10fa109e452af0bc6174e763


[ROCm/clr commit: 51f4aa305b]
 2020-07-20 11:23:18 -04:00
Chauncey Hui 1437d6fa97 SWDEV-2 - Change OpenCL version number from 3179 to 3180 
[ROCm/clr commit: 92cdd43a28]
 2020-07-18 03:00:03 -04:00
Payam 81d7cfcda3 cleanup warnings 
Change-Id: I3715fe6aa540c5a40fe2aa324c9fbeab1e67f717


[ROCm/clr commit: 2dc41007d7]
 2020-07-17 14:25:52 -04:00
Chauncey Hui 6fde3df1c5 SWDEV-2 - Change OpenCL version number from 3178 to 3179 
[ROCm/clr commit: 0c84ce5608]
 2020-07-17 03:00:03 -04:00
Matt Arsenault 5e2eed5ea1 Fix windows build 
Change-Id: I0c5fff636ec43d5c1daf888457f77ef214a29566


[ROCm/clr commit: 2f3e9afab7]
 2020-07-16 17:08:22 -04:00
Payam a1d94580ca clean up warnings 
Change-Id: I5421ab90234278920e6080599bb40ffcb3eaa04d


[ROCm/clr commit: 94e623181b]
 2020-07-16 09:36:26 -04:00
Chauncey Hui 63c5c84c0f SWDEV-2 - Change OpenCL version number from 3177 to 3178 
[ROCm/clr commit: dfd78a65f2]
 2020-07-16 03:00:03 -04:00
Matt Arsenault b39da2994f Correct total size of Semaphore to be 64 
Change-Id: I20db76eab06fc8a0b3869348c537e7303dfa6466


[ROCm/clr commit: dabda131bd]
 2020-07-15 16:51:19 -04:00
Matt Arsenault 3cae0b7649 Fix -Wmissing-braces 
Change-Id: I2394b6923c789f36e72242f4b196844cc0ee90ba


[ROCm/clr commit: 5577eabcea]
 2020-07-15 16:51:03 -04:00
Jason Tang e69ff5e142 SWDEV-244000 - Print freeMem_ for memory accounting 
Change-Id: I5bbce213236a109e9aa69766d2d4d370b58d0d08


[ROCm/clr commit: 5e0bb5bd39]
 2020-07-15 13:44:05 -04:00
German Andryeyev c9f95a13ee Disable sysmem alloc for SVM memory 
Device backend is responsible for memory allocation, including
possible HMM support.

Change-Id: I0e4e5ae3b9551790f4f85f0791cca63196cc896e


[ROCm/clr commit: af1c4a5794]
 2020-07-15 12:04:23 -04:00
Payam 4e766cc4b2 Reset each thread's affinity to all avilable cpus 
reset happens at the start of the thread  SWDEV-240685

Change-Id: I6c35473bab67d02f76a8013ab9394f293c6f2b07


[ROCm/clr commit: 55b5f5f06c]
 2020-07-15 09:41:50 -04:00
Payam f9c2313c79 Adding new macro for HIP using ClPrint 
calculates duration of a call

Change-Id: I7cca673f6dabc618ec543e3bd6c5102aa76edc3a


[ROCm/clr commit: 47088fea0d]
 2020-07-15 09:40:59 -04:00
Chauncey Hui 6bc177cc6a SWDEV-2 - Change OpenCL version number from 3176 to 3177 
[ROCm/clr commit: 1e349179e2]
 2020-07-15 03:00:04 -04:00
Christophe Paquot f14d79c587 Make append and setLastQueuedCommand atomic 
Two threads can enqueue to the same HostQueue (HostQueue::enqueue)
and result in last queued command being the first one reachine queue_.enqueue

NOTE: Temporarly make setLastQueuedCommand empty function to pass the build

Change-Id: Id09c3a28d184986f52b2ec86a2f6a18c40df1f0b


[ROCm/clr commit: 3d15a1e291]
 2020-07-14 18:22:45 -04:00