Enabling all negative test cases for amd as they are functional now
SWDEV-238517 for enhancing hip unit tests
Change-Id: I0bdbf8c192ef94588403c8f027c0399dd5480a00
[ROCm/clr commit: 5ba7259ffc]
APIs: hipDeviceGetAttribute(), hipGetDeviceProperties(),
hipDeviceGetByPCIBusId() and hipDeviceGetPCIBusId()
1. New negative test cases for each API.
2. Additional attributes for testing with hipDeviceGetAttribute()
SWDEV-238517 Enhancing hip unit tests
Change-Id: I3c24462426ffaf3a9317b7de9cd33f7c65791a4b
[ROCm/clr commit: 328f8ab0ff]
Added following functional and negative scenario tests for
HIP_VISIBLE_DEVICES (HVD), ROCR_VISIBLE_DEVICES (RVD)
CUDA_VISIBLE_DEVICES(CVD)
1. Verifying HVD and RVD - invalid number in sequence
2. Verifying HVD and RVD - dupliates in the beginning of sequence
3. Verifying HVD and RVD - all the duplicates
4. Device count with RVD(max devices and HVD(min devices)
5. Device count with RVD(min devices and HVD(max devices)
6. Device count - RVD(set), HVD(unset), CVD(set)
SWDEV-238517 for enhancing hip unit tests
Change-Id: Ia83e9e9068cbf8cc61cff17311cda1d1f8a38fee
[ROCm/clr commit: b2a93adb82]
- Added test for V3 Static Lds code object with sramecc/xnack settings.
- Added test for V4 Static Lds code object.
SWDEV-238517 for enhancing hip unit tests
Change-Id: Ibc4f7e12033dec231d6834ccdd983e3b9e001d60
[ROCm/clr commit: 656a2cb556]
Added following functional and negative scenario tests
for hipMemcpy2D and hipMemcpy2DAsync APIs
1. Verifying D2H and H2D functionality
2. Verifying D2D on same device and peer device
3. Verifying using pinned host memory on same and peer GPU
4. Negative test scenarios
5. Verifying hipMemcpy2DAsync API along with kernel launch
SWDEV-238517 Enhancing hip unit tests
Change-Id: I8f447bc7f6bf13cb895f1809f5a2b501baa8782c
[ROCm/clr commit: 7e6d748f26]
1.Rename include/hip/hcc_detail/ as include/hip/amd_detail/
2.Rename include/hip/nvcc_detail/ as include/hip/nvidia_detail/
3.Create __HIP_PLATFORM_AMD__ to replace __HIP_PLATFORM_HCC__
4.Create __HIP_PLATFORM_NVIDIA__ to replace __HIP_PLATFORM_NVCC__
After hcc_detail, nvcc_detail, __HIP_PLATFORM_HCC__ and __HIP_PLATFORM_NVCC__
have been removed from upstream, they will be removed from hip runtime.
Change-Id: I1ae457effd739d6c25bca203c1724b026be21fce
[ROCm/clr commit: 8a2b0b7424]
Negative, Functional and Regression scenarios for
- hipMemset3D
- hipMemset3DAsync
SWDEV-238517 for enhancing hip unit tests
Change-Id: Idc5604f728ca1a96ec13876e006120f7a3d69acf
[ROCm/clr commit: 2624a5654c]
Make hipMemset asynchronous with respect to the host unless
destination pointer refers to pinned host memory.
Change-Id: I5ba230e0cc622aa076dc94692a4c43a57dd2df7b
[ROCm/clr commit: 9ba5902be4]
Make sure the comments in the code match the actual behavior.
HDP read has internal HDP read cache and doesn't use L2.
Change-Id: I667a4643b0e0d6529008f5e1a0a3269456c55b4e
[ROCm/clr commit: d524514f6a]
Modified hipPointerGetAttributes to support hipHostRegister ptrs and mapped device ptrs from hipHostRegister
Change-Id: I2f4cf12e09578768308f644123d6d4bdccbd77a8
[ROCm/clr commit: 40733e1fff]
On behalf of Tony Tye. The bootleg passes CQE Baffin/Ellesmere test.
Change-Id: I4c21d21b3aaba360682ef15b8a4dda239f8af276
[ROCm/clr commit: d4316141b7]
This test is causing a PSDB timeout. Not all systems can support
device enqueue on rocm.
Change-Id: I55a209877288e6cc96b2426bf960fa9a431ac7c3
[ROCm/clr commit: ed812e304a]
CPU read updates L2 with the latest values and requires
invalidation after, because SDMA doesn't use L2 and data can become
out of sync.
Change-Id: I98d1c91ca78a103fa5409e638f97485d62d5b11e
[ROCm/clr commit: 18a821acde]
1.Fix unexpected repeated hip runtime lib building
2.Seperate test cmake from top cmake.
Change-Id: I1ae457effd639d6c25bca293c1724b026be21ecd
[ROCm/clr commit: a7aa84f73a]
The older compiler does not promote integral
arguments to double, instead it uses float.
This patch tries to support the old compiler
headers, and also the newer one.
Change-Id: I01e0b96a82ecddc6230cb5baf2573a318b25445b
[ROCm/clr commit: d432615faa]
Remove hip-hcc codes from hip code base
Simplify hip CMakeLists.txt to exclude hip-hcc
Simplify cmake cmd for hip-rocclr building
Some minor fixes
Change-Id: I1ae357ecfd638d6c25bca293c1724b026be21ecd
[ROCm/clr commit: 1cba7ec965]
HIP supports compiling kernels from LLVM IR into executable.
The device LLVM IR needs to be compiled into a fat binary
object. This device object is embedded into a host object using
llvm-mc directives. Then, any host linker may link the host and
device objects together into an executable. A README was added.
Change-Id: I8ebb6ae86b7ab4290f7cba2eea5584d73a7c453e
[ROCm/clr commit: f7b5fea916]
HIP supports compiling kernels from assembly into exec.
The device assembly needs to be compiled into a fat binary
object. This device object is embedded into a host object using
llvm-mc directives. Then, any host linker may link the host and
device objects together into an executable. A README is added.
Change-Id: I59d3a8b5363073810ffc3aa0d57f21b0df272369
[ROCm/clr commit: b8b90f344c]
Rupam Chetia
DURGESH KROTTAPALLI
Jatin Chaudhary
Payam
Sarbojit Sarkar
agodavar
Tao Sang
sumanthtg
Satyanvesh Dittakavi
jujiang
Rahul Garg
German Andryeyev
Evgeny
Vladislav Sytchenko
Jason Tang
Tony
Aaron En Ye Shi
Alex Xie