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Gráfico de cometimentos

94 Cometimentos

Autor(a) SHA1 Mensagem Data
Wenkai Du fe8923ebba Add gfx908 Rome 4 NICs model 
[ROCm/rccl commit: 6dfdfef98f]
 2021-02-06 00:19:47 +00:00
Gilbert Lee b954d85935 [TransferBench] Fixing some merge issues 
[ROCm/rccl commit: f372c53d52]
 2021-02-05 16:46:20 +00:00
Wenkai Du ae5779702a Merge remote-tracking branch 'origin/develop' into 2.8.3 
[ROCm/rccl commit: ab1e7a0318]
 2021-02-04 20:02:34 -05:00
Gilbert Lee 1dfb88f554 [topo_expl] Updating for 2.8.3 
[ROCm/rccl commit: 2f541508c5]
 2021-02-04 19:08:42 +00:00
Gilbert Lee f2d07cb9a6 [ib-test] Update for 2.8.3] 
[ROCm/rccl commit: 9aac1ed38f]
 2021-02-04 19:05:03 +00:00
Gilbert Lee 1643d05c75 [TransferBench] Updating for 2.8.3 
[ROCm/rccl commit: 9ce203dd0a]
 2021-02-04 18:58:25 +00:00
gilbertlee-amd 60c74f63fa [TransferBench] Restore some previous fixes - memory leak, PCIe address (#314) 
[ROCm/rccl commit: 62e0447e9a]
 2021-02-01 09:48:09 -07:00
gilbertlee-amd c981e76efe Clique kernel support (#295) (#15) 
* Adding experimental clique-based kernels (opt-in only)

Co-authored-by: Stanley Tsang <stanley.tsang@amd.com>
Co-authored-by: Gilbert Lee <gilbert.lee@amd.com>
Co-authored-by: Wenkai Du <43822138+wenkaidu@users.noreply.github.com>

Co-authored-by: Stanley Tsang <stanley.tsang@amd.com>
Co-authored-by: Wenkai Du <43822138+wenkaidu@users.noreply.github.com>

[ROCm/rccl commit: 3e62ceddc5]
 2021-01-28 09:45:01 -07:00
Wenkai Du d4382de267 Improve collective trace 
[ROCm/rccl commit: 2ddbe6646b]
 2021-01-14 19:28:01 -05:00
Wenkai Du 2c49121171 Port alltoall[v] 
[ROCm/rccl commit: f4d5d3d620]
 2021-01-14 19:28:01 -05:00
Wenkai Du adff98765c Merge remote-tracking branch 'nccl/master' into no-target-id 
[ROCm/rccl commit: d469947641]
 2021-01-14 19:27:53 -05:00
Wenkai Du 4ea285c527 Fix Rome PCIe 2 node topology generation (#310) 
[ROCm/rccl commit: 373a108516]
 2020-12-15 17:16:17 -08:00
gilbertlee-amd c570f09681 [TransferBench] Fixing bug with fine-grained memory allocation (#311) 
* Fixing bug with fine-grained memory

[ROCm/rccl commit: 41c35dad48]
 2020-12-15 17:37:31 -07:00
gilbertlee-amd 5155abb250 [TransferBench] Adding ability to perform CPU-executed copies, various upgrades (#309) 
* Adding CPU based execution, fixing typos, adding Fine-grained mem
* Exposing sampling factor when generating range of data sizes
* Refactoring how Links are launched, now once per thread
* Documentation updates

[ROCm/rccl commit: ae0c4092c7]
 2020-12-11 10:21:14 -07:00
gilbertlee-amd 9b48f92d72 [TransferBench] Support multiple of 4 byte sizes, changing default GPU timing mechanism (#307) 
* Changing default timing mechanism, adjusting CPU bandwidth calc, adding flag to use combined timing
* Adding support for smaller transfers (byte size must be multiple of 4 instead of 128)

[ROCm/rccl commit: b80ae551b1]
 2020-12-04 14:57:13 -07:00
Wenkai Du b68ff1ebba Add Rome model and improve search (#305) 
[ROCm/rccl commit: 975b14dffa]
 2020-11-17 14:55:06 -08:00
gilbertlee-amd a7ef699687 Clique kernel support (#295) 
* Adding experimental clique-based kernels (opt-in only)

Co-authored-by: Stanley Tsang <stanley.tsang@amd.com>
Co-authored-by: Gilbert Lee <gilbert.lee@amd.com>
Co-authored-by: Wenkai Du <43822138+wenkaidu@users.noreply.github.com>

[ROCm/rccl commit: 41bcfb8878]
 2020-11-10 15:44:10 -07:00
Wenkai Du c0c64d970a Add more Rome models (#292) 
[ROCm/rccl commit: dfa3c41ede]
 2020-10-30 21:26:04 -07:00
gilbertlee-amd 2931959e6e Adding output to CSV, removing OpenMP, decreasing default numBytes to 64MB, adding aggregate stats (#290) 
[ROCm/rccl commit: bfab1d3592]
 2020-10-27 09:00:33 -06:00
gilbertlee-amd a062c80298 [TransferBench] Displaying PCIe Bus ID (#288) 
* Adding PCIe BusID per GPU in topology display

[ROCm/rccl commit: 61e1a71d14]
 2020-10-21 16:13:36 -06:00
gilbertlee-amd 0282595de5 TransferBench Typo. Pinned host memory uses C not P (#286) 
[ROCm/rccl commit: 769418c5c7]
 2020-10-21 12:05:38 -06:00
gilbertlee-amd 94437eef28 Revert "Initial support for clique-based kernels (#276)" (#280) 
This reverts commit d68a532bc6.

[ROCm/rccl commit: 84a2541e01]
 2020-10-15 11:30:18 -07:00
Wenkai Du 8b120c0508 Update Rome single node models (#277) 
[ROCm/rccl commit: 33babcb5e2]
 2020-10-13 13:33:09 -07:00
gilbertlee-amd d68a532bc6 Initial support for clique-based kernels (#276) 
* Initial support for clique-based kernels

[ROCm/rccl commit: 2b8184808d]
 2020-10-13 11:22:04 -06:00
Wenkai Du 41260bb948 Rework Rome detection and add multiple network ports models (#274) 
* Rework Rome detection and add multiple network ports models

* Remove unused opCount in p2p transport

[ROCm/rccl commit: ae008fd2db]
 2020-10-07 13:37:36 -07:00
Wenkai Du dbde26e681 Add Alltoallv RCCL kernel implementation (#269) 
* Add alltoallv API and implementation

* Extend Rome P2P channel limit to multinode and alltoall kernels

* topo_expl: fix compilation and sync up with main

* gtest: use RCCL alltoallv API

* Code review changes

[ROCm/rccl commit: b871ea3c0c]
 2020-09-30 16:25:36 -07:00
gilbertlee-amd 5ca117d7cd New TransferBench features (#273) 
* Upgrading TransferBench to support pinned CPU memory, expanding functionality, cleaning up env vars

[ROCm/rccl commit: ee262819a7]
 2020-09-25 12:20:48 -06:00
lijietang f6b08ca547 Add rccl bw test script in tools (#255) 
[ROCm/rccl commit: bbe233f8c1]
 2020-09-11 16:59:03 +08:00
Wenkai Du 03bb6bcb54 Increase minimal channels for gfx908 (#259) 
[ROCm/rccl commit: c5cbece6d0]
 2020-08-26 11:40:11 -07:00
Wenkai Du 5f49a0e088 Add NPS4 support on some models (#256) 
* Add NPS4 support on some models

* Add XML models

[ROCm/rccl commit: 391bbf3f1e]
 2020-08-19 11:03:20 -07:00
gilbertlee-amd 3e4ddd065b Upgrading various TransferBench features (#257) 
[ROCm/rccl commit: ec9af40fcd]
 2020-08-19 09:47:19 -06:00
Wenkai Du 3d5fb8142e Add another Rome model (#249) 
* Add another Rome model

* Add gfx908 4P3L models and support

* Revert "Use cached value for detecting GDR support only once"

This reverts commit 0108a1219d.

* Skip using ibverb for GPU direct RDMA detection

* Fine tune one Rome model

[ROCm/rccl commit: a51e4071e3]
 2020-08-17 10:51:02 -07:00
gilbertlee-amd 1a9b00a7fd Fixes to make TransferBench compile for hipclang (#254) 
[ROCm/rccl commit: c985478133]
 2020-08-13 12:25:28 -06:00
Wenkai Du f242a2f0b0 Collect gcnArch and hipDeviceArch_t in XML (#252) 
[ROCm/rccl commit: 7e3d8a31cc]
 2020-08-12 15:48:38 -07:00
Wenkai Du 26c540abb8 Merge pull request #247 from wenkaidu/rome 
Additional Rome models support

[ROCm/rccl commit: 3c46cb8ad4]
 2020-08-07 10:56:12 -07:00
MurtadhaAldallal f1373612b0 Update rccl_prim_test.cpp (#246) 
Adding doublelocalcopy operation and freeing buffer memory at end.
DoubleLocalCopy Patch Added

[ROCm/rccl commit: 390c63cf0d]
 2020-08-07 08:20:14 -07:00
Wenkai Du c9815aaa36 Add more Rome 4P2H models 
[ROCm/rccl commit: 09ef75656a]
 2020-08-06 18:20:02 +00:00
Wenkai Du 487f93b83f Topology tuning for 4P2H on Rome (#242) 
* Topology tuning for 4P2H on Rome

* Use ncclTopoIdToIndex

[ROCm/rccl commit: e7a10aa0e4]
 2020-07-27 11:53:57 -07:00
Wenkai Du 49c667ac8a ib-test: support multiple channels (#241) 
[ROCm/rccl commit: 8d5fb920b6]
 2020-07-27 11:03:12 -07:00
Sourav Chakraborty e55a3f20ba add 4 node 8P6L 1 NIC 2nd Hive model 
[ROCm/rccl commit: 2475daafee]
 2020-07-22 16:27:15 +00:00
Sourav Chakraborty b3306d1c13 simplify model definitions in topo expl 
[ROCm/rccl commit: db55afb014]
 2020-07-22 16:05:53 +00:00
Wenkai Du f604fc774e Add 8P6L multi-node models (#239) 
[ROCm/rccl commit: d5f90e19b5]
 2020-07-21 14:10:36 -07:00
Wenkai Du 3e2c9054cd Change default channels duplication for chordal ring (#233) 
[ROCm/rccl commit: ab787c767e]
 2020-07-14 15:16:50 -07:00
Stanley Tsang 3dd54437fe Adding appropriate references in rccl-prim-test (#227) 
Adding appropriate references to rccl-prim-test.

[ROCm/rccl commit: 9bd4c14603]
 2020-07-06 10:15:03 -06:00
Wenkai Du 2f99c7bbad topo_expl: each rank needs to have its own memory for graphs (#225) 
[ROCm/rccl commit: d3548cc474]
 2020-07-01 15:11:02 -07:00
Wenkai Du e8da2a0da6 topo_expl: fix broken build (#224) 
[ROCm/rccl commit: a6be82f5ab]
 2020-06-30 11:11:23 -07:00
Wenkai Du e7d664200f Use posix_memalign for network buffer allocation on host memory (#221) 
* Use posix_memalign for network buffer allocation on host memory

* ib-test: add ability to specify run iterations

* ib-test: define iterations as multiple of default cycles

* Add checking to posix_memalign return value

[ROCm/rccl commit: 0eb19a563a]
 2020-06-22 13:06:25 -07:00
Wenkai Du 2dc0cfcbf5 ib-test: support host memory allocation through posix_memalign (#220) 
* ib-test: support host memory allocation through posix_memalign

* ib-test: add missing CUDACHECK to hip calls

[ROCm/rccl commit: dc739c4e70]
 2020-06-17 16:16:54 -07:00
Wenkai Du 9ca3176346 Add IB/RDMA unit test 
[ROCm/rccl commit: cfa97eccd3]
 2020-06-16 18:29:17 +00:00
Wenkai Du 15cd2aff3c Add gather, scatter and alltoall collectives 
Introducing 3 new APIs:
ncclResult_t  ncclGather(const void* sendbuff, void* recvbuff, size_t sendcount,
    ncclDataType_t datatype, int root, ncclComm_t comm, hipStream_t stream);
ncclResult_t  ncclScatter(const void* sendbuff, void* recvbuff,
    size_t recvcount, ncclDataType_t datatype, int root, ncclComm_t comm,
    hipStream_t stream);
ncclResult_t  ncclAllToAll(const void* sendbuff, void* recvbuff, size_t count,
    ncclDataType_t datatype, ncclComm_t comm, hipStream_t stream);

Only out of place operation is supported.
Preprocessor symbol RCCL_GATHER_SCATTER=1 indicates API availibility.
By default the APIs launche RCCL kernel implementation, which can be disabled by
RCCL_ALLTOALL_KERNEL_DISABLE=1. Then the APIs use wrapper around ncclSend and ncclRecv.


[ROCm/rccl commit: e80e29573c]
 2020-06-09 17:44:08 -07:00