AI/rocm-systems
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
12,937 Commits 3 Branches 0 Tags
f8d4cca28b3cb2bb0cc8b86b77fa2734bc8abe4d
Commit Graph

12219 Commits

Author SHA1 Message Date
Jason Tang 0e19d02735 SWDEV-255321 - Support target names from Target ID feature 
Change-Id: I45e5314dff2ee65dd402c38744279bf67501304d


[ROCm/clr commit: bad12583b0]
 2020-10-06 09:00:54 -04:00
kjayapra-amd 78fd06679b SWDEV-254363 - Checks to make sure kernel is launched on the same device as it was launched. 
Change-Id: I2f273a70b1a5fc0e9fc9c6144eabd32466ff4e59


[ROCm/clr commit: 40322a9f1c]
 2020-10-06 08:38:09 -04:00
German Andryeyev 2c21a44b40 Add option to skip AQL barrier 
The change reuses HSA signals for dispatches as a wait signal.
Skipping the barrier requires to  disable L2 cache for sysmem
allocations and extra tracking for HDP access with the large bar.
ROC_BARRIER_SYNC=0 activates the new logic. Barrier sync is
still used by default.
ROC_ACTIVE_WAIT=1 enables unconditional active wait in ROCr.
The change also consolidated ROCr wait logic under single function.

Change-Id: I6bd1be30aa88258da1b1f9de319ef5a45852afd8


[ROCm/clr commit: d9397590de]
 2020-10-06 08:37:12 -04:00
Rahul Garg 8e268b9170 Remove libhip_hcc references 
These were added in commit b2e0df3845.

Change-Id: I5815c90bb83ac74730f6bce114eb353f54b86670


[ROCm/clr commit: 2a5d39cd3b]
 2020-10-06 04:29:35 -04:00
Sarbojit Sarkar 70d71642d2 [perf]hipMalloc performance optimization 
Change-Id: I6e8a918cc1c4cafad197b09e10755cd180e11ead


[ROCm/clr commit: 4a025e1a87]
 2020-10-06 03:19:41 -04:00
Sarbojit Sarkar ed1828ea72 SWDEV-253548 : clean up gfx-arch macros 
Change-Id: I8deb2ea44f556260bb78d24f68b04b0c730ed4d8


[ROCm/clr commit: 8ab8fac173]
 2020-10-06 03:17:09 -04:00
Chauncey Hui cf248c7b3b SWDEV-2 - Change OpenCL version number from 3208 to 3209 
[ROCm/clr commit: c7f03dae75]
 2020-10-06 03:00:02 -04:00
Sarbojit Sarkar 8587ec2976 SWDEV:253548 : remove gfx-arch macros 
Change-Id: I1ef0b4e080c15a9c6228f48ecd6a65b134d0a72d


[ROCm/clr commit: 3f0e33adb5]
 2020-10-06 01:15:58 -04:00
Yaxun (Sam) Liu f3663d440c Fix warpSize for gfx10 
Change-Id: I8029ebeb91db1efa8e166ad349aaae6364e8069d


[ROCm/clr commit: 71586b02e3]
 2020-10-05 20:45:07 -04:00
Rahul Garg b022db2663 Bump version to 3.10 
Change-Id: I7410996510fa24d2db0a4ecb2a2642e2e95058cf


[ROCm/clr commit: 9f81811fd2]
 2020-10-05 20:26:38 -04:00
Vladislav Sytchenko 7b635ae18c Revert "Revert "Merge branch 'amd-master-next' into amd-npi-next"" 
This reverts commit 0627e8783b.

Reason for revert: <INSERT REASONING HERE>

Change-Id: I92ceb171e31026ed1864704cef2fc1497b883ef9


[ROCm/clr commit: d5aa0f607d]
 2020-10-05 13:20:58 -04:00
Vladislav Sytchenko 0627e8783b Revert "Merge branch 'amd-master-next' into amd-npi-next" 
This reverts commit 6c6299acb2.

Reason for revert: <INSERT REASONING HERE>

Change-Id: I53322718dadde2c98f96140b8e260ec7ee9ef721


[ROCm/clr commit: 9142674ef0]
 2020-10-05 13:02:39 -04:00
German Andryeyev 913d257803 Fix error codes in HMM interfaces 
Change-Id: I16490c575f2840b1116a4135431a611cf812f3a4


[ROCm/clr commit: ef5d9bd562]
 2020-10-05 12:54:16 -04:00
German Andryeyev 7229c259ca Add support for CPU device in advise 
Change-Id: I7250e0183580c14cd3d6050ef85f9ce26e36f4a8


[ROCm/clr commit: df63547906]
 2020-10-05 12:52:46 -04:00
Tao Sang 9e61c14aeb Fix empty cpu agent on raven system 
Change-Id: I30f5e65367613152ce96b80b13e1c9f2a28da807


[ROCm/clr commit: bc7291e85c]
 2020-10-05 10:54:57 -04:00
Vladislav Sytchenko 6c6299acb2 Merge branch 'amd-master-next' into amd-npi-next 
Change-Id: I0587f67e28cec51c2ae753e986d2c7ce21db271e


[ROCm/clr commit: d7c02619d6]
 2020-10-05 09:51:06 -04:00
Jatin Chaudhary 284e6245d6 Use availableRegistersPerCU_ to populate number of registers 
Change-Id: I58f2323bf454f910d22ab31f05aa3024a3d1106f


[ROCm/clr commit: c9d996a0a8]
 2020-10-05 00:33:27 -04:00
Chauncey Hui b382720fc0 SWDEV-2 - Change OpenCL version number from 3207 to 3208 
[ROCm/clr commit: 65b88ba364]
 2020-10-03 03:00:03 -04:00
Vladislav Sytchenko 2acef41e2c [PAL] Add entry for unannounced device 
Change-Id: I323f240068ee1eff6981e69b7a2837f06157e44b


[ROCm/clr commit: f26bb1d76d]
 2020-10-02 13:52:25 -04:00
mshivama d3bcef604a Fix bug reported in SWDEV-251619 
Unit testing of CG threadRank api in multi-grid environment requires
some changes as grid id of particular device is not known apriori.

Change-Id: Ie7941a09337653f3ada5eedfb7c64a93a234498b


[ROCm/clr commit: 9c86cdb89d]
 2020-10-02 13:39:10 -04:00
Pruthvi Madugundu 41e2601b0d Update to the REGEX in hip-config.cmake 
- Matching the output "hipcc --version" for Installed directory
  to get the llvm compiler path, wasnt done properly.
- Adding fallback for HIP_CLANG_ROOT on ROCM_PATH if defined in env
- Changed the mode of get_filename_component to DIRECTORY

Signed-off-by: Pruthvi Madugundu <pruthvi.madugundu@amd.com>
Change-Id: Ia38e234f34cabb5b419906c7094b327083292b0e


[ROCm/clr commit: 5f667bf4e8]
 2020-10-02 13:03:49 -04:00
Srinivasan Subramanian 04c782ad9a hipcc doesn't find libhsakmt without ldconf entries 
Signed-off-by: Srinivasan Subramanian <srinivasan.subramanian@amd.com>
Change-Id: Iea6a43786f05c9e44dcf863f4f96a53f81384dbd


[ROCm/clr commit: 8b889ad26e]
 2020-10-02 12:55:00 -04:00
Vladislav Sytchenko 622d3f286c [PAL] Detect if resizable bar is enabled 
Change-Id: I54b2e878d1cf7235a848a4b243f878538e226702


[ROCm/clr commit: 11bdf0005f]
 2020-10-02 12:25:00 -04:00
Chauncey Hui a893673fd7 SWDEV-2 - Change OpenCL version number from 3206 to 3207 
[ROCm/clr commit: 189ec6f794]
 2020-10-02 03:00:03 -04:00
Aryan Salmanpour e9ed860cc1 enable building cooperative directed tests on NV platform 
Change-Id: I9a658b28010176d4f9401010b9c4b4be7ae86b92


[ROCm/clr commit: c8ac97a1e0]
 2020-10-02 00:59:40 -04:00
Cole Nelson 54b171e65a CMakeLists.txt: Conformant package naming 
Change-Id: I1c70559208606de8cc00909132cba38a2cc2ccd6
Signed-off-by: Cole Nelson <cole.nelson@amd.com>


[ROCm/clr commit: a900c86746]
 2020-10-01 18:25:15 -04:00
Aryan Salmanpour ac20d599eb [dtest] move all the cooperative related tests into one location 
Change-Id: I9b44027d795ebfbf42f78af8e69d26ac8109692a


[ROCm/clr commit: 6b4eb0a97a]
 2020-10-01 16:01:46 -04:00
Aryan Salmanpour 0bc09def97 rename abort in nvcc path 
[background] There is currently a compilation issue when both hip/hip_runtime.h and hip/hip_cooperative_groups.h included
in a file and hipcc used to compile it on NV platform. The issue is that an abort is defined in hip/nvcc_detail/hip_runtime.h
and it is also defined in the CUDA cooperative groups header (/cuda/include/cooperative_groups/details/helpers.h).
this is problematic and leads to a compilation issue in hipcc on NV platform.

Change-Id: I2ab6982ac4103822a1a4a0ced942cd604d6c19c1


[ROCm/clr commit: 35a3304acc]
 2020-10-01 14:28:51 -04:00
Aryan Salmanpour 67227e6f7e fix a bug for calculating the prev_sum of MGSyncInfo struct used in multi-gpu cooperative launch 
SWDEV-251619

Change-Id: I6566bfc9384bb4677562085991a7a01d3cea3935


[ROCm/clr commit: 4817ec4778]
 2020-10-01 14:05:22 -04:00
German Andryeyev 7959329169 Revert "Reduce the default size of the signal pool" 
This reverts commit 6e0c211730.

Reason for revert: a regression

Change-Id: I78180ba011f45af9a4cce110b14f379aa10f7d3a


[ROCm/clr commit: af8426b0e4]
 2020-10-01 09:56:05 -04:00
Chauncey Hui a2efb90822 SWDEV-2 - Change OpenCL version number from 3205 to 3206 
[ROCm/clr commit: d8404bfee9]
 2020-10-01 03:00:04 -04:00
Vladislav Sytchenko 46c26cc6d8 Fix Windows build 
Change-Id: Icdc723843541a5c13503670b5f972b78db0cccbf


[ROCm/clr commit: 1183455755]
 2020-09-30 14:40:07 -04:00
mshivama c0eb26b2e7 Add missing definitions for class static members 
The static members __HIP_Coordinates::x, ::y and ::z must be defined
outside the class. Otherwise, linker throws `undefined reference error`
when these definitions are needed in the HIP application.

Change-Id: Iabc09744b478c22e4b13cf9824877ec9cfdd4f7a


[ROCm/clr commit: 9b6d26f8b2]
 2020-09-30 03:38:24 -04:00
Sarbojit Sarkar fc2cc1471c SWDEV-253247: add ulong and ulonglong version of__shfl* 
Change-Id: I40ab6cfa12175f334e8392b71f567054d8256e2a


[ROCm/clr commit: deeb37412c]
 2020-09-30 01:58:22 -04:00
mshivama 4bd3a9fb18 Layout the cooperative group related headers to target Nvidia 
Change-Id: I530ffc72d6fae1e273b5322d508629221e11ea6f


[ROCm/clr commit: b35f5215b2]
 2020-09-29 21:32:24 -04:00
Sarbojit Sarkar 1d5784202c SWDEV-253654 : Added invalid parameter checks 
Change-Id: I8a2ae1ee6898f111aac1c68663a653cca410daec


[ROCm/clr commit: d4fa2e8c80]
 2020-09-29 13:20:27 -04:00
Julia Jiang 8976ef0471 SWDEV-247518-fix HPC multi gpu test performance drop 
Change-Id: I2f07d9ba183cf88b3845d8d61607a8a0462d015f


[ROCm/clr commit: 3d59e050db]
 2020-09-29 12:04:40 -04:00
Jatin Chaudhary 2a16ef5d04 Adding and populating available registers per cu value 
Change-Id: Ide012038a9d74b20166ce1e69a9f2c0cbdce0d73


[ROCm/clr commit: d0f009a0ee]
 2020-09-28 05:30:23 -04:00
Chauncey Hui fcebc82e75 SWDEV-2 - Change OpenCL version number from 3204 to 3205 
[ROCm/clr commit: b26a283118]
 2020-09-26 03:00:04 -04:00
Sarbojit Sarkar 596fa95c9b SWDEV-252337: Fix for V100 compilation issue 
Change-Id: Ib57ff3ac28f0a581f395f32181974e64eca6d858


[ROCm/clr commit: 7da8264b7c]
 2020-09-25 21:55:22 -04:00
Julia Jiang 3ab02902f4 SWDEV-253250-update instruction for hip sample 
Change-Id: Iebc2887a3687e6c565999f4faf1cd4cf893e24cd


[ROCm/clr commit: f93a2b03ad]
 2020-09-25 13:51:19 -04:00
Aryan Salmanpour 58a6e2f0f2 fix a pagefault when wrong argument (extent) passed in hipMemset3D API 
Change-Id: I779fc14ccd7c942d1ae0a938ebfd3c2e728ff761


[ROCm/clr commit: a680b514b3]
 2020-09-25 10:57:37 -04:00
kjayapra-amd a3212c53b7 SWDEV-241896 - Remove extern support in ROCclr/HIP since compiler added Texture Reference support. 
Change-Id: I2cf27e13a53860fe11e9245c9cbdcb8bd88a7872


[ROCm/clr commit: 4071cf1a16]
 2020-09-25 10:20:16 -04:00
Jason Tang 4c0e5d238d Avoid using sdma engine if there's none 
Change-Id: Id8d373683f3e1667ab461b4c5b8b490377b64cc0


[ROCm/clr commit: 40b432f992]
 2020-09-25 09:48:10 -04:00
Aryan Salmanpour b01d49542c Fix a crash when printf used in a kernel launched on a stream with custom CU mask 
SWDEV-249719 - root cause: queues with custom CU mask are not inserted
into queuePool_ (i.e., queue of reusable HSA queues) of ROC device class
causing a crash when creating hostcall buffers for printf

Change-Id: Ieee7005d9a5a30b3113394ce23ee65927126d0d6


[ROCm/clr commit: 2e199bd492]
 2020-09-25 09:25:19 -04:00
kjayapra-amd c15524b728 SWDEV-241896 - Remove extern support in ROCclr/HIP since compiler added Texture reference support. 
Change-Id: I1b0a7377b803b4e2b94ffef6ffd91e376fdb2b2f


[ROCm/clr commit: 19acb0bfe5]
 2020-09-24 14:28:16 -04:00
Rahul Garg b1851cdc96 Return hipMemoryTypeHost as memory type for hipHostRegistered pointer 
Fixes SWDEV-253741
Change-Id: I42c2c9df00862157314d5767b6f175a0d2f28b47


[ROCm/clr commit: 2f3d60fc4a]
 2020-09-24 12:27:32 -04:00
agodavar dc55fb39c0 SWDEV-249870 - Short-Term solution for Pre-Compiled Headers for Online Compilation 
Change-Id: Iec989787e546ff2eb68c4b146dc540655698b569


[ROCm/clr commit: 3c9bbc335a]
 2020-09-24 12:18:06 -04:00
Lakhan singh Thakur 3ef655ac27 [dtest] Additional tests for hipMallocManaged() api 
5 scenarios were added for hipMallocManaged including negative
test.

SWDEV-238517 for enhancing hip unit tests

Change-Id: Ibba53fb64502d6df798e4e63100dcb8c5f94553f


[ROCm/clr commit: eedf4c68dc]
 2020-09-24 10:05:21 -04:00
Chauncey Hui 1aa5e56135 SWDEV-2 - Change OpenCL version number from 3203 to 3204 
[ROCm/clr commit: 0cef35c402]
 2020-09-24 03:00:02 -04:00