Wykres commitów

57 Commity

Autor SHA1 Wiadomość Data
Sourabh Betigeri 2388f61705 SWDEV-340649 - Removes calls to commitMemory in hmm path
Change-Id: I8d381b4c3f5cf95628487e0d10ae643443c9709d
2023-01-27 13:15:23 -05:00
German 6dad2fc306 SWDEV-377991 - Remove liquidflash support
Remove amdgpu-pro interface for persistent memory,
used in Liquidflash

Change-Id: I7d1720ad0875a62ebb2d7f96cba39601d560a5df
2023-01-23 10:40:57 -05:00
Anusha GodavarthySurya 710749c291 SWDEV-374778 - Select SDMA path when HSA_XNACK is enabled
Change-Id: I052675186238eb24b910a0a558d6b8ede36d1413
2023-01-12 23:34:21 -05:00
kjayapra-amd e56a611b92 SWDEV-371904 - Adding pseudo fine grain flag to hsa memory allocation for device fine grained memory.
Change-Id: I8cada90f0e3880dfbc5bf5a3fac4554e7a0cb08e
2022-12-11 08:15:17 -05:00
Julia Jiang dacd55f3d7 SWDEV-357122 - fix failure in vdi so as to handle unreasonable input size in MallocManagedNegativeTest
Change-Id: I1ed1916b652afc67327b0935c3c60fc2a404df30
2022-10-20 12:19:22 -04:00
haoyuan2 0a43f6bff3 SWDEV-343162 - fix OCL test regression
For OCL, keep original control logic
FOr HIP, keep the fix for SWDEV-338781

Change-Id: I89de8d1e73cd103b3b4f62206eed72d45695dd6e
2022-06-24 13:23:10 -04:00
German Andryeyev 73ec7bada6 SWDEV-341316 - Copy image SRD only if it's valid
Change-Id: I971a21fe99fd07b21cfd3dbe4e7ed33c0ea322f4
2022-06-16 09:18:04 -04:00
haoyuan2 6937fcae3a SWDEV-338781 - fix blender crash issue on Navi1x
remove incorrect control logic which caused seg fault on Navi1x

Change-Id: Ic56e8a73c53062bd86adcf57d0b66e00e21734ec
2022-06-15 10:54:57 -04:00
German Andryeyev 07c1b9a998 SWDEV-336024 - Clear device heap to 0
This reverts commit 04bfd93569.

Reason for revert: Fix regressions

Change-Id: I7d883e1c3cbd27bb64b581ec800243ad7dfe24fd
2022-05-19 09:10:08 -04:00
German Andryeyev 04bfd93569 SWDEV-336024 - Clear device heap to 0
The heap must be cleared once per device, but ROCclr doesn't
create a queue per device in HIP. Hence, the clear operation will
be performed during the first queue creation.

Change-Id: I52ceb06d67d11cde6d019c5ab510059f426a9bfb
2022-05-11 11:03:56 -04:00
German Andryeyev 7b114a2b8b SWDEV-307185 - Create heap for device memory allocator
Pass the allocated heap with the kernel arguments

Change-Id: Icdec09b7f937845c39e21cbca7071dc3ba791af9
2022-03-04 00:44:41 -05:00
German Andryeyev 95d55fdfa8 SWDEV-323702 - Use active queue for transfer
Pass active queue for transfers in the cache coherency layer.
That will allow to use device transfer queue only for
cases when active queue isn't available, because using device
transfer queue from another active queue may cause a deadlock

Change-Id: Ifbe7e0303b77dbf6eeda3939ffbc25a3df7472de
2022-02-18 09:10:53 -05:00
Satyanvesh Dittakavi e20dd61932 SWDEV-306939 - Fix vdi errors/warnings by CppCheck
Change-Id: I56d910f8363787f1050d5d7e8064ed553c5827fd
2022-01-12 00:22:16 -05:00
Sarbojit Sarkar 02dc6f9f9a SWDEV-310181 - Fix for AtoH Memcpy tests failure
Change-Id: Ibf8c8c01257f0516088d50d5c9f82040ed8fa067
2021-11-29 22:55:23 -05:00
pghafari e38a200bf7 SWDEV-297142 - HIP-Vulkan - linux interop buffer
Change-Id: I0278e56bba632024c214beb9e1758587ccba0927
2021-11-17 06:06:58 -05:00
Saleel Kudchadker 3a7008cf07 SWDEV-297448 - Fix typo in debug print
Change-Id: Idc94d5fcd7eabf1e9c0a9617b987c58f507813a7
2021-08-22 23:56:08 -07:00
Saleel Kudchadker 2e26ed1cbb SWDEV-297448 - Add debug log print
Change-Id: Ieba1b2e5d766e3fbe84dfc875dde8268166b3f99
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko f167136918 SWDEV-297808 - Don't update free memory counter when creating views
Current logic when creating a buffer view will end up going into the
allocation block. Even though no memory will be allocated, since
owner()->getSvmPtr() is already allocated, we'll still end up
calling updateFreeMemory().

Checking if we're creating a view, will skip the SVM allocation logic
and let us fall into the actual view creation logic. This won't end up
updating the free memory counter.

Change-Id: I1c260a9ef57895130b272ea1246e06e812b25b37
2021-08-22 23:56:08 -07:00
anusha GodavarthySurya 1884e4ca77 SWDEV-297215 - Set image descriptor as per the HSA specification for hsa_ext_image_descriptor_t
Change-Id: I0af0f09120f15a42349ec4de491df8aee7bfd46d
2021-08-22 23:56:08 -07:00
Jason Tang f165737096 SWDEV-296911 - Enable clgl interop for both MesaGL and OrcaGL
Change-Id: Ie3ad85a8335b1fc751812c09bb0cd30aad38dcae
2021-08-22 23:56:08 -07:00
agunashe d96481fb36 SWDEV-293742 - Update copyright end year VDI repo
Change-Id: I69d2fea4a7a43adf96ccea794270e4af991c5261
2021-08-22 23:56:07 -07:00
kjayapra-amd 1c49d8816c SWDEV-286346 - Implement Arena Memory Object for externally created memory.
Change-Id: I8530602d89edf83ad367c52167e48a1559ee1e18
2021-05-18 10:59:52 -04:00
German Andryeyev 3f7a6b01e3 SWDEV-240804 - Remove AMD_HMM_SUPPORT define
Use dynamic logic for HMM based on it's availability

Change-Id: I63751d94571d5af6eb57bef2cb0e071120bfa103
2021-05-14 17:41:06 -04:00
German Andryeyev 24299e25bd SWDEV-272496 - Fix multiple timing issues
- Don't notify if the batch is empty, because that means
the current command was processed already.
- Disable pinning optimization to avoid a race condition on stall.
- TS marker submition requires extra AQL barrier
to track the status.

Change-Id: I17eff4ad12ac66cfe1bb44048bebb1891805279d
2021-03-01 12:46:57 -05:00
Alex Xie 639d67866c SWDEV-272382 - [OCL][LNX] OCLMemoryInfo[1] subtest of oclruntime is failing
1. Fix the size of the memory when releasing.
2. Make sure we only count the device memory

Change-Id: Ib4dcda79f313c4ee9cc1c7bab53f8076bce5f583
2021-02-28 16:00:51 -05:00
Ravi C Akkenapally 0a5f9a3b10 SWDEV-179105 - Stream Operations: Add support for Wait and Write
Change-Id: Ibffa1d6d573826b64763da280074a77271d66808
2021-02-15 17:02:38 -08:00
kjayapra-amd 2df099df9e SWDEV-270013 - Allocate kernel_arguments from kern_arg & finegrain pool instead of coarse grain.
Change-Id: Id4c6977934fdd6ef2311f6e75593801f1e51983c
2021-02-15 18:20:08 -05:00
Tony Tye c7e8d91e14 Update code object handling for GSL, PAL and ROCm
- Correct GSL path to report targets using the TargetID syntax.

- Correct GSL path to check compatibility of code objects when
  loading.

- Add concept of an device isa and create a registery used by ROCm,
  PAL and GSL.

- Support XNACK and SRAMECC target features consistently for PAL and ROCm.

- Correct logic for NullDevices and asserts to avoid memory coruption.

- Allow all NullDevices to be created for HIP.

- Numerous other code improvements.

Change-Id: I40abf3d2b22249c1492d1af5919665f8184f4e0e
2021-01-14 11:11:51 -05:00
German Andryeyev 7d3aaa7a39 Explicit page table update on all devices
HMM with xnack enabled should automatically update page tables,
but currently it doesn't perform that. For now, runtime will
force page table update on all devices unconditionally.

Change-Id: Idfa6e1c145e6c114856214dce042b8a8349e5c58
2021-01-12 23:16:46 -05:00
German Andryeyev 8698aeef0d Add HSA signal global tracking logic.
Implement the global class for signals tracking per device queue.
Switch to the new tracking mechanism.

Change-Id: I3c4dda04b34e6d18d6a95510d84102909633b415
2021-01-08 12:57:33 -05:00
Alex Xie 2505d68eba SWDEV-256126 - Linux pro Nuke app crash with "Out of memory"
Out of memory while running RIP plugin test

Change-Id: I8d6859a45b871f96ac027f8c7274f716e8524a3c
2020-12-10 11:44:54 -05:00
Alex Xie e5588f188c SWDEV-256126 - Linux pro Nuke app crash with "Out of memory "while running Rip plugin test
We unmap a memory with a different pointer.
ROCr runtime might be confused and silently ignore the unmap request

Change-Id: Ic5a1387a426cf02a985a4ef8ff8ff05e6a870cbf
2020-10-21 11:33:42 -04:00
Jason Tang 25cc965c76 Change file mode 755 back to 644
Change-Id: I4ba5d66997ffd3331c56674d4bf805160dcdf049
2020-10-19 15:09:32 -04:00
Alex Xie e4e6c46356 SWDEV-251360 - Add tracing for memory allocation/free.
This can be used to debug VM fault

Change-Id: I7685485b0450ea84d10b710639ad7b6c5ec2fcf3
2020-10-15 15:38:55 -04:00
Tao Sang bc7291e85c Fix empty cpu agent on raven system
Change-Id: I30f5e65367613152ce96b80b13e1c9f2a28da807
2020-10-05 10:54:57 -04:00
Jason Tang c33470ab4d SWDEV-239502 - Create copyImageBuffer_ without flags
Change-Id: Ifcb5992d58f3419635d2aca2d51f2dacd7cd466d
2020-08-14 17:25:58 -04:00
Vlad Sytchenko 6780a9ac66 Remove unnecessary SVM commit
Change-Id: I5cb887ead166401a59b0c980f29fd615b19745be
2020-08-13 13:21:03 -04:00
Tao Sang fdef6f722f Apply constexpr on global constant varaibles
When HIP_ENABLE_DEFERRED_LOADING=0, many global variables will be
referenced but they are not initialized in that early time. The patch
will use constexpr to initialze global constant varables in compile
time.

Change-Id: I9d538b7abc6a0ce700ec3332b97fc144db5fc1ef
2020-07-22 22:14:13 -04:00
kjayapra-amd 16e6b65b5c SWDEV-240165 - Move all amd::MemObjMap_ reference to ROCclr and only allow base ptr to get ipc handle.
Change-Id: I9de10a0c4ba4dee3b3c8b972966840ab807001d8
2020-07-09 21:19:45 -04:00
Tao Sang da94cd0de1 Support numa policy set by user
Add hostNumaAlloc() to support numa policy set by user

Change-Id: Ib6c3e838aa53e3d9b3db9735c585df46a1c98944
2020-06-23 18:57:03 -04:00
German Andryeyev c5afd5d412 Initial HMM support
- Expose ROCclr interfaces for HIP usage
- ROCr interfaces aren't available in staging, thus control the
build with AMD_HMM_SUPPORT define

Change-Id: Iadc2bcc230e78d3b0dc22b235189c8cc80843446
2020-06-12 09:06:07 -04:00
Rahul Garg 617538074c Fix IPC create memory failure
ROCr expects granular size in hsa_amd_ipc_memory_create

Change-Id: I7c266aa2eef8304f105298a7a668f4c4b3fb5f5a
2020-06-11 13:02:54 -04:00
kjayapra-amd 1b0882e061 SWDEV-239327 - Dont call hsa_amd_memory_pool_free from ~amd::Memory() for obj created by passing devptr.
Change-Id: I315fd502df6bb1bf66dd24eac9325f1439e432ad
2020-06-05 18:42:03 -04:00
German Andryeyev 3828a61413 Make sure runtime sync before CPU access
Change-Id: I52882788ded187b3f735257a188b1b08d8502147
2020-06-05 12:00:08 -04:00
kjayapra-amd 53a890b499 SWDEV-237467 - Return proper hip error codes incase of ROCclr IPC API failures.
Change-Id: I1d018918ed71f6d80846b3017f7a15f4ab496554
2020-05-22 22:10:15 -04:00
German Andryeyev 8904848abc Set CPU access flag for SVM
Make sure all GPUs have CPU access flag for the fine grain buffer.

Change-Id: Ifc843c2807e70a271b269192ae7859205ff458f3
2020-05-13 16:05:46 -04:00
Jason Tang b4f1239f34 device/rocm: split gfxVersion to major/minor/stepping
Change-Id: I1e437eaee30794147713d9516229211670f01d90
2020-05-12 12:17:13 -04:00
Michael LIAO 503ef06555 Clear executable permission.
Change-Id: Ia0d363b1ba89d7947e5b5a55cb67edba86f0515e
2020-05-07 10:38:58 -04:00
kjayapra-amd 7458bf9964 SWDEV-229840 - Improve error messages on ROCCLR Layer.
Change-Id: Iab7d9156cdc206db86385aa05023a0095ed40f92
2020-04-19 20:01:49 -04:00
Vladislav Sytchenko c781f4d419 Don't call updateFreeMemory() if the allocation failed
Change-Id: I978cb2e463914f6a48b3d4a9057c0f67e7bdb646
2020-04-09 18:41:11 -04:00