Wykres commitów

28 Commity

Autor SHA1 Wiadomość Data
Jaydeep Patel d97b4e8c74 SWDEV-374360 - Handle free for external memory.
Change-Id: I4a1ede2210a255960d7a935cd4debb806e0147f6
2023-01-16 13:06:36 -05:00
Sourabh Betigeri 84fbb30b7c SWDEV-357246 - Adds a missing return statement
Change-Id: I2216f71f4d4fb6dd3766023b0c821cb3d35d7849
2022-10-05 16:29:32 -04:00
neqochan ebfa343827 SWDEV-1 - Fix illegal atomic initialization
See https://stackoverflow.com/a/21710850 for an extensive discussion.

This is a cherry-pick from a github pull request:
https://github.com/ROCm-Developer-Tools/ROCclr/pull/29

Change-Id: I87a58548d2995ab51a7cd6e684b5442e5b300923
2022-05-31 09:51:44 -04:00
Sarbojit Sarkar 2f973fb38b SWDEV-330649 - Fix for QCD app crash
Change-Id: If85eb06083d2f7dbe69cde6fbd5ac54979d25693
2022-04-29 05:37:33 -04:00
German Andryeyev 95d55fdfa8 SWDEV-323702 - Use active queue for transfer
Pass active queue for transfers in the cache coherency layer.
That will allow to use device transfer queue only for
cases when active queue isn't available, because using device
transfer queue from another active queue may cause a deadlock

Change-Id: Ifbe7e0303b77dbf6eeda3939ffbc25a3df7472de
2022-02-18 09:10:53 -05:00
Satyanvesh Dittakavi e20dd61932 SWDEV-306939 - Fix vdi errors/warnings by CppCheck
Change-Id: I56d910f8363787f1050d5d7e8064ed553c5827fd
2022-01-12 00:22:16 -05:00
Satyanvesh Dittakavi c56317b2e0 SWDEV-292714 - Add unique id for each allocation to support HIP_POINTER_ATTRIBUTE_BUFFER_ID
Change-Id: Ibb3fcb2d0bbbef03525fc884d5b3e9b5f6c11423
2021-11-24 06:10:50 -05:00
Sarbojit Sarkar 2afeacc858 SWDEV-310181 - Fix for mGPU dtest failure
Change-Id: Id0898bd45e23f2d637bef25a3e69f26d9dc40785
2021-11-22 01:01:47 -05:00
Alex Xie ea48fc029b SWDEV-306854 - Observed conformance subtest SVM failure
Revert "SWDEV-292408 - Keep tracking of subbuffers for multiple devices"

Change-Id: I604e9b49368fa1f143302fddda674c18d7351108
2021-10-15 09:28:06 -04:00
German Andryeyev 6b47e50350 SWDEV-292408 - Keep tracking of subbuffers for multiple devices
Change-Id: I568b5ea79614ef507cf1f0efb3dca38ab6cc2db7
2021-09-22 19:24:39 -04:00
German Andryeyev 6da9d18140 SWDEV-292408 - Disable cache coherency tracking for HIP
Cache coherency layer is OCL feature to support multiple devices in
single OCL context.

Change-Id: Ic66df9551fad5b0c4df95ab3e1db1da259919f25
2021-09-20 16:13:36 -04:00
Vladislav Sytchenko 74ccf71d53 SWDEV-294514 - Limit HIP-GL interop logic to HIP
Below logic is causing a crash in the CL-GL interop. As a workaround,
limit it only to HIP.

Change-Id: I12e81d035ebd80a4a9a09eb6eea2fae7040d90c9
2021-08-22 23:56:08 -07:00
agunashe d96481fb36 SWDEV-293742 - Update copyright end year VDI repo
Change-Id: I69d2fea4a7a43adf96ccea794270e4af991c5261
2021-08-22 23:56:07 -07:00
Ravi C Akkenapally 0aa524363d SWDEV-245531 - GLInterop: Add Buffer Interop support
Change-Id: I38326173475e84f8eca2605522542ef89a3cf524
2021-05-19 12:24:24 -07:00
Sarbojit Sarkar 16fcf72c42 SWDEV-271539 - fix for hipMemcpy3D segfault
Change-Id: I9c76dfaa19fb3a848623ddf3297a6c8a38f7c494
2021-03-18 00:20:52 -04:00
Jason Tang 0d47b06928 SWDEV-1 - Fix warnings when building with clang++
Change-Id: Idebd2b618b9a3360147984a0e33852dbe2e65818
2021-02-18 10:02:46 -05:00
German Andryeyev 1fde842703 Fix a deadlock in ROCr backend
When OCL ROCr backend performs CL_MEM_COPY_HOST_PTR it may attempt
to have access to amd::Memory object it's currently creating,
but it's not ready yet. The logic creates a temporary dummy object
to perform a copy transfer. The new change will make sure runtime
skips allocation of the same device::Memory object second time.

Change-Id: I14c6a00a3941fdcaa6aea299e9f096e4c3f5cadf
2020-12-09 13:23:17 -05:00
German Andryeyev 089a5cc4ad Add image view allocation
If deferred allocation is disabled, then make sure the image view
is created without a delay. Also reset the allocation state, since
create() method isn't called for a view creation.

Change-Id: I7aa22a62bff18289ade83e56b5d3305ba68c715b
2020-11-18 09:37:30 -05:00
Laurent Morichetti 5d4b6f74d3 Use std::atomic
Replace amd::Atomic with std::atomic. Remove make_atomic uses by
converting the variable to std::atomic and making sure the memory
order is relaxed when synchronizes-with is not needed.

Delete utils/atomic.hpp.

Change-Id: I0b36db8d604a8510ac6e36b32885fd16a1b8ccfa
2020-09-09 14:55:29 -04:00
Tao Sang fdef6f722f Apply constexpr on global constant varaibles
When HIP_ENABLE_DEFERRED_LOADING=0, many global variables will be
referenced but they are not initialized in that early time. The patch
will use constexpr to initialze global constant varables in compile
time.

Change-Id: I9d538b7abc6a0ce700ec3332b97fc144db5fc1ef
2020-07-22 22:14:13 -04:00
German Andryeyev af1c4a5794 Disable sysmem alloc for SVM memory
Device backend is responsible for memory allocation, including
possible HMM support.

Change-Id: I0e4e5ae3b9551790f4f85f0791cca63196cc896e
2020-07-15 12:04:23 -04:00
Tao Sang f7bf882981 Fix static lib crash by setting top init_priority
Set top init_priority on affecting global variables so that
they will be created firstly and destroyed lastly.

Change-Id: Ied59fbecab66ba8195c4a7a02b6bef9fa2fad3af
2020-07-06 16:54:10 -04:00
Tao Sang db10d42e50 Make hipHostMalloc() respect hipSetDevice()
Change-Id: Ibdb666fe8dd049735df2288878501a66f7eedc28
2020-06-12 18:32:10 -04:00
Michael LIAO 503ef06555 Clear executable permission.
Change-Id: Ia0d363b1ba89d7947e5b5a55cb67edba86f0515e
2020-05-07 10:38:58 -04:00
kjayapra-amd 7458bf9964 SWDEV-229840 - Improve error messages on ROCCLR Layer.
Change-Id: Iab7d9156cdc206db86385aa05023a0095ed40f92
2020-04-19 20:01:49 -04:00
Laurent Morichetti d9d9c69399 Replace cl_* integral types with standard types.
cl_bool -> bool
cl_int -> int32_t
cl_uint -> uint32_t
cl_long -> int64_t
cl_ulong -> uint64_t
cl_float -> float
cl_double -> double
cl_bitfield -> uint64_t

Change-Id: I840c8993b55f98f5b745d21e27f5f28233647a58
2020-02-12 13:16:06 -08:00
Laurent Morichetti b4c6143a2f Update copyright info
Change-Id: Ia4f9ff0f5f873b4223a8cca154188bb0d2f1abba
2020-02-04 09:26:14 -08:00
Laurent Morichetti 20c7173849 Merge branch 'origin/pghafari/vdi-prototype' into lmoriche/amd-master
Change-Id: Id3b833d405596735becb3346f3b08c6da57033fe
2020-01-30 20:12:13 -08:00