V1 library will be supported as librocprofiler64.so and V2 will be supported as librocprofiler64v2.so and headers will be rocprofiler.h for V1 and v2/rocprofiler.h for v2
Change-Id: Ibe5bdbf2f79f0175342c648e917ae77918186604
[ROCm/rocprofiler commit: 9e62e066fe]
The lifetime of the kernel descriptor handle is unknown, so we currently uses the record id to identify the kernel name
Change-Id: I8802ce245bb021bcb43dd97cd6334bc88de0faf4
[ROCm/rocprofiler commit: 1322e527a6]
If rocprofiler_set_api_trace_sync_callback is not called by the API client then it will be automatically saved in the buffer and it will be in async to the user to see the API trace data, sample for async api tracing is added to samples/tracer
Change-Id: I01266a12b0eec172fdcffd7f04c89c2fe96174bb
[ROCm/rocprofiler commit: 29b25a3ef5]
Records right now will report basic raw data, no pre-processing in API anymore, and it will be left to the tool to process data from the output of synchronous callbacks of the API tracing records output
Change-Id: I8e5845e49e1228cb2fb60ca188ee748745b6a1af
[ROCm/rocprofiler commit: 4a33787c01]
This is an attempt to support basic and derived counters for navi21. This code will not work correctly unless we add navi counters to metrics.xml and gfx_metrics.xml
Change-Id: Ied06a81345a6fbb02fa0fde1889d94bbe64e9a03
[ROCm/rocprofiler commit: b53fd84ade]
Use hsa header files from /opt/rocm-ver/include rather than using wrapper files from /opt/rocm-ver/hsa/include/hsa
Change-Id: Id7a9bde19447cd2a0fd6e03b11c08471f09c2a46
[ROCm/rocprofiler commit: e7eb195924]
Fixed exception thrown when ROCP_HSA_INTERCEPT not set or set to 0;
Fixed ROCM hsa_init() failed with error 4096 when trying to read hardware performance counters;
Fixed LD_LIBRARY_PATH to include necessary library;
Change-Id: Idcb7ff807a79f4267374c34041d3bca33d85f532
[ROCm/rocprofiler commit: a8b5d6cf33]
Changed derived metrics to double from int64.
Fixed standalone test due to int64 to float change
Fixed intercept test due to int64 to float change.
Change-Id: I49631c187406ae9dd94a869b3bb13772012e8cdf
[ROCm/rocprofiler commit: f9017cbdc5]
L2 flush is triggered by explicit cache flush PM4 packet in aqlprofile
packets to GPU. This cache flush is used to sync up CPU and GPU to make
sure perfomance counters copied to profile output buffer is visible to
CPU. To get rid of this cache flush the followings are done:
1. This explicit cache flush packet is removed from aqlprofile code
(another commit to aqlprofile code).
2. This commit which changed profile output buffer to use kernarg
memory since it is uncached for GPU.
After these changes profile counter values when copied by GPU to output
buffer they are guaranteed to be visible to CPU.
Change-Id: Ie953949c85fbee2f4369f1de966bcfb33daec084
[ROCm/rocprofiler commit: 2b79931631]
Concurrent profiling relies on the aqlprofile read_api
and tracker. This patch set those options to enable
the concurrent profiling.
Change-Id: Ib97d4d8facfbc11f2684d83109397cd13f117d5e
[ROCm/rocprofiler commit: b445610cd1]
This patch adds barrier packets, together with extra signals,
to enforce the completion order of read packets w.r.t dispatch.
And, PmcStopper is added to stop the profiling finally.
Change-Id: I8e8d3a41d86e42be1d9e5afd44c247be876cf1a5
[ROCm/rocprofiler commit: e26210d9d9]
The profiling was only enabled in serial mode, i.e., kernels
are serialized in execution, and counters are reset at each
kernel start and read at kernel completion. This patch adds
the concurrent mode, by issuing the process-level start
packet to reset counters, and then reading twice at kernel
start and end time to obtain the counter value difference.
The new concurrent profiling usage needs the integration
with the corresponding augment at aqlprofile side.
Change-Id: I94b4442eadc8c64b8fba51b1e4916fc8b895ad21
[ROCm/rocprofiler commit: 61c9df4631]
Ammar ELWazir
gobhardw
Giovanni LB
Kiumars Sabeti
Sriraksha Nagaraj
Saurabh Verma
Ranjith Ramakrishnan
Mark Laws
Chun Yang
AMD
Rachida Kebichi
Evgeny
Xianwei Zhang