* Revert - this reverts commit a73e47591c7ea0ed5a7fc217211872d74be64206.
* Revert "[SWDEV-514998/SWDEV-511662] Fix tests for Guest and BM with static CPX config"
This reverts commit 5a71fd9d75d4d6a9bdd7fa3e652eeb12336a1d6a.
Memory partition test was changing original compute partiton based
on default compute mode. Corrected this to set back to original
compute partition.
Signed-off-by: Bindhiya Kanangot Balakrishnan <Bindhiya.KanangotBalakrishnan@amd.com>
[ROCm/rocm_smi_lib commit: 1d6b8d9422]
Memory partition test was changing original compute partiton based
on default compute mode. Corrected this to set back to original
compute partition.
Signed-off-by: Bindhiya Kanangot Balakrishnan <Bindhiya.KanangotBalakrishnan@amd.com>
Guest: Tests needed to account for not supporting changing compute
partitions.
BM: Tests need to account for invalid responses from Driver (due to
static CPX config).
[ROCm/rocm_smi_lib commit: 1dd9ca9df4]
Guest: Tests needed to account for not supporting changing compute
partitions.
BM: Tests need to account for invalid responses from Driver (due to
static CPX config).
Update amdsmi_interface.py
Typo at line 1744:
was: "drm_card": _validate_if_max_uint(enumeration_info.drm_render, MaxUIntegerTypes.UINT32_T),
changed to: "drm_card": _validate_if_max_uint(enumeration_info.drm_card, MaxUIntegerTypes.UINT32_T)
changed from drm_render to drm_card
Signed-off-by: AL Musaffar, Yazen <Yazen.ALMusaffar@amd.com>
Update amdsmi_interface.py
Typo at line 1744:
was: "drm_card": _validate_if_max_uint(enumeration_info.drm_render, MaxUIntegerTypes.UINT32_T),
changed to: "drm_card": _validate_if_max_uint(enumeration_info.drm_card, MaxUIntegerTypes.UINT32_T)
changed from drm_render to drm_card
Signed-off-by: AL Musaffar, Yazen <Yazen.ALMusaffar@amd.com>
[ROCm/amdsmi commit: a6c8bab856]
- For D2H cases avoid passing dependent signals to SDMA, the signals
take a while to resolve on SDMA engine
Change-Id: I569635228af977847f201c82ca897002f8f2f4a8
[ROCm/clr commit: 78d0ff2dbc]
- For D2H cases avoid passing dependent signals to SDMA, the signals
take a while to resolve on SDMA engine
Change-Id: I569635228af977847f201c82ca897002f8f2f4a8
Please follow the README file
Update README_rdc_rest_api.txt
Update RDC_REST_API.py
Error handling updates
Updates for error handling
Updates
Updates for rdc_field_watch/rdc_field_unwatch and delete query
Updates for rdc_field_watch/rdc_field_unwatch and delete query
SWDEV-479738 [RDC] - Rest API
Delete python_binding/RDC_REST_API.py
new rdc_rest_api.py file for SWDEV-479738 [RDC] - Rest API
Please follow the README file
Update README_rdc_rest_api.txt
Update RDC_REST_API.py
Error handling updates
Updates for error handling
Updates
Updates for rdc_field_watch/rdc_field_unwatch and delete query
Updates for rdc_field_watch/rdc_field_unwatch and delete query
SWDEV-479738 [RDC] - Rest API
Delete python_binding/RDC_REST_API.py
new rdc_rest_api.py file for SWDEV-479738 [RDC] - Rest API
[ROCm/rdc commit: cf566ebd31]
* capture streams by reference
* Fix sync_stream in tests/bin/vector-operations
---------
Co-authored-by: Jonathan R. Madsen <jonathanrmadsen@gmail.com>
Co-authored-by: Bhardwaj, Gopesh <Gopesh.Bhardwaj@amd.com>
Remove hard assertions for signal validation on hsa_amd_signal_wait_* operations, instead ignore 0/NULL/invalid signals in the dependency condition evaluation to align with HSA specs for barrier-AND and barrier-OR packets.
Signed-off-by: zichguan-amd <zichuan.guan@amd.com>
Remove hard assertions for signal validation on hsa_amd_signal_wait_* operations, instead ignore 0/NULL/invalid signals in the dependency condition evaluation to align with HSA specs for barrier-AND and barrier-OR packets.
Signed-off-by: zichguan-amd <zichuan.guan@amd.com>
[ROCm/ROCR-Runtime commit: e4d027191c]
Unit_hipMemPoolApi_BasicAlloc expects to work on device 0, but other
tests will set not-0 devices in mgpu. This leads to hang of
Unit_hipMemPoolApi_BasicAlloc. Fix by set device 0 in head code
of Unit_hipMemPoolApi_BasicAlloc.
SWDEV-508872 - Fix Perf_hipPerfMemFill_test
When mem size is 2G, the test is so slow that it looks like stuckness.
Set top mem size to 1G can make the test pass in an acceptiable time.
Change-Id: Ie26dbf597e5ba8cb898d1aae5ed5ecf0267c3228
[ROCm/hip-tests commit: 94eea4db59]
Unit_hipMemPoolApi_BasicAlloc expects to work on device 0, but other
tests will set not-0 devices in mgpu. This leads to hang of
Unit_hipMemPoolApi_BasicAlloc. Fix by set device 0 in head code
of Unit_hipMemPoolApi_BasicAlloc.
SWDEV-508872 - Fix Perf_hipPerfMemFill_test
When mem size is 2G, the test is so slow that it looks like stuckness.
Set top mem size to 1G can make the test pass in an acceptiable time.
Change-Id: Ie26dbf597e5ba8cb898d1aae5ed5ecf0267c3228
* add API doc comments to goamdsmi.go
* update README and usage
* add sphinx directive to parse go doc
* fix walrus operator typos
* make docs more consistent
* add Go docs to index.md
---------
Signed-off-by: Arif, Maisam <Maisam.Arif@amd.com>
* add API doc comments to goamdsmi.go
* update README and usage
* add sphinx directive to parse go doc
* fix walrus operator typos
* make docs more consistent
* add Go docs to index.md
---------
Signed-off-by: Arif, Maisam <Maisam.Arif@amd.com>
[ROCm/amdsmi commit: 15c32f6116]
Adding FP8 datatype to roofline feature in rocprof-compute on MI300-based systems.
FP8 now shows in terminal output and roofline csv, and outputs a standalone PDF.
---------
Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com>
[ROCm/rocprofiler-compute commit: 848fa1dc18]
Adding FP8 datatype to roofline feature in rocprof-compute on MI300-based systems.
FP8 now shows in terminal output and roofline csv, and outputs a standalone PDF.
---------
Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com>
Poag, Charis
Arif, Maisam
Kanangot Balakrishnan, Bindhiya
AL Musaffar, Yazen
Galantsev, Dmitrii
srawat
Saleel Kudchadker
dependabot[bot]
adapryor
Kandula, Venkateshwar reddy
Pengda Xie
zichguan-amd
Tao Sang
Sajina PK
Khatri, Shweta
Park, Peter
Williams, Justin
cfallows-amd