Commit Graph

578 Commitit

Tekijä SHA1 Viesti Päivämäärä
Saleel Kudchadker 02566677cf SWDEV-334152 - Set release as systemscope
Set release scope as system for dispatch AQL when events are passed to
hip*LaunchKernelGGL*

Change-Id: I93b91591e0ab023f1ecc5247f7905eca26147358
2022-04-29 13:19:29 -04:00
German Andryeyev 934149ff0a SWDEV-307184 - Fix a regression from 15f1632d
Disable hostcall buffer in OCL for now. COv5 can add hostcallbuffer
metadata for unknown reason. OCL may fail the buffer allocation
and kernel launch.

Change-Id: I34a6a45bac86c57422b764c0d69760c96920d6c5
2022-04-28 11:57:48 -04:00
Julia Jiang b7c7917256 SWDEV-334574 - Rename _bkendDevice in VDI
Change-Id: I1c04dad226e08f02bca11fa0d1981fafa7ea2d2a
2022-04-27 11:21:24 -04:00
Sarbojit Sarkar 6b15e0a1cc SWDEV-333438 - Fix for hipEnablePeerAccess segfault
Change-Id: I60720d1d9b9c522d15fe17dcfbc609571a4fd266
2022-04-26 05:21:52 -04:00
Ajay d2f837d25f SWDEV-332522 - streamOpsWrite & streamOpsWait to accept memory offset
Change-Id: I4b6ecb4d80c093d038d86616a637c4bb465ae24e
2022-04-25 14:59:36 -04:00
German Andryeyev c275d9b4b3 SWDEV-307184 - Make sure runtime passes CO version into comgr
Disable devlib linking when runtime links multiple objects from
the app. Otherwise devlibs will be linked twice and may cause
undefined behavior with COv5.

Change-Id: I3b8640c64ff898893225fe3af5b4b4a32d42bf40
2022-04-25 09:53:59 -04:00
Jason Tang ed7737564e SWDEV-324411 - Use blit kernel for copyBufferRect if atomic is not supported
Change-Id: I2e110fd3418117ee9c7ede379244d2c6c4f248b7
2022-04-24 11:41:16 -04:00
Christophe Paquot 67657d6099 SWDEV-322620 - Virtual Memory Management
Implement map/unmap for PAL backend
Create commands since PAL uses the IQueue to map/unmap

Change-Id: I97e26a7d28ae5e10774c9ca65307153100945621
2022-04-22 18:09:26 -04:00
sdashmiz 15f1632dfa SWDEV-204804 - Detecing pcie atomic support
- check pcie atomci support for printf functionality
- if not enabled printf wont work

Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: Ib366e8e71772b02210c4a830bca4bd8cc7a11664
2022-04-22 08:53:16 -04:00
Christophe Paquot 4c3a20a16e SWDEV-322620 - Virtual Memory Management
Implement virtualFree for PAL

Change-Id: I4482777fa52c979d42a7c57103862e2e02279024
2022-04-21 14:45:11 -04:00
Saleel Kudchadker 8864e53265 SWDEV-333237 - Disable cache status
Enable Cache status only for ROC_EVENT_NO_FLUSH

Change-Id: I0de4c5af2226bccd66fd704be23c2db33050f2e2
2022-04-20 18:12:33 -04:00
Alex (Bin) Xie 3d514c85b9 SWDEV-329646 - MicroStation app crash upon closing
Change-Id: Ie3422788c80b233c836e319c355214ca076e5d4f
2022-04-20 14:34:44 -04:00
Julia Jiang b1611e0123 SWDEV-330164 - Fix in conformance svm_enqueue_api crash
Change-Id: I12eca6ca3e8d722b7534047fca79b289604aa2b0
2022-04-20 13:20:18 -04:00
Alex Xie 5528812aa9 SWDEV-330240 - HLK pnp with IO stress test fail
This code change is to improve error handling.
This code change does not fix issue itself.
Before this code change, hostcallBuffer_ point is initialized in the end of
create() function. If create function fails and returns early,
hostcallBuffer_ point is not initialized. This non-initialized point can
cause access violation when object is destructed.

This code change put the initialization of the pointer in the constructor.

Change-Id: I7fb6e764eb0547196dca03db237e49d3ff0fd06a
2022-04-19 11:04:26 -04:00
Saleel Kudchadker 9ec8a7306d SWDEV-332512 - Signal pool changes
Create a new signal if the next set of signals are busy

Change-Id: I5108e68c88fe41e3a45bad4495ebdf3742e76dcd
2022-04-18 15:58:38 -04:00
Saleel Kudchadker b6cbfaf499 SWDEV-301667 - Separate scope from marker_ts_
Change-Id: I19f4d394e898bfb8c9d9a2c2edf9d5bf5def3b08
2022-04-16 19:26:31 -04:00
pghafari 4d54f873b0 SWDEV-324412 - Removing depth24
OGLP fails conformance tests with depth24

Change-Id: I1efd66a81f64a5b999d0f3c3e9314b9e6129a587
2022-04-15 15:31:03 -04:00
Christophe Paquot b5f555f9ec SWDEV-322620 - Virtual Memory Management
Adding virtual memory management APIs to rocclr.
The HIP layer will handle virtual allocs on devices.

Change-Id: Ia978f105c2c3fed3959c77580ba228e845105754
2022-04-15 00:10:02 -04:00
German Andryeyev 7975a07112 SWDEV-332512 - Add ROC_SIGNAL_POOL_SIZE
Default value is 32 HSA signals in the pool.

Change-Id: Icb69413d3ff6ef228d9a9e22fd024e72c6d8ebe4
2022-04-14 17:32:00 -04:00
Saleel Kudchadker 8eeaa998c0 SWDEV-301667 - Add cache state for a device
- Add a global cache state for a device to indicate scopes of submitted
AQL packets
- Remove scopes for TS marker if hipEventReleaseToDevice is passed. Set
env ROC_EVENT_NO_FLUSH=1 to use NOP AQL for event records.
It would flush caches by default with system scope release.
- Calling finish() should ensure if caches are flushed, if not queue a
marker

Change-Id: Ibbbdbb1cd7ac61cb35649169212142545be159e0
2022-04-12 12:27:31 -04:00
Maxime Chambonnet d45794e985 SWDEV-1 - ROC CLR typos
This is cherry-picked from this github issue:
https://github.com/ROCm-Developer-Tools/ROCclr/issues/28

Change-Id: I236f4f25a2dabe05883159af0fab0bad06ab0fd0
2022-04-11 14:24:39 -04:00
German Andryeyev abf088ea89 SWDEV-307184 - Hidden heap keyword was renamed
Change-Id: I0a72b0cc16bd3d637cbaa79a692640bc922f62c4
2022-04-11 09:26:14 -04:00
German Andryeyev 2be0b1e612 SWDEV-307184 - Report 1 for unused dimensions
Remove assert for kernel arg size, because COv5 reports a value
bigger than the actual usage in the most of cases

Change-Id: I8e15bc45a9e21b58a5894f9977511ca84408ce61
2022-04-08 13:43:37 -04:00
kjayapra-amd b3b88ef926 SWDEV-331104 - Size passed to fillBuffer should not be 0.
Change-Id: Ifbc6047fafa0e55b5ab956cf3b7254c7e20b1e88
2022-04-08 09:29:55 -04:00
German Andryeyev caa6110c29 SWDEV-307184 - Move local size calculation
With COv5 local size calculation must occur before
runtime programs kernel arguments

Change-Id: I0726c6529bde69b8fcf5360aa83986cf84e04168
2022-04-05 11:19:51 -04:00
German Andryeyev e5a791217e SWDEV-1 - Fix compilation error with PAL staging
Replace compile assert with an error message during execution

Change-Id: I4c054c65845b14bb980e165855693705c097ff80
2022-04-05 11:19:51 -04:00
kjayapra-amd 378a427d8c SWDEV-325776 - Adding device release scope for kernel dispatch packet
Change-Id: I8ea763f4c0239c410143b748c05822e9f6694412
(cherry picked from commit ec4894f8a27a3330b895a0ded385ab96f5ef242d)
2022-04-01 08:17:29 -04:00
kjayapra-amd 7fb80a027a SWDEV-305527 - Changes to handle memset blit kernel that takes width, height and depth. This also fixes SWDEV-317261.
Change-Id: Ic85f63a95d9d8f48884fc8c7fd95cbb496dfbbca
2022-03-31 09:02:33 -04:00
German Andryeyev 28597ec5b5 SWDEV-328670 - Enable arena for ROCr interops
Add ROCR memory detection and enable arena mem object for possible
access in HIP

Change-Id: Icf86ac789176bfee4ea8d36b0970a817d4c6a2f7
2022-03-30 16:46:36 -04:00
Saleel Kudchadker 61d0b999be SWDEV-301947 - Report regular CU count for OpenCL
Change-Id: I3ea058bba98f3c6554cbde37173bbd772f489cf5
2022-03-29 16:19:14 -04:00
Satyanvesh Dittakavi c1b95b09bf SWDEV-326397 - P2P copies to take SDMA path if there is no pending dispatch
Change-Id: I50cfb8d77f7882151a20a1de7aaf5219b1695b7d
2022-03-29 14:59:11 +00:00
Saleel Kudchadker 802c2c8a9f SWDEV-322225 - Use numa_allocate_bitmask
- Fix a crash with AMD_CPU_AFFINITY=1 as numa_bitmask_alloc isnt the
right api to allocate bitmask
- Do not set affinity for ROCr thread. It worsens performance rather
than any improvement.
- Fix regression from my previous change for event handler.

Change-Id: I3ea75adc2a6333f29752283eddd5b555e9b58cc5
2022-03-26 13:24:51 -04:00
Ajay 35877b1b13 SWDEV-301667 - return void in getTime(). Avoid warning treated as error
Change-Id: I9445eec554e6f705fb8f248e6be7ff995f163f25
2022-03-25 13:39:55 -04:00
Saleel Kudchadker 3c3c0ca4c5 SWDEV-301667 - Selectively queue handler
- Queue handler for hipEventRecord(aka marker_ts_) only if there is a
callback associated with it.

Change-Id: I8a9877ae0e342556053abbaacc9510744a8e772a
2022-03-24 19:46:28 -04:00
Saleel Kudchadker 9292abb2d8 SWDEV-328349 - Rate limit hostcall listener
Update timeout for hostcall wait for signal. If the timeout is small it
checks frequent enough to affect performance for certain applications
which may be CPU bound.

Change-Id: I0a879559e4ad111b09a994a5b82a6faf6e4fea3f
2022-03-23 12:18:00 -04:00
German Andryeyev 3af3fe10de SWDEV-307185 - Move memory allocation under device layer
It can be too early to allocate memory at the begining of
Device::create() under PAL

Change-Id: I4bd76db7be3f6fb246243ea68022d8b0f860471d
2022-03-21 16:17:22 -04:00
sdashmiz 6e506da36d SWDEV-307107 - HipPrintf failure for XGMI on windows
Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: Iab2740364bb673029f0a80b419d80d5b726b9082
2022-03-17 10:03:56 -04:00
Sarbojit Sarkar 3c2dc1f646 SWDEV-325708 - Query for FineGrained support
Change-Id: Idd20a71467595ab6577bf47c081c437a4b166988
2022-03-16 05:09:42 -04:00
German Andryeyev 43ea9a8e31 SWDEV-286150 - Switch PAL version to 711
Change-Id: Iaf07946d6327f92ed734223a6b38c433ce368c4a
2022-03-14 13:00:40 -04:00
Saleel Kudchadker 3bf1d5ac97 SWDEV-301667 - Remove guarantee
Remove guarantee from AddMemObj as one can call it multiple times for
different devices

Change-Id: I49dd76068b3c4c709f17541159052302dcdb374d
2022-03-08 16:20:10 -08:00
German Andryeyev 7b114a2b8b SWDEV-307185 - Create heap for device memory allocator
Pass the allocated heap with the kernel arguments

Change-Id: Icdec09b7f937845c39e21cbca7071dc3ba791af9
2022-03-04 00:44:41 -05:00
Saleel Kudchadker e888c9e491 SWDEV-301947 - Rename device Info element
Rename maxBoostComputeUnits to maxPhysicalComputeUnits_.

Change-Id: I5941515ac4f1f4348b3b10478bf4e01444f0a864
2022-02-25 16:48:15 -08:00
German Andryeyev 2664d8cf9e SWDEV-319375 - Avoid global var size query
Currently COMGR doesn't provide global variable size and runtime
parses ELF binary directly. Avoid parsing for HIP. That can save
5% in hipModuleLoad() time.

Change-Id: I47540d1e957bdb0c2406b6b848222de2920b2504
2022-02-23 21:33:05 -05:00
Saleel Kudchadker c02d3fd7d8 SWDEV-301667 - Fix maxNode size for get_mempolicy
Change-Id: Ifd84c94394b86580cf39178ad0e7f85580b24edb
2022-02-19 12:48:22 -05:00
German Andryeyev 95d55fdfa8 SWDEV-323702 - Use active queue for transfer
Pass active queue for transfers in the cache coherency layer.
That will allow to use device transfer queue only for
cases when active queue isn't available, because using device
transfer queue from another active queue may cause a deadlock

Change-Id: Ifbe7e0303b77dbf6eeda3939ffbc25a3df7472de
2022-02-18 09:10:53 -05:00
German Andryeyev fbf531398a SWDEV-323364 - Fix a typo
Change-Id: I2031296ab9451342d5930b8b2d3d2e6277946647
2022-02-17 20:50:29 -05:00
Saleel Kudchadker 041ddc0c1c SWDEV-322605 - Fix infinite loop condition
If GlobalMemCacheLine reported is 0, runtime may run into an
infinite loop as the KernelSegmentAlignment is chosen as size of the
cache line.

Change-Id: Ide547940cc0407f16fab10ee210b4fd3ae4eaafc
2022-02-16 13:16:18 -05:00
German Andryeyev 3fd4a67670 SWDEV-316824 - Fix P2P compute copy path
Use device memory object for the GPU VA address look-up.

Change-Id: I76bf58b29205f7b3ba1bf68e9fcca69421267203
2022-02-15 13:20:13 -05:00
German Andryeyev 525a1bbf1a SWDEV-286150 - Remove GSL backend
Change-Id: Iba9a997ee7d5ff6ac00d5888ff189a4514958fe9
2022-02-09 17:16:39 -05:00
German Andryeyev 0bf395af39 SWDEV-286150 - Don't report OCL2.2 support
OCL2.2 requires SPIR-V and runtime doesn't support it.
Make sure PAL backend doesn't report any SPIR-V support.

Change-Id: I8d179069674205b54f7d20d149bcb675bee5cdb0
2022-02-07 17:34:39 -05:00