Dispatch_ID,Kernel_Name,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,wave_size,obj,TCC_EA_RDREQ_IO_CREDIT_STALL[0],TCC_EA_RDREQ_LEVEL[0],TCC_EA_WRREQ[0],TCC_EA_WRREQ_64B[0],TCC_EA_RDREQ_IO_CREDIT_STALL[1],TCC_EA_RDREQ_LEVEL[1],TCC_EA_WRREQ[1],TCC_EA_WRREQ_64B[1],TCC_EA_RDREQ_IO_CREDIT_STALL[2],TCC_EA_RDREQ_LEVEL[2],TCC_EA_WRREQ[2],TCC_EA_WRREQ_64B[2],TCC_EA_RDREQ_IO_CREDIT_STALL[3],TCC_EA_RDREQ_LEVEL[3],TCC_EA_WRREQ[3],TCC_EA_WRREQ_64B[3],TCC_EA_RDREQ_IO_CREDIT_STALL[4],TCC_EA_RDREQ_LEVEL[4],TCC_EA_WRREQ[4],TCC_EA_WRREQ_64B[4],TCC_EA_RDREQ_IO_CREDIT_STALL[5],TCC_EA_RDREQ_LEVEL[5],TCC_EA_WRREQ[5],TCC_EA_WRREQ_64B[5],TCC_EA_RDREQ_IO_CREDIT_STALL[6],TCC_EA_RDREQ_LEVEL[6],TCC_EA_WRREQ[6],TCC_EA_WRREQ_64B[6],TCC_EA_RDREQ_IO_CREDIT_STALL[7],TCC_EA_RDREQ_LEVEL[7],TCC_EA_WRREQ[7],TCC_EA_WRREQ_64B[7],TCC_EA_RDREQ_IO_CREDIT_STALL[8],TCC_EA_RDREQ_LEVEL[8],TCC_EA_WRREQ[8],TCC_EA_WRREQ_64B[8],TCC_EA_RDREQ_IO_CREDIT_STALL[9],TCC_EA_RDREQ_LEVEL[9],TCC_EA_WRREQ[9],TCC_EA_WRREQ_64B[9],TCC_EA_RDREQ_IO_CREDIT_STALL[10],TCC_EA_RDREQ_LEVEL[10],TCC_EA_WRREQ[10],TCC_EA_WRREQ_64B[10],TCC_EA_RDREQ_IO_CREDIT_STALL[11],TCC_EA_RDREQ_LEVEL[11],TCC_EA_WRREQ[11],TCC_EA_WRREQ_64B[11],TCC_EA_RDREQ_IO_CREDIT_STALL[12],TCC_EA_RDREQ_LEVEL[12],TCC_EA_WRREQ[12],TCC_EA_WRREQ_64B[12],TCC_EA_RDREQ_IO_CREDIT_STALL[13],TCC_EA_RDREQ_LEVEL[13],TCC_EA_WRREQ[13],TCC_EA_WRREQ_64B[13],TCC_EA_RDREQ_IO_CREDIT_STALL[14],TCC_EA_RDREQ_LEVEL[14],TCC_EA_WRREQ[14],TCC_EA_WRREQ_64B[14],TCC_EA_RDREQ_IO_CREDIT_STALL[15],TCC_EA_RDREQ_LEVEL[15],TCC_EA_WRREQ[15],TCC_EA_WRREQ_64B[15],TCC_EA_RDREQ_IO_CREDIT_STALL[16],TCC_EA_RDREQ_LEVEL[16],TCC_EA_WRREQ[16],TCC_EA_WRREQ_64B[16],TCC_EA_RDREQ_IO_CREDIT_STALL[17],TCC_EA_RDREQ_LEVEL[17],TCC_EA_WRREQ[17],TCC_EA_WRREQ_64B[17],TCC_EA_RDREQ_IO_CREDIT_STALL[18],TCC_EA_RDREQ_LEVEL[18],TCC_EA_WRREQ[18],TCC_EA_WRREQ_64B[18],TCC_EA_RDREQ_IO_CREDIT_STALL[19],TCC_EA_RDREQ_LEVEL[19],TCC_EA_WRREQ[19],TCC_EA_WRREQ_64B[19],TCC_EA_RDREQ_IO_CREDIT_STALL[20],TCC_EA_RDREQ_LEVEL[20],TCC_EA_WRREQ[20],TCC_EA_WRREQ_64B[20],TCC_EA_RDREQ_IO_CREDIT_STALL[21],TCC_EA_RDREQ_LEVEL[21],TCC_EA_WRREQ[21],TCC_EA_WRREQ_64B[21],TCC_EA_RDREQ_IO_CREDIT_STALL[22],TCC_EA_RDREQ_LEVEL[22],TCC_EA_WRREQ[22],TCC_EA_WRREQ_64B[22],TCC_EA_RDREQ_IO_CREDIT_STALL[23],TCC_EA_RDREQ_LEVEL[23],TCC_EA_WRREQ[23],TCC_EA_WRREQ_64B[23],TCC_EA_RDREQ_IO_CREDIT_STALL[24],TCC_EA_RDREQ_LEVEL[24],TCC_EA_WRREQ[24],TCC_EA_WRREQ_64B[24],TCC_EA_RDREQ_IO_CREDIT_STALL[25],TCC_EA_RDREQ_LEVEL[25],TCC_EA_WRREQ[25],TCC_EA_WRREQ_64B[25],TCC_EA_RDREQ_IO_CREDIT_STALL[26],TCC_EA_RDREQ_LEVEL[26],TCC_EA_WRREQ[26],TCC_EA_WRREQ_64B[26],TCC_EA_RDREQ_IO_CREDIT_STALL[27],TCC_EA_RDREQ_LEVEL[27],TCC_EA_WRREQ[27],TCC_EA_WRREQ_64B[27],TCC_EA_RDREQ_IO_CREDIT_STALL[28],TCC_EA_RDREQ_LEVEL[28],TCC_EA_WRREQ[28],TCC_EA_WRREQ_64B[28],TCC_EA_RDREQ_IO_CREDIT_STALL[29],TCC_EA_RDREQ_LEVEL[29],TCC_EA_WRREQ[29],TCC_EA_WRREQ_64B[29],TCC_EA_RDREQ_IO_CREDIT_STALL[30],TCC_EA_RDREQ_LEVEL[30],TCC_EA_WRREQ[30],TCC_EA_WRREQ_64B[30],TCC_EA_RDREQ_IO_CREDIT_STALL[31],TCC_EA_RDREQ_LEVEL[31],TCC_EA_WRREQ[31],TCC_EA_WRREQ_64B[31],wave_size_1,obj_1,TCC_RW_REQ[0],TCC_TOO_MANY_EA_WRREQS_STALL[0],TCC_WRITE[0],TCC_RW_REQ[1],TCC_TOO_MANY_EA_WRREQS_STALL[1],TCC_WRITE[1],TCC_RW_REQ[2],TCC_TOO_MANY_EA_WRREQS_STALL[2],TCC_WRITE[2],TCC_RW_REQ[3],TCC_TOO_MANY_EA_WRREQS_STALL[3],TCC_WRITE[3],TCC_RW_REQ[4],TCC_TOO_MANY_EA_WRREQS_STALL[4],TCC_WRITE[4],TCC_RW_REQ[5],TCC_TOO_MANY_EA_WRREQS_STALL[5],TCC_WRITE[5],TCC_RW_REQ[6],TCC_TOO_MANY_EA_WRREQS_STALL[6],TCC_WRITE[6],TCC_RW_REQ[7],TCC_TOO_MANY_EA_WRREQS_STALL[7],TCC_WRITE[7],TCC_RW_REQ[8],TCC_TOO_MANY_EA_WRREQS_STALL[8],TCC_WRITE[8],TCC_RW_REQ[9],TCC_TOO_MANY_EA_WRREQS_STALL[9],TCC_WRITE[9],TCC_RW_REQ[10],TCC_TOO_MANY_EA_WRREQS_STALL[10],TCC_WRITE[10],TCC_RW_REQ[11],TCC_TOO_MANY_EA_WRREQS_STALL[11],TCC_WRITE[11],TCC_RW_REQ[12],TCC_TOO_MANY_EA_WRREQS_STALL[12],TCC_WRITE[12],TCC_RW_REQ[13],TCC_TOO_MANY_EA_WRREQS_STALL[13],TCC_WRITE[13],TCC_RW_REQ[14],TCC_TOO_MANY_EA_WRREQS_STALL[14],TCC_WRITE[14],TCC_RW_REQ[15],TCC_TOO_MANY_EA_WRREQS_STALL[15],TCC_WRITE[15],TCC_RW_REQ[16],TCC_TOO_MANY_EA_WRREQS_STALL[16],TCC_WRITE[16],TCC_RW_REQ[17],TCC_TOO_MANY_EA_WRREQS_STALL[17],TCC_WRITE[17],TCC_RW_REQ[18],TCC_TOO_MANY_EA_WRREQS_STALL[18],TCC_WRITE[18],TCC_RW_REQ[19],TCC_TOO_MANY_EA_WRREQS_STALL[19],TCC_WRITE[19],TCC_RW_REQ[20],TCC_TOO_MANY_EA_WRREQS_STALL[20],TCC_WRITE[20],TCC_RW_REQ[21],TCC_TOO_MANY_EA_WRREQS_STALL[21],TCC_WRITE[21],TCC_RW_REQ[22],TCC_TOO_MANY_EA_WRREQS_STALL[22],TCC_WRITE[22],TCC_RW_REQ[23],TCC_TOO_MANY_EA_WRREQS_STALL[23],TCC_WRITE[23],TCC_RW_REQ[24],TCC_TOO_MANY_EA_WRREQS_STALL[24],TCC_WRITE[24],TCC_RW_REQ[25],TCC_TOO_MANY_EA_WRREQS_STALL[25],TCC_WRITE[25],TCC_RW_REQ[26],TCC_TOO_MANY_EA_WRREQS_STALL[26],TCC_WRITE[26],TCC_RW_REQ[27],TCC_TOO_MANY_EA_WRREQS_STALL[27],TCC_WRITE[27],TCC_RW_REQ[28],TCC_TOO_MANY_EA_WRREQS_STALL[28],TCC_WRITE[28],TCC_RW_REQ[29],TCC_TOO_MANY_EA_WRREQS_STALL[29],TCC_WRITE[29],TCC_RW_REQ[30],TCC_TOO_MANY_EA_WRREQS_STALL[30],TCC_WRITE[30],TCC_RW_REQ[31],TCC_TOO_MANY_EA_WRREQS_STALL[31],TCC_WRITE[31],wave_size_2,obj_2,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_PENDING_STALL_CYCLES_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCC_EA_ATOMIC_sum,TCC_EA_RDREQ_LEVEL_sum,TCC_EA_WRREQ_LEVEL_sum,wave_size_3,obj_3,TCC_EA_ATOMIC_LEVEL_sum,wave_size_4,obj_4,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_INSTS_VALU,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,TCP_TCP_LATENCY_sum,TCP_TCC_READ_REQ_LATENCY_sum,TCP_TCC_WRITE_REQ_LATENCY_sum,TCP_TCC_READ_REQ_sum,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TCC_EA_WRREQ_STALL_sum,TCC_EA_WRREQ_IO_CREDIT_STALL_sum,TCC_EA_WRREQ_GMI_CREDIT_STALL_sum,TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum,wave_size_5,obj_5,TCC_EA_WRREQ_DRAM_CREDIT_STALL[0],TCC_EA_WRREQ_GMI_CREDIT_STALL[0],TCC_EA_WRREQ_IO_CREDIT_STALL[0],TCC_EA_WRREQ_LEVEL[0],TCC_EA_WRREQ_DRAM_CREDIT_STALL[1],TCC_EA_WRREQ_GMI_CREDIT_STALL[1],TCC_EA_WRREQ_IO_CREDIT_STALL[1],TCC_EA_WRREQ_LEVEL[1],TCC_EA_WRREQ_DRAM_CREDIT_STALL[2],TCC_EA_WRREQ_GMI_CREDIT_STALL[2],TCC_EA_WRREQ_IO_CREDIT_STALL[2],TCC_EA_WRREQ_LEVEL[2],TCC_EA_WRREQ_DRAM_CREDIT_STALL[3],TCC_EA_WRREQ_GMI_CREDIT_STALL[3],TCC_EA_WRREQ_IO_CREDIT_STALL[3],TCC_EA_WRREQ_LEVEL[3],TCC_EA_WRREQ_DRAM_CREDIT_STALL[4],TCC_EA_WRREQ_GMI_CREDIT_STALL[4],TCC_EA_WRREQ_IO_CREDIT_STALL[4],TCC_EA_WRREQ_LEVEL[4],TCC_EA_WRREQ_DRAM_CREDIT_STALL[5],TCC_EA_WRREQ_GMI_CREDIT_STALL[5],TCC_EA_WRREQ_IO_CREDIT_STALL[5],TCC_EA_WRREQ_LEVEL[5],TCC_EA_WRREQ_DRAM_CREDIT_STALL[6],TCC_EA_WRREQ_GMI_CREDIT_STALL[6],TCC_EA_WRREQ_IO_CREDIT_STALL[6],TCC_EA_WRREQ_LEVEL[6],TCC_EA_WRREQ_DRAM_CREDIT_STALL[7],TCC_EA_WRREQ_GMI_CREDIT_STALL[7],TCC_EA_WRREQ_IO_CREDIT_STALL[7],TCC_EA_WRREQ_LEVEL[7],TCC_EA_WRREQ_DRAM_CREDIT_STALL[8],TCC_EA_WRREQ_GMI_CREDIT_STALL[8],TCC_EA_WRREQ_IO_CREDIT_STALL[8],TCC_EA_WRREQ_LEVEL[8],TCC_EA_WRREQ_DRAM_CREDIT_STALL[9],TCC_EA_WRREQ_GMI_CREDIT_STALL[9],TCC_EA_WRREQ_IO_CREDIT_STALL[9],TCC_EA_WRREQ_LEVEL[9],TCC_EA_WRREQ_DRAM_CREDIT_STALL[10],TCC_EA_WRREQ_GMI_CREDIT_STALL[10],TCC_EA_WRREQ_IO_CREDIT_STALL[10],TCC_EA_WRREQ_LEVEL[10],TCC_EA_WRREQ_DRAM_CREDIT_STALL[11],TCC_EA_WRREQ_GMI_CREDIT_STALL[11],TCC_EA_WRREQ_IO_CREDIT_STALL[11],TCC_EA_WRREQ_LEVEL[11],TCC_EA_WRREQ_DRAM_CREDIT_STALL[12],TCC_EA_WRREQ_GMI_CREDIT_STALL[12],TCC_EA_WRREQ_IO_CREDIT_STALL[12],TCC_EA_WRREQ_LEVEL[12],TCC_EA_WRREQ_DRAM_CREDIT_STALL[13],TCC_EA_WRREQ_GMI_CREDIT_STALL[13],TCC_EA_WRREQ_IO_CREDIT_STALL[13],TCC_EA_WRREQ_LEVEL[13],TCC_EA_WRREQ_DRAM_CREDIT_STALL[14],TCC_EA_WRREQ_GMI_CREDIT_STALL[14],TCC_EA_WRREQ_IO_CREDIT_STALL[14],TCC_EA_WRREQ_LEVEL[14],TCC_EA_WRREQ_DRAM_CREDIT_STALL[15],TCC_EA_WRREQ_GMI_CREDIT_STALL[15],TCC_EA_WRREQ_IO_CREDIT_STALL[15],TCC_EA_WRREQ_LEVEL[15],TCC_EA_WRREQ_DRAM_CREDIT_STALL[16],TCC_EA_WRREQ_GMI_CREDIT_STALL[16],TCC_EA_WRREQ_IO_CREDIT_STALL[16],TCC_EA_WRREQ_LEVEL[16],TCC_EA_WRREQ_DRAM_CREDIT_STALL[17],TCC_EA_WRREQ_GMI_CREDIT_STALL[17],TCC_EA_WRREQ_IO_CREDIT_STALL[17],TCC_EA_WRREQ_LEVEL[17],TCC_EA_WRREQ_DRAM_CREDIT_STALL[18],TCC_EA_WRREQ_GMI_CREDIT_STALL[18],TCC_EA_WRREQ_IO_CREDIT_STALL[18],TCC_EA_WRREQ_LEVEL[18],TCC_EA_WRREQ_DRAM_CREDIT_STALL[19],TCC_EA_WRREQ_GMI_CREDIT_STALL[19],TCC_EA_WRREQ_IO_CREDIT_STALL[19],TCC_EA_WRREQ_LEVEL[19],TCC_EA_WRREQ_DRAM_CREDIT_STALL[20],TCC_EA_WRREQ_GMI_CREDIT_STALL[20],TCC_EA_WRREQ_IO_CREDIT_STALL[20],TCC_EA_WRREQ_LEVEL[20],TCC_EA_WRREQ_DRAM_CREDIT_STALL[21],TCC_EA_WRREQ_GMI_CREDIT_STALL[21],TCC_EA_WRREQ_IO_CREDIT_STALL[21],TCC_EA_WRREQ_LEVEL[21],TCC_EA_WRREQ_DRAM_CREDIT_STALL[22],TCC_EA_WRREQ_GMI_CREDIT_STALL[22],TCC_EA_WRREQ_IO_CREDIT_STALL[22],TCC_EA_WRREQ_LEVEL[22],TCC_EA_WRREQ_DRAM_CREDIT_STALL[23],TCC_EA_WRREQ_GMI_CREDIT_STALL[23],TCC_EA_WRREQ_IO_CREDIT_STALL[23],TCC_EA_WRREQ_LEVEL[23],TCC_EA_WRREQ_DRAM_CREDIT_STALL[24],TCC_EA_WRREQ_GMI_CREDIT_STALL[24],TCC_EA_WRREQ_IO_CREDIT_STALL[24],TCC_EA_WRREQ_LEVEL[24],TCC_EA_WRREQ_DRAM_CREDIT_STALL[25],TCC_EA_WRREQ_GMI_CREDIT_STALL[25],TCC_EA_WRREQ_IO_CREDIT_STALL[25],TCC_EA_WRREQ_LEVEL[25],TCC_EA_WRREQ_DRAM_CREDIT_STALL[26],TCC_EA_WRREQ_GMI_CREDIT_STALL[26],TCC_EA_WRREQ_IO_CREDIT_STALL[26],TCC_EA_WRREQ_LEVEL[26],TCC_EA_WRREQ_DRAM_CREDIT_STALL[27],TCC_EA_WRREQ_GMI_CREDIT_STALL[27],TCC_EA_WRREQ_IO_CREDIT_STALL[27],TCC_EA_WRREQ_LEVEL[27],TCC_EA_WRREQ_DRAM_CREDIT_STALL[28],TCC_EA_WRREQ_GMI_CREDIT_STALL[28],TCC_EA_WRREQ_IO_CREDIT_STALL[28],TCC_EA_WRREQ_LEVEL[28],TCC_EA_WRREQ_DRAM_CREDIT_STALL[29],TCC_EA_WRREQ_GMI_CREDIT_STALL[29],TCC_EA_WRREQ_IO_CREDIT_STALL[29],TCC_EA_WRREQ_LEVEL[29],TCC_EA_WRREQ_DRAM_CREDIT_STALL[30],TCC_EA_WRREQ_GMI_CREDIT_STALL[30],TCC_EA_WRREQ_IO_CREDIT_STALL[30],TCC_EA_WRREQ_LEVEL[30],TCC_EA_WRREQ_DRAM_CREDIT_STALL[31],TCC_EA_WRREQ_GMI_CREDIT_STALL[31],TCC_EA_WRREQ_IO_CREDIT_STALL[31],TCC_EA_WRREQ_LEVEL[31],wave_size_6,obj_6,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SQ_INSTS_SMEM_NORM,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_CC_ATOMIC_REQ_sum,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_NORMAL_WRITEBACK_sum,TCC_ALL_TC_OP_WB_WRITEBACK_sum,TCC_NORMAL_EVICT_sum,TCC_ALL_TC_OP_INV_EVICT_sum,wave_size_7,obj_7,SQ_INSTS_FLAT,SQ_INSTS_LDS,SQ_INSTS_GDS,SQ_INSTS_EXP_GDS,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_INSTS,SQ_WAIT_ANY,TCP_UTCL1_TRANSLATION_MISS_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TCC_EA_WRREQ_sum,TCC_EA_WRREQ_64B_sum,TCC_EA_WR_UNCACHED_32B_sum,TCC_EA_WRREQ_DRAM_sum,wave_size_8,obj_8,SQ_LDS_BANK_CONFLICT,SQ_LDS_ADDR_CONFLICT,SQ_LDS_UNALIGNED_STALL,SQ_WAVES_EQ_64,SQ_WAVES_LT_64,SQ_WAVES_LT_48,SQ_WAVES_LT_32,SQ_WAVES_LT_16,TCP_TCC_NC_WRITE_REQ_sum,TCP_TCC_NC_ATOMIC_REQ_sum,TCP_TCC_UC_READ_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TA_FLAT_ATOMIC_WAVEFRONTS_sum,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TCC_EA_RDREQ_IO_CREDIT_STALL_sum,TCC_EA_RDREQ_GMI_CREDIT_STALL_sum,TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum,TCC_TAG_STALL_sum,wave_size_9,obj_9,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,TCP_VOLATILE_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCC_HIT_sum,TCC_MISS_sum,wave_size_10,obj_10,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,GRBM_SPI_BUSY,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TD_COALESCABLE_WAVEFRONT_sum,TD_LOAD_WAVEFRONT_sum,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TCC_NC_REQ_sum,TCC_UC_REQ_sum,TCC_CC_REQ_sum,TCC_RW_REQ_sum,wave_size_11,obj_11,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SQ_THREAD_CYCLES_VALU,SQ_IFETCH,TCP_TCC_WRITE_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_NC_READ_REQ_sum,TA_FLAT_WAVEFRONTS_sum,TA_FLAT_READ_WAVEFRONTS_sum,SPI_RA_BAR_CU_FULL_CSN,SPI_RA_TGLIM_CU_FULL_CSN,TCC_EA_RDREQ_sum,TCC_EA_RDREQ_32B_sum,TCC_EA_RD_UNCACHED_32B_sum,TCC_EA_RDREQ_DRAM_sum,wave_size_12,obj_12,TCC_EA_RDREQ[0],TCC_EA_RDREQ_32B[0],TCC_EA_RDREQ_DRAM_CREDIT_STALL[0],TCC_EA_RDREQ_GMI_CREDIT_STALL[0],TCC_EA_RDREQ[1],TCC_EA_RDREQ_32B[1],TCC_EA_RDREQ_DRAM_CREDIT_STALL[1],TCC_EA_RDREQ_GMI_CREDIT_STALL[1],TCC_EA_RDREQ[2],TCC_EA_RDREQ_32B[2],TCC_EA_RDREQ_DRAM_CREDIT_STALL[2],TCC_EA_RDREQ_GMI_CREDIT_STALL[2],TCC_EA_RDREQ[3],TCC_EA_RDREQ_32B[3],TCC_EA_RDREQ_DRAM_CREDIT_STALL[3],TCC_EA_RDREQ_GMI_CREDIT_STALL[3],TCC_EA_RDREQ[4],TCC_EA_RDREQ_32B[4],TCC_EA_RDREQ_DRAM_CREDIT_STALL[4],TCC_EA_RDREQ_GMI_CREDIT_STALL[4],TCC_EA_RDREQ[5],TCC_EA_RDREQ_32B[5],TCC_EA_RDREQ_DRAM_CREDIT_STALL[5],TCC_EA_RDREQ_GMI_CREDIT_STALL[5],TCC_EA_RDREQ[6],TCC_EA_RDREQ_32B[6],TCC_EA_RDREQ_DRAM_CREDIT_STALL[6],TCC_EA_RDREQ_GMI_CREDIT_STALL[6],TCC_EA_RDREQ[7],TCC_EA_RDREQ_32B[7],TCC_EA_RDREQ_DRAM_CREDIT_STALL[7],TCC_EA_RDREQ_GMI_CREDIT_STALL[7],TCC_EA_RDREQ[8],TCC_EA_RDREQ_32B[8],TCC_EA_RDREQ_DRAM_CREDIT_STALL[8],TCC_EA_RDREQ_GMI_CREDIT_STALL[8],TCC_EA_RDREQ[9],TCC_EA_RDREQ_32B[9],TCC_EA_RDREQ_DRAM_CREDIT_STALL[9],TCC_EA_RDREQ_GMI_CREDIT_STALL[9],TCC_EA_RDREQ[10],TCC_EA_RDREQ_32B[10],TCC_EA_RDREQ_DRAM_CREDIT_STALL[10],TCC_EA_RDREQ_GMI_CREDIT_STALL[10],TCC_EA_RDREQ[11],TCC_EA_RDREQ_32B[11],TCC_EA_RDREQ_DRAM_CREDIT_STALL[11],TCC_EA_RDREQ_GMI_CREDIT_STALL[11],TCC_EA_RDREQ[12],TCC_EA_RDREQ_32B[12],TCC_EA_RDREQ_DRAM_CREDIT_STALL[12],TCC_EA_RDREQ_GMI_CREDIT_STALL[12],TCC_EA_RDREQ[13],TCC_EA_RDREQ_32B[13],TCC_EA_RDREQ_DRAM_CREDIT_STALL[13],TCC_EA_RDREQ_GMI_CREDIT_STALL[13],TCC_EA_RDREQ[14],TCC_EA_RDREQ_32B[14],TCC_EA_RDREQ_DRAM_CREDIT_STALL[14],TCC_EA_RDREQ_GMI_CREDIT_STALL[14],TCC_EA_RDREQ[15],TCC_EA_RDREQ_32B[15],TCC_EA_RDREQ_DRAM_CREDIT_STALL[15],TCC_EA_RDREQ_GMI_CREDIT_STALL[15],TCC_EA_RDREQ[16],TCC_EA_RDREQ_32B[16],TCC_EA_RDREQ_DRAM_CREDIT_STALL[16],TCC_EA_RDREQ_GMI_CREDIT_STALL[16],TCC_EA_RDREQ[17],TCC_EA_RDREQ_32B[17],TCC_EA_RDREQ_DRAM_CREDIT_STALL[17],TCC_EA_RDREQ_GMI_CREDIT_STALL[17],TCC_EA_RDREQ[18],TCC_EA_RDREQ_32B[18],TCC_EA_RDREQ_DRAM_CREDIT_STALL[18],TCC_EA_RDREQ_GMI_CREDIT_STALL[18],TCC_EA_RDREQ[19],TCC_EA_RDREQ_32B[19],TCC_EA_RDREQ_DRAM_CREDIT_STALL[19],TCC_EA_RDREQ_GMI_CREDIT_STALL[19],TCC_EA_RDREQ[20],TCC_EA_RDREQ_32B[20],TCC_EA_RDREQ_DRAM_CREDIT_STALL[20],TCC_EA_RDREQ_GMI_CREDIT_STALL[20],TCC_EA_RDREQ[21],TCC_EA_RDREQ_32B[21],TCC_EA_RDREQ_DRAM_CREDIT_STALL[21],TCC_EA_RDREQ_GMI_CREDIT_STALL[21],TCC_EA_RDREQ[22],TCC_EA_RDREQ_32B[22],TCC_EA_RDREQ_DRAM_CREDIT_STALL[22],TCC_EA_RDREQ_GMI_CREDIT_STALL[22],TCC_EA_RDREQ[23],TCC_EA_RDREQ_32B[23],TCC_EA_RDREQ_DRAM_CREDIT_STALL[23],TCC_EA_RDREQ_GMI_CREDIT_STALL[23],TCC_EA_RDREQ[24],TCC_EA_RDREQ_32B[24],TCC_EA_RDREQ_DRAM_CREDIT_STALL[24],TCC_EA_RDREQ_GMI_CREDIT_STALL[24],TCC_EA_RDREQ[25],TCC_EA_RDREQ_32B[25],TCC_EA_RDREQ_DRAM_CREDIT_STALL[25],TCC_EA_RDREQ_GMI_CREDIT_STALL[25],TCC_EA_RDREQ[26],TCC_EA_RDREQ_32B[26],TCC_EA_RDREQ_DRAM_CREDIT_STALL[26],TCC_EA_RDREQ_GMI_CREDIT_STALL[26],TCC_EA_RDREQ[27],TCC_EA_RDREQ_32B[27],TCC_EA_RDREQ_DRAM_CREDIT_STALL[27],TCC_EA_RDREQ_GMI_CREDIT_STALL[27],TCC_EA_RDREQ[28],TCC_EA_RDREQ_32B[28],TCC_EA_RDREQ_DRAM_CREDIT_STALL[28],TCC_EA_RDREQ_GMI_CREDIT_STALL[28],TCC_EA_RDREQ[29],TCC_EA_RDREQ_32B[29],TCC_EA_RDREQ_DRAM_CREDIT_STALL[29],TCC_EA_RDREQ_GMI_CREDIT_STALL[29],TCC_EA_RDREQ[30],TCC_EA_RDREQ_32B[30],TCC_EA_RDREQ_DRAM_CREDIT_STALL[30],TCC_EA_RDREQ_GMI_CREDIT_STALL[30],TCC_EA_RDREQ[31],TCC_EA_RDREQ_32B[31],TCC_EA_RDREQ_DRAM_CREDIT_STALL[31],TCC_EA_RDREQ_GMI_CREDIT_STALL[31],wave_size_13,obj_13,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,GRBM_COUNT,GRBM_GUI_ACTIVE,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TD_TCP_STALL_CYCLES_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TA_TA_BUSY_sum,TA_BUFFER_WAVEFRONTS_sum,TD_TD_BUSY_sum,TD_TC_STALL_sum,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TCC_CYCLE_sum,TCC_BUSY_sum,TCC_PROBE_sum,TCC_PROBE_ALL_sum,wave_size_14,obj_14,TCC_HIT[0],TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_HIT[1],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_HIT[2],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_HIT[3],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_HIT[4],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_HIT[5],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_HIT[6],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_HIT[7],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_HIT[8],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_HIT[9],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_HIT[10],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_HIT[11],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_HIT[12],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_HIT[13],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_HIT[14],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_HIT[15],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_HIT[16],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_HIT[17],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_HIT[18],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_HIT[19],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_HIT[20],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_HIT[21],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_HIT[22],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_HIT[23],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_HIT[24],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_HIT[25],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_HIT[26],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_HIT[27],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_HIT[28],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_HIT[29],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_HIT[30],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_HIT[31],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],wave_size_15,obj_15,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS_SMEM,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TA_BUFFER_COALESCED_READ_CYCLES_sum,TA_BUFFER_COALESCED_WRITE_CYCLES_sum,SPI_RA_RES_STALL_CSN,SPI_RA_TMP_STALL_CSN,CPC_CPC_UTCL2IU_BUSY,CPC_CPC_UTCL2IU_IDLE,CPF_CMP_UTCL1_STALL_ON_TRANSLATION,TCC_READ_sum,TCC_WRITE_sum,TCC_ATOMIC_sum,TCC_WRITEBACK_sum,wave_size_16,obj_16,TCC_ATOMIC[0],TCC_CYCLE[0],TCC_EA_ATOMIC[0],TCC_EA_ATOMIC_LEVEL[0],TCC_ATOMIC[1],TCC_CYCLE[1],TCC_EA_ATOMIC[1],TCC_EA_ATOMIC_LEVEL[1],TCC_ATOMIC[2],TCC_CYCLE[2],TCC_EA_ATOMIC[2],TCC_EA_ATOMIC_LEVEL[2],TCC_ATOMIC[3],TCC_CYCLE[3],TCC_EA_ATOMIC[3],TCC_EA_ATOMIC_LEVEL[3],TCC_ATOMIC[4],TCC_CYCLE[4],TCC_EA_ATOMIC[4],TCC_EA_ATOMIC_LEVEL[4],TCC_ATOMIC[5],TCC_CYCLE[5],TCC_EA_ATOMIC[5],TCC_EA_ATOMIC_LEVEL[5],TCC_ATOMIC[6],TCC_CYCLE[6],TCC_EA_ATOMIC[6],TCC_EA_ATOMIC_LEVEL[6],TCC_ATOMIC[7],TCC_CYCLE[7],TCC_EA_ATOMIC[7],TCC_EA_ATOMIC_LEVEL[7],TCC_ATOMIC[8],TCC_CYCLE[8],TCC_EA_ATOMIC[8],TCC_EA_ATOMIC_LEVEL[8],TCC_ATOMIC[9],TCC_CYCLE[9],TCC_EA_ATOMIC[9],TCC_EA_ATOMIC_LEVEL[9],TCC_ATOMIC[10],TCC_CYCLE[10],TCC_EA_ATOMIC[10],TCC_EA_ATOMIC_LEVEL[10],TCC_ATOMIC[11],TCC_CYCLE[11],TCC_EA_ATOMIC[11],TCC_EA_ATOMIC_LEVEL[11],TCC_ATOMIC[12],TCC_CYCLE[12],TCC_EA_ATOMIC[12],TCC_EA_ATOMIC_LEVEL[12],TCC_ATOMIC[13],TCC_CYCLE[13],TCC_EA_ATOMIC[13],TCC_EA_ATOMIC_LEVEL[13],TCC_ATOMIC[14],TCC_CYCLE[14],TCC_EA_ATOMIC[14],TCC_EA_ATOMIC_LEVEL[14],TCC_ATOMIC[15],TCC_CYCLE[15],TCC_EA_ATOMIC[15],TCC_EA_ATOMIC_LEVEL[15],TCC_ATOMIC[16],TCC_CYCLE[16],TCC_EA_ATOMIC[16],TCC_EA_ATOMIC_LEVEL[16],TCC_ATOMIC[17],TCC_CYCLE[17],TCC_EA_ATOMIC[17],TCC_EA_ATOMIC_LEVEL[17],TCC_ATOMIC[18],TCC_CYCLE[18],TCC_EA_ATOMIC[18],TCC_EA_ATOMIC_LEVEL[18],TCC_ATOMIC[19],TCC_CYCLE[19],TCC_EA_ATOMIC[19],TCC_EA_ATOMIC_LEVEL[19],TCC_ATOMIC[20],TCC_CYCLE[20],TCC_EA_ATOMIC[20],TCC_EA_ATOMIC_LEVEL[20],TCC_ATOMIC[21],TCC_CYCLE[21],TCC_EA_ATOMIC[21],TCC_EA_ATOMIC_LEVEL[21],TCC_ATOMIC[22],TCC_CYCLE[22],TCC_EA_ATOMIC[22],TCC_EA_ATOMIC_LEVEL[22],TCC_ATOMIC[23],TCC_CYCLE[23],TCC_EA_ATOMIC[23],TCC_EA_ATOMIC_LEVEL[23],TCC_ATOMIC[24],TCC_CYCLE[24],TCC_EA_ATOMIC[24],TCC_EA_ATOMIC_LEVEL[24],TCC_ATOMIC[25],TCC_CYCLE[25],TCC_EA_ATOMIC[25],TCC_EA_ATOMIC_LEVEL[25],TCC_ATOMIC[26],TCC_CYCLE[26],TCC_EA_ATOMIC[26],TCC_EA_ATOMIC_LEVEL[26],TCC_ATOMIC[27],TCC_CYCLE[27],TCC_EA_ATOMIC[27],TCC_EA_ATOMIC_LEVEL[27],TCC_ATOMIC[28],TCC_CYCLE[28],TCC_EA_ATOMIC[28],TCC_EA_ATOMIC_LEVEL[28],TCC_ATOMIC[29],TCC_CYCLE[29],TCC_EA_ATOMIC[29],TCC_EA_ATOMIC_LEVEL[29],TCC_ATOMIC[30],TCC_CYCLE[30],TCC_EA_ATOMIC[30],TCC_EA_ATOMIC_LEVEL[30],TCC_ATOMIC[31],TCC_CYCLE[31],TCC_EA_ATOMIC[31],TCC_EA_ATOMIC_LEVEL[31],Start_Timestamp,End_Timestamp
0,"vecCopy(double*, double*, double*, int, int) ",2,1048576,256,0,0,8,8,16,64,0x7fbee0ebce80,0,3281431,4096,4096,0,3323455,4096,4096,0,3610299,4096,4096,0,3330766,4096,4096,0,4626328,4096,4096,0,3431123,4096,4096,0,3312839,4096,4096,0,3209327,4096,4096,0,3761883,4096,4096,0,3503116,4096,4096,0,2671893,4096,4096,0,3707565,4096,4096,0,3667941,4096,4096,0,4381605,4096,4096,0,3745260,4096,4096,0,3404165,4096,4096,0,4323022,4096,4096,0,4376890,4096,4096,0,4289593,4096,4096,0,3864395,4096,4096,0,4850507,4096,4096,0,5150888,4096,4096,0,2995212,4096,4096,0,4037922,4096,4096,0,3312088,4096,4096,0,3114594,4096,4096,0,3801924,4096,4096,0,3292969,4096,4096,0,3766883,4096,4096,0,3903047,4096,4096,0,2913715,4096,4096,0,3274957,4096,4096,64,0x7f61594a4e80,8192,0,4096,8192,0,4096,8336,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,64,0x7ff400fbce80,131072.0,131072.0,0.0,2637786.0,0.0,0.0,126388538.0,59373237.0,64,0x7f1576574e80,0.0,64,0x7f053a9c6e80,1640136,360448,163840,0,0,180224,114688,0,71271618.0,174875302.0,73282093.0,131072.0,0.0,590741.0,0,0,25975,48324.0,0.0,0.0,48324.0,64,0x7fb03e70ee80,5697,0,0,2127001,6693,0,0,2192177,2790,0,0,1855709,4293,0,0,1930108,4225,0,0,2035821,3014,0,0,1864839,3214,0,0,1887713,4131,0,0,2002790,4140,0,0,2042627,5070,0,0,2140427,3816,0,0,1928675,2948,0,0,1861098,4249,0,0,2030887,4539,0,0,2055510,2954,0,0,1878936,3640,0,0,1965918,4576,0,0,2067831,4421,0,0,2026848,4039,0,0,1984617,3995,0,0,1963217,2383,0,0,1912640,6068,0,0,2169865,3413,0,0,1944408,4055,0,0,1985682,4710,0,0,2000083,3400,0,0,1909255,4784,0,0,2063792,4551,0,0,2012693,3662,0,0,1990790,6304,0,0,2129694,2745,0,0,1930373,4260,0,0,2049243,64,0x7fccb11dce80,1048576,0,0,0,0,0,131072,0.0,0.0,0.0,0.0,16384,0,86477.0,44595.0,131111.0,0.0,64,0x7f12603a8e80,32768,0,0,0,16384,16384,393216,23300559,960.0,513990.0,0.0,524288.0,967132.0,32768.0,0,0,0,17323,131072.0,131072.0,0.0,131072.0,64,0x7f99503e8e80,0,0,0,16384,0,0,0,0,0.0,0.0,0.0,0.0,16384.0,0.0,0,81920,0.0,0.0,87637.0,163225.0,64,0x7f7a826d2e80,188213,0,0,65536,64048,48,1440,32768,2097152.0,2097152.0,1048576.0,1048576.0,0.0,0.0,0.0,16384.0,14776,31160,9513,588,0,46394,262676.0,0.0,188.0,262488.0,64,0x7f59e1828e80,0,0,192,0,65536,64397,48,1485,31066,0.0,0.0,0.0,32768.0,0.0,0.0,0.0,32768.0,4096,16384,512,46591,1668,0,48.0,196.0,0.0,262288.0,64,0x7fa08ce06e80,32768,32768,16384,16384,65536,49152,11534336,65536,131072.0,0.0,0.0,0.0,32768.0,16384.0,0,0,131272.0,0.0,392.0,131271.0,64,0x7f5ac25dce80,4096,0,4574,0,4096,0,0,0,4097,0,0,0,4096,0,423,0,4096,0,0,0,4262,0,370,0,4096,0,0,0,4096,0,0,0,4096,0,22,0,4096,0,0,0,4096,0,0,0,4147,0,3367,0,4096,0,296,0,4216,0,565,0,4096,0,67,0,4096,0,200,0,4096,0,204,0,4096,0,7844,0,4096,0,0,0,4096,0,482,0,4096,0,0,0,4096,0,174,0,4096,0,0,0,4096,0,1116,0,4096,0,0,0,4096,0,141,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4144,0,0,0,64,0x7feeee8a0e80,385944,235539,3439470,16384,25635618,144,48,0,48242,48242,3885449.0,3056711.0,7549.0,1030357.0,2121509.0,0.0,3047716.0,2736566.0,384231,245474,48242,0,48242,0,1543744.0,961468.0,0.0,0.0,64,0x7fbe159cee80,0,8192,4096,8192,0,8192,4096,8192,141,8195,4240,8336,0,8192,4096,8192,47,8193,4144,8240,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8240,4144,8240,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8312,4216,8312,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8240,4144,8240,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,64,0x7fe8bd4aae80,32768,0,16384,16384,32768,49152,0,65536,0.0,0.0,120.0,524288.0,0.0,0.0,0,0,913,46112,0,131545.0,131072.0,0.0,131104.0,64,0x7fe3f52ece80,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,0,48463,0,0,5098380358731,5098380382891
1,"vecCopy(double*, double*, double*, int, int) ",2,1048576,256,0,0,8,8,16,64,0x7fbee0ebce80,0,3735952,2718,2718,0,3162739,2726,2726,0,3395500,2672,2672,0,3610363,2710,2710,0,4248466,2714,2714,0,3361117,2714,2714,0,2968717,2674,2674,0,3306507,2724,2724,0,4302924,2710,2710,0,3986853,2688,2688,0,4263945,2686,2686,0,4432313,2726,2726,0,3391798,2756,2756,0,4055235,2694,2694,0,4808505,2696,2696,0,4037969,2684,2684,0,5099695,2728,2728,0,3380662,2704,2704,0,3499471,2680,2680,0,3342038,2686,2686,0,3318426,2712,2712,0,3757898,2749,2749,0,3902831,2676,2676,0,4221354,2682,2682,0,3130065,2716,2716,0,5052455,2719,2719,0,3516329,2708,2708,0,3144520,2710,2710,0,3197589,2716,2716,0,3100365,2720,2720,0,3162877,2688,2688,0,3003154,2708,2708,64,0x7f61594a4e80,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,64,0x7ff400fbce80,131072.0,131072.0,0.0,2695525.0,0.0,0.0,123559489.0,45415964.0,64,0x7f1576574e80,0.0,64,0x7f053a9c6e80,1099737,360448,163840,0,0,180224,114688,0,71932210.0,187264746.0,74123743.0,131072.0,0.0,670292.0,0,0,25659,84453.0,0.0,0.0,84453.0,64,0x7fb03e70ee80,3549,0,0,1646993,3501,0,0,1576195,4473,0,0,1684021,4431,0,0,1629826,1949,0,0,1397836,1557,0,0,1375954,3245,0,0,1606179,3671,0,0,1596216,1514,0,0,1449436,936,0,0,1263085,4619,0,0,1701849,2843,0,0,1469849,1678,0,0,1422117,1644,0,0,1381359,2148,0,0,1451764,3284,0,0,1490060,2016,0,0,1449656,1888,0,0,1414216,4025,0,0,1605167,4411,0,0,1626699,1973,0,0,1381757,4310,0,0,1698115,3773,0,0,1592368,3570,0,0,1468371,2910,0,0,1468859,2576,0,0,1435176,5240,0,0,1696449,4119,0,0,1628773,3257,0,0,1595276,3192,0,0,1532314,5403,0,0,1776311,3861,0,0,1549842,64,0x7fccb11dce80,1048576,0,0,0,0,0,131072,0.0,0.0,0.0,0.0,16384,0,86567.0,0.0,131110.0,0.0,64,0x7f12603a8e80,32768,0,0,0,16384,16384,393216,22888575,960.0,513972.0,0.0,524288.0,954692.0,32768.0,0,0,0,13498,86440.0,86440.0,0.0,86440.0,64,0x7f99503e8e80,0,0,0,16384,0,0,0,0,0.0,0.0,0.0,0.0,16384.0,0.0,0,81920,0.0,0.0,71407.0,134970.0,64,0x7f7a826d2e80,414375,0,0,65536,62560,96,2880,32768,2097152.0,2097152.0,1048576.0,1048576.0,0.0,0.0,0.0,16384.0,14739,31123,22868,6495,0,44538,262927.0,0.0,94.0,262833.0,64,0x7f59e1828e80,0,0,48,0,65536,65536,0,0,30396,0.0,0.0,0.0,32768.0,0.0,0.0,0.0,32768.0,4096,16384,457,41882,1686,0,48.0,133.0,0.0,262144.0,64,0x7fa08ce06e80,32768,32768,16384,16384,65536,49152,11534336,65536,131072.0,0.0,0.0,0.0,32768.0,16384.0,0,0,131253.0,0.0,360.0,131252.0,64,0x7f5ac25dce80,4096,0,4855,0,4096,0,905,0,4097,0,1755,0,4096,0,831,0,4096,0,3044,0,4298,0,1231,0,4096,0,1854,0,4096,0,3608,0,4096,0,4547,0,4096,0,2319,0,4096,0,157,0,4144,0,2066,0,4096,0,1684,0,4216,0,69,0,4096,0,2354,0,4096,0,927,0,4096,0,1623,0,4096,0,1783,0,4096,0,1689,0,4096,0,2497,0,4096,0,801,0,4096,0,3042,0,4096,0,1824,0,4096,0,977,0,4096,0,3154,0,4097,0,4351,0,4096,0,2895,0,4096,0,3281,0,4096,0,5806,0,4096,0,178,0,4097,0,460,0,4147,0,539,0,64,0x7feeee8a0e80,341800,231130,3368316,16384,24402099,0,48,0,42724,42724,3755815.0,3067865.0,7098.0,872055.0,2102423.0,0.0,3058795.0,2747887.0,341792,240439,42724,0,42724,0,1367168.0,806160.0,0.0,0.0,64,0x7fbe159cee80,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,47,8195,4146,8242,0,8192,4096,8192,0,8193,4097,8193,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8242,4146,8242,0,8193,4097,8193,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8312,4216,8312,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8240,4144,8240,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,64,0x7fe8bd4aae80,32768,0,16384,16384,32768,49152,0,65536,0.0,0.0,120.0,524288.0,0.0,0.0,0,0,6603,37837,0,131397.0,131072.0,0.0,87379.0,64,0x7fe3f52ece80,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,0,42879,0,0,5098380583371,5098380602411
2,"vecCopy(double*, double*, double*, int, int) ",2,1048576,256,0,0,8,8,16,64,0x7fbee0ebce80,0,5008125,2714,2714,0,3981532,2715,2715,0,3459013,2694,2694,0,3718364,2668,2668,0,4788996,2678,2678,0,4372087,2712,2712,0,3717283,2696,2696,0,4274458,2684,2684,0,4276981,2708,2708,0,4745010,2666,2666,0,4393213,2694,2694,0,4755129,2710,2710,0,3652745,2704,2704,0,4231123,2675,2675,0,3130558,2696,2696,0,3537080,2644,2644,0,4681340,2688,2688,0,4965457,2704,2704,0,4550452,2696,2696,0,3360197,2690,2690,0,4134566,2712,2712,0,3696774,2732,2732,0,3837525,2704,2704,0,3630013,2670,2670,0,3795034,2684,2684,0,4368045,2689,2689,0,3195576,2736,2736,0,3371175,2666,2666,0,5039325,2720,2720,0,4093730,2699,2699,0,4103164,2726,2726,0,3186168,2666,2666,64,0x7f61594a4e80,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,64,0x7ff400fbce80,131072.0,131072.0,0.0,2676669.0,0.0,0.0,101362388.0,45202284.0,64,0x7f1576574e80,0.0,64,0x7f053a9c6e80,1126322,360448,163840,0,0,180224,114688,0,71792379.0,204934163.0,78430153.0,131072.0,0.0,588551.0,0,0,24761,73625.0,0.0,0.0,73625.0,64,0x7fb03e70ee80,5017,0,0,1773105,3501,0,0,1530954,3667,0,0,1567841,4265,0,0,1602032,3922,0,0,1606640,2754,0,0,1492207,3340,0,0,1551560,3316,0,0,1506698,3136,0,0,1550237,3058,0,0,1483541,4782,0,0,1712373,3639,0,0,1584225,3685,0,0,1616379,3409,0,0,1508202,2727,0,0,1454097,3537,0,0,1519629,3553,0,0,1541431,3056,0,0,1508928,3548,0,0,1545228,3580,0,0,1523942,4071,0,0,1610403,4630,0,0,1791848,3262,0,0,1547145,3302,0,0,1521258,3890,0,0,1610324,3435,0,0,1626014,3710,0,0,1608380,4367,0,0,1608682,2799,0,0,1530027,4659,0,0,1675895,2802,0,0,1467517,3345,0,0,1462709,64,0x7fccb11dce80,1048576,0,0,0,0,0,131072,0.0,0.0,0.0,0.0,16384,0,86834.0,0.0,131112.0,0.0,64,0x7f12603a8e80,32768,0,0,0,16384,16384,393216,22184134,960.0,513934.0,0.0,524288.0,914743.0,32768.0,0,0,0,13936,86367.0,86367.0,0.0,86367.0,64,0x7f99503e8e80,0,0,0,16384,0,0,0,0,0.0,0.0,0.0,0.0,16384.0,0.0,0,81920,0.0,0.0,29116.0,101500.0,64,0x7f7a826d2e80,211767,0,0,65536,64048,48,1440,32768,2097152.0,2097152.0,1048576.0,1048576.0,0.0,0.0,0.0,16384.0,13059,29443,8528,3232,0,41991,262539.0,0.0,47.0,262492.0,64,0x7f59e1828e80,0,0,48,0,65536,65536,0,0,29882,0.0,0.0,0.0,32768.0,0.0,0.0,0.0,32768.0,4096,16384,457,41769,1792,0,48.0,212.0,0.0,262144.0,64,0x7fa08ce06e80,32768,32768,16384,16384,65536,49152,11534336,65536,131072.0,0.0,0.0,0.0,32768.0,16384.0,0,0,131311.0,0.0,476.0,131310.0,64,0x7f5ac25dce80,4096,0,865,0,4096,0,718,0,4097,0,1678,0,4096,0,549,0,4096,0,2389,0,4317,0,3425,0,4096,0,33,0,4096,0,0,0,4096,0,3,0,4096,0,913,0,4096,0,34,0,4144,0,0,0,4096,0,242,0,4216,0,20,0,4096,0,249,0,4096,0,0,0,4096,0,153,0,4096,0,2368,0,4096,0,903,0,4096,0,3459,0,4096,0,185,0,4096,0,766,0,4096,0,265,0,4096,0,0,0,4096,0,655,0,4097,0,1676,0,4096,0,105,0,4096,0,0,0,4096,0,1092,0,4096,0,723,0,4097,0,959,0,4147,0,721,0,64,0x7feeee8a0e80,341680,231778,3375677,16384,24308672,0,48,0,42709,42709,3766035.0,3089517.0,7217.0,979355.0,2064180.0,0.0,3080035.0,2768607.0,341672,241307,42709,0,42709,0,1366688.0,811410.0,0.0,0.0,64,0x7fbe159cee80,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,47,8195,4146,8242,0,8192,4096,8192,0,8193,4097,8193,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8242,4146,8242,0,8193,4097,8193,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8312,4216,8312,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8240,4144,8240,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,64,0x7fe8bd4aae80,32768,0,16384,16384,32768,49152,0,65536,0.0,0.0,120.0,524288.0,0.0,0.0,0,0,3652,37535,0,131410.0,131072.0,0.0,86726.0,64,0x7fe3f52ece80,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,0,43531,0,0,5098380623051,5098380642091