Dispatch_ID,Kernel_Name,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,wave_size,obj,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SQ_INSTS_SMEM_NORM,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_CC_ATOMIC_REQ_sum,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_NORMAL_WRITEBACK_sum,TCC_ALL_TC_OP_WB_WRITEBACK_sum,TCC_NORMAL_EVICT_sum,TCC_ALL_TC_OP_INV_EVICT_sum,wave_size_1,obj_1,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SQ_THREAD_CYCLES_VALU,SQ_IFETCH,TCP_TCC_WRITE_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_NC_READ_REQ_sum,TA_FLAT_WAVEFRONTS_sum,TA_FLAT_READ_WAVEFRONTS_sum,SPI_RA_BAR_CU_FULL_CSN,SPI_RA_TGLIM_CU_FULL_CSN,TCC_EA_RDREQ_sum,TCC_EA_RDREQ_32B_sum,TCC_EA_RD_UNCACHED_32B_sum,TCC_EA_RDREQ_DRAM_sum,wave_size_2,obj_2,TCC_RW_REQ[0],TCC_TOO_MANY_EA_WRREQS_STALL[0],TCC_WRITE[0],TCC_RW_REQ[1],TCC_TOO_MANY_EA_WRREQS_STALL[1],TCC_WRITE[1],TCC_RW_REQ[2],TCC_TOO_MANY_EA_WRREQS_STALL[2],TCC_WRITE[2],TCC_RW_REQ[3],TCC_TOO_MANY_EA_WRREQS_STALL[3],TCC_WRITE[3],TCC_RW_REQ[4],TCC_TOO_MANY_EA_WRREQS_STALL[4],TCC_WRITE[4],TCC_RW_REQ[5],TCC_TOO_MANY_EA_WRREQS_STALL[5],TCC_WRITE[5],TCC_RW_REQ[6],TCC_TOO_MANY_EA_WRREQS_STALL[6],TCC_WRITE[6],TCC_RW_REQ[7],TCC_TOO_MANY_EA_WRREQS_STALL[7],TCC_WRITE[7],TCC_RW_REQ[8],TCC_TOO_MANY_EA_WRREQS_STALL[8],TCC_WRITE[8],TCC_RW_REQ[9],TCC_TOO_MANY_EA_WRREQS_STALL[9],TCC_WRITE[9],TCC_RW_REQ[10],TCC_TOO_MANY_EA_WRREQS_STALL[10],TCC_WRITE[10],TCC_RW_REQ[11],TCC_TOO_MANY_EA_WRREQS_STALL[11],TCC_WRITE[11],TCC_RW_REQ[12],TCC_TOO_MANY_EA_WRREQS_STALL[12],TCC_WRITE[12],TCC_RW_REQ[13],TCC_TOO_MANY_EA_WRREQS_STALL[13],TCC_WRITE[13],TCC_RW_REQ[14],TCC_TOO_MANY_EA_WRREQS_STALL[14],TCC_WRITE[14],TCC_RW_REQ[15],TCC_TOO_MANY_EA_WRREQS_STALL[15],TCC_WRITE[15],TCC_RW_REQ[16],TCC_TOO_MANY_EA_WRREQS_STALL[16],TCC_WRITE[16],TCC_RW_REQ[17],TCC_TOO_MANY_EA_WRREQS_STALL[17],TCC_WRITE[17],TCC_RW_REQ[18],TCC_TOO_MANY_EA_WRREQS_STALL[18],TCC_WRITE[18],TCC_RW_REQ[19],TCC_TOO_MANY_EA_WRREQS_STALL[19],TCC_WRITE[19],TCC_RW_REQ[20],TCC_TOO_MANY_EA_WRREQS_STALL[20],TCC_WRITE[20],TCC_RW_REQ[21],TCC_TOO_MANY_EA_WRREQS_STALL[21],TCC_WRITE[21],TCC_RW_REQ[22],TCC_TOO_MANY_EA_WRREQS_STALL[22],TCC_WRITE[22],TCC_RW_REQ[23],TCC_TOO_MANY_EA_WRREQS_STALL[23],TCC_WRITE[23],TCC_RW_REQ[24],TCC_TOO_MANY_EA_WRREQS_STALL[24],TCC_WRITE[24],TCC_RW_REQ[25],TCC_TOO_MANY_EA_WRREQS_STALL[25],TCC_WRITE[25],TCC_RW_REQ[26],TCC_TOO_MANY_EA_WRREQS_STALL[26],TCC_WRITE[26],TCC_RW_REQ[27],TCC_TOO_MANY_EA_WRREQS_STALL[27],TCC_WRITE[27],TCC_RW_REQ[28],TCC_TOO_MANY_EA_WRREQS_STALL[28],TCC_WRITE[28],TCC_RW_REQ[29],TCC_TOO_MANY_EA_WRREQS_STALL[29],TCC_WRITE[29],TCC_RW_REQ[30],TCC_TOO_MANY_EA_WRREQS_STALL[30],TCC_WRITE[30],TCC_RW_REQ[31],TCC_TOO_MANY_EA_WRREQS_STALL[31],TCC_WRITE[31],wave_size_3,obj_3,TCC_HIT[0],TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_HIT[1],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_HIT[2],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_HIT[3],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_HIT[4],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_HIT[5],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_HIT[6],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_HIT[7],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_HIT[8],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_HIT[9],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_HIT[10],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_HIT[11],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_HIT[12],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_HIT[13],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_HIT[14],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_HIT[15],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_HIT[16],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_HIT[17],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_HIT[18],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_HIT[19],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_HIT[20],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_HIT[21],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_HIT[22],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_HIT[23],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_HIT[24],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_HIT[25],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_HIT[26],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_HIT[27],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_HIT[28],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_HIT[29],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_HIT[30],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_HIT[31],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],wave_size_4,obj_4,TCC_EA_RDREQ_IO_CREDIT_STALL[0],TCC_EA_RDREQ_LEVEL[0],TCC_EA_WRREQ[0],TCC_EA_WRREQ_64B[0],TCC_EA_RDREQ_IO_CREDIT_STALL[1],TCC_EA_RDREQ_LEVEL[1],TCC_EA_WRREQ[1],TCC_EA_WRREQ_64B[1],TCC_EA_RDREQ_IO_CREDIT_STALL[2],TCC_EA_RDREQ_LEVEL[2],TCC_EA_WRREQ[2],TCC_EA_WRREQ_64B[2],TCC_EA_RDREQ_IO_CREDIT_STALL[3],TCC_EA_RDREQ_LEVEL[3],TCC_EA_WRREQ[3],TCC_EA_WRREQ_64B[3],TCC_EA_RDREQ_IO_CREDIT_STALL[4],TCC_EA_RDREQ_LEVEL[4],TCC_EA_WRREQ[4],TCC_EA_WRREQ_64B[4],TCC_EA_RDREQ_IO_CREDIT_STALL[5],TCC_EA_RDREQ_LEVEL[5],TCC_EA_WRREQ[5],TCC_EA_WRREQ_64B[5],TCC_EA_RDREQ_IO_CREDIT_STALL[6],TCC_EA_RDREQ_LEVEL[6],TCC_EA_WRREQ[6],TCC_EA_WRREQ_64B[6],TCC_EA_RDREQ_IO_CREDIT_STALL[7],TCC_EA_RDREQ_LEVEL[7],TCC_EA_WRREQ[7],TCC_EA_WRREQ_64B[7],TCC_EA_RDREQ_IO_CREDIT_STALL[8],TCC_EA_RDREQ_LEVEL[8],TCC_EA_WRREQ[8],TCC_EA_WRREQ_64B[8],TCC_EA_RDREQ_IO_CREDIT_STALL[9],TCC_EA_RDREQ_LEVEL[9],TCC_EA_WRREQ[9],TCC_EA_WRREQ_64B[9],TCC_EA_RDREQ_IO_CREDIT_STALL[10],TCC_EA_RDREQ_LEVEL[10],TCC_EA_WRREQ[10],TCC_EA_WRREQ_64B[10],TCC_EA_RDREQ_IO_CREDIT_STALL[11],TCC_EA_RDREQ_LEVEL[11],TCC_EA_WRREQ[11],TCC_EA_WRREQ_64B[11],TCC_EA_RDREQ_IO_CREDIT_STALL[12],TCC_EA_RDREQ_LEVEL[12],TCC_EA_WRREQ[12],TCC_EA_WRREQ_64B[12],TCC_EA_RDREQ_IO_CREDIT_STALL[13],TCC_EA_RDREQ_LEVEL[13],TCC_EA_WRREQ[13],TCC_EA_WRREQ_64B[13],TCC_EA_RDREQ_IO_CREDIT_STALL[14],TCC_EA_RDREQ_LEVEL[14],TCC_EA_WRREQ[14],TCC_EA_WRREQ_64B[14],TCC_EA_RDREQ_IO_CREDIT_STALL[15],TCC_EA_RDREQ_LEVEL[15],TCC_EA_WRREQ[15],TCC_EA_WRREQ_64B[15],TCC_EA_RDREQ_IO_CREDIT_STALL[16],TCC_EA_RDREQ_LEVEL[16],TCC_EA_WRREQ[16],TCC_EA_WRREQ_64B[16],TCC_EA_RDREQ_IO_CREDIT_STALL[17],TCC_EA_RDREQ_LEVEL[17],TCC_EA_WRREQ[17],TCC_EA_WRREQ_64B[17],TCC_EA_RDREQ_IO_CREDIT_STALL[18],TCC_EA_RDREQ_LEVEL[18],TCC_EA_WRREQ[18],TCC_EA_WRREQ_64B[18],TCC_EA_RDREQ_IO_CREDIT_STALL[19],TCC_EA_RDREQ_LEVEL[19],TCC_EA_WRREQ[19],TCC_EA_WRREQ_64B[19],TCC_EA_RDREQ_IO_CREDIT_STALL[20],TCC_EA_RDREQ_LEVEL[20],TCC_EA_WRREQ[20],TCC_EA_WRREQ_64B[20],TCC_EA_RDREQ_IO_CREDIT_STALL[21],TCC_EA_RDREQ_LEVEL[21],TCC_EA_WRREQ[21],TCC_EA_WRREQ_64B[21],TCC_EA_RDREQ_IO_CREDIT_STALL[22],TCC_EA_RDREQ_LEVEL[22],TCC_EA_WRREQ[22],TCC_EA_WRREQ_64B[22],TCC_EA_RDREQ_IO_CREDIT_STALL[23],TCC_EA_RDREQ_LEVEL[23],TCC_EA_WRREQ[23],TCC_EA_WRREQ_64B[23],TCC_EA_RDREQ_IO_CREDIT_STALL[24],TCC_EA_RDREQ_LEVEL[24],TCC_EA_WRREQ[24],TCC_EA_WRREQ_64B[24],TCC_EA_RDREQ_IO_CREDIT_STALL[25],TCC_EA_RDREQ_LEVEL[25],TCC_EA_WRREQ[25],TCC_EA_WRREQ_64B[25],TCC_EA_RDREQ_IO_CREDIT_STALL[26],TCC_EA_RDREQ_LEVEL[26],TCC_EA_WRREQ[26],TCC_EA_WRREQ_64B[26],TCC_EA_RDREQ_IO_CREDIT_STALL[27],TCC_EA_RDREQ_LEVEL[27],TCC_EA_WRREQ[27],TCC_EA_WRREQ_64B[27],TCC_EA_RDREQ_IO_CREDIT_STALL[28],TCC_EA_RDREQ_LEVEL[28],TCC_EA_WRREQ[28],TCC_EA_WRREQ_64B[28],TCC_EA_RDREQ_IO_CREDIT_STALL[29],TCC_EA_RDREQ_LEVEL[29],TCC_EA_WRREQ[29],TCC_EA_WRREQ_64B[29],TCC_EA_RDREQ_IO_CREDIT_STALL[30],TCC_EA_RDREQ_LEVEL[30],TCC_EA_WRREQ[30],TCC_EA_WRREQ_64B[30],TCC_EA_RDREQ_IO_CREDIT_STALL[31],TCC_EA_RDREQ_LEVEL[31],TCC_EA_WRREQ[31],TCC_EA_WRREQ_64B[31],wave_size_5,obj_5,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,GRBM_SPI_BUSY,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TD_COALESCABLE_WAVEFRONT_sum,TD_LOAD_WAVEFRONT_sum,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TCC_NC_REQ_sum,TCC_UC_REQ_sum,TCC_CC_REQ_sum,TCC_RW_REQ_sum,wave_size_6,obj_6,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_PENDING_STALL_CYCLES_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCC_EA_ATOMIC_sum,TCC_EA_RDREQ_LEVEL_sum,TCC_EA_WRREQ_LEVEL_sum,wave_size_7,obj_7,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,TCP_VOLATILE_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCC_HIT_sum,TCC_MISS_sum,wave_size_8,obj_8,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,GRBM_COUNT,GRBM_GUI_ACTIVE,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TD_TCP_STALL_CYCLES_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TA_TA_BUSY_sum,TA_BUFFER_WAVEFRONTS_sum,TD_TD_BUSY_sum,TD_TC_STALL_sum,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TCC_CYCLE_sum,TCC_BUSY_sum,TCC_PROBE_sum,TCC_PROBE_ALL_sum,wave_size_9,obj_9,SQ_INSTS_FLAT,SQ_INSTS_LDS,SQ_INSTS_GDS,SQ_INSTS_EXP_GDS,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_INSTS,SQ_WAIT_ANY,TCP_UTCL1_TRANSLATION_MISS_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TCC_EA_WRREQ_sum,TCC_EA_WRREQ_64B_sum,TCC_EA_WR_UNCACHED_32B_sum,TCC_EA_WRREQ_DRAM_sum,wave_size_10,obj_10,TCC_EA_RDREQ[0],TCC_EA_RDREQ_32B[0],TCC_EA_RDREQ_DRAM_CREDIT_STALL[0],TCC_EA_RDREQ_GMI_CREDIT_STALL[0],TCC_EA_RDREQ[1],TCC_EA_RDREQ_32B[1],TCC_EA_RDREQ_DRAM_CREDIT_STALL[1],TCC_EA_RDREQ_GMI_CREDIT_STALL[1],TCC_EA_RDREQ[2],TCC_EA_RDREQ_32B[2],TCC_EA_RDREQ_DRAM_CREDIT_STALL[2],TCC_EA_RDREQ_GMI_CREDIT_STALL[2],TCC_EA_RDREQ[3],TCC_EA_RDREQ_32B[3],TCC_EA_RDREQ_DRAM_CREDIT_STALL[3],TCC_EA_RDREQ_GMI_CREDIT_STALL[3],TCC_EA_RDREQ[4],TCC_EA_RDREQ_32B[4],TCC_EA_RDREQ_DRAM_CREDIT_STALL[4],TCC_EA_RDREQ_GMI_CREDIT_STALL[4],TCC_EA_RDREQ[5],TCC_EA_RDREQ_32B[5],TCC_EA_RDREQ_DRAM_CREDIT_STALL[5],TCC_EA_RDREQ_GMI_CREDIT_STALL[5],TCC_EA_RDREQ[6],TCC_EA_RDREQ_32B[6],TCC_EA_RDREQ_DRAM_CREDIT_STALL[6],TCC_EA_RDREQ_GMI_CREDIT_STALL[6],TCC_EA_RDREQ[7],TCC_EA_RDREQ_32B[7],TCC_EA_RDREQ_DRAM_CREDIT_STALL[7],TCC_EA_RDREQ_GMI_CREDIT_STALL[7],TCC_EA_RDREQ[8],TCC_EA_RDREQ_32B[8],TCC_EA_RDREQ_DRAM_CREDIT_STALL[8],TCC_EA_RDREQ_GMI_CREDIT_STALL[8],TCC_EA_RDREQ[9],TCC_EA_RDREQ_32B[9],TCC_EA_RDREQ_DRAM_CREDIT_STALL[9],TCC_EA_RDREQ_GMI_CREDIT_STALL[9],TCC_EA_RDREQ[10],TCC_EA_RDREQ_32B[10],TCC_EA_RDREQ_DRAM_CREDIT_STALL[10],TCC_EA_RDREQ_GMI_CREDIT_STALL[10],TCC_EA_RDREQ[11],TCC_EA_RDREQ_32B[11],TCC_EA_RDREQ_DRAM_CREDIT_STALL[11],TCC_EA_RDREQ_GMI_CREDIT_STALL[11],TCC_EA_RDREQ[12],TCC_EA_RDREQ_32B[12],TCC_EA_RDREQ_DRAM_CREDIT_STALL[12],TCC_EA_RDREQ_GMI_CREDIT_STALL[12],TCC_EA_RDREQ[13],TCC_EA_RDREQ_32B[13],TCC_EA_RDREQ_DRAM_CREDIT_STALL[13],TCC_EA_RDREQ_GMI_CREDIT_STALL[13],TCC_EA_RDREQ[14],TCC_EA_RDREQ_32B[14],TCC_EA_RDREQ_DRAM_CREDIT_STALL[14],TCC_EA_RDREQ_GMI_CREDIT_STALL[14],TCC_EA_RDREQ[15],TCC_EA_RDREQ_32B[15],TCC_EA_RDREQ_DRAM_CREDIT_STALL[15],TCC_EA_RDREQ_GMI_CREDIT_STALL[15],TCC_EA_RDREQ[16],TCC_EA_RDREQ_32B[16],TCC_EA_RDREQ_DRAM_CREDIT_STALL[16],TCC_EA_RDREQ_GMI_CREDIT_STALL[16],TCC_EA_RDREQ[17],TCC_EA_RDREQ_32B[17],TCC_EA_RDREQ_DRAM_CREDIT_STALL[17],TCC_EA_RDREQ_GMI_CREDIT_STALL[17],TCC_EA_RDREQ[18],TCC_EA_RDREQ_32B[18],TCC_EA_RDREQ_DRAM_CREDIT_STALL[18],TCC_EA_RDREQ_GMI_CREDIT_STALL[18],TCC_EA_RDREQ[19],TCC_EA_RDREQ_32B[19],TCC_EA_RDREQ_DRAM_CREDIT_STALL[19],TCC_EA_RDREQ_GMI_CREDIT_STALL[19],TCC_EA_RDREQ[20],TCC_EA_RDREQ_32B[20],TCC_EA_RDREQ_DRAM_CREDIT_STALL[20],TCC_EA_RDREQ_GMI_CREDIT_STALL[20],TCC_EA_RDREQ[21],TCC_EA_RDREQ_32B[21],TCC_EA_RDREQ_DRAM_CREDIT_STALL[21],TCC_EA_RDREQ_GMI_CREDIT_STALL[21],TCC_EA_RDREQ[22],TCC_EA_RDREQ_32B[22],TCC_EA_RDREQ_DRAM_CREDIT_STALL[22],TCC_EA_RDREQ_GMI_CREDIT_STALL[22],TCC_EA_RDREQ[23],TCC_EA_RDREQ_32B[23],TCC_EA_RDREQ_DRAM_CREDIT_STALL[23],TCC_EA_RDREQ_GMI_CREDIT_STALL[23],TCC_EA_RDREQ[24],TCC_EA_RDREQ_32B[24],TCC_EA_RDREQ_DRAM_CREDIT_STALL[24],TCC_EA_RDREQ_GMI_CREDIT_STALL[24],TCC_EA_RDREQ[25],TCC_EA_RDREQ_32B[25],TCC_EA_RDREQ_DRAM_CREDIT_STALL[25],TCC_EA_RDREQ_GMI_CREDIT_STALL[25],TCC_EA_RDREQ[26],TCC_EA_RDREQ_32B[26],TCC_EA_RDREQ_DRAM_CREDIT_STALL[26],TCC_EA_RDREQ_GMI_CREDIT_STALL[26],TCC_EA_RDREQ[27],TCC_EA_RDREQ_32B[27],TCC_EA_RDREQ_DRAM_CREDIT_STALL[27],TCC_EA_RDREQ_GMI_CREDIT_STALL[27],TCC_EA_RDREQ[28],TCC_EA_RDREQ_32B[28],TCC_EA_RDREQ_DRAM_CREDIT_STALL[28],TCC_EA_RDREQ_GMI_CREDIT_STALL[28],TCC_EA_RDREQ[29],TCC_EA_RDREQ_32B[29],TCC_EA_RDREQ_DRAM_CREDIT_STALL[29],TCC_EA_RDREQ_GMI_CREDIT_STALL[29],TCC_EA_RDREQ[30],TCC_EA_RDREQ_32B[30],TCC_EA_RDREQ_DRAM_CREDIT_STALL[30],TCC_EA_RDREQ_GMI_CREDIT_STALL[30],TCC_EA_RDREQ[31],TCC_EA_RDREQ_32B[31],TCC_EA_RDREQ_DRAM_CREDIT_STALL[31],TCC_EA_RDREQ_GMI_CREDIT_STALL[31],wave_size_11,obj_11,SQ_LDS_BANK_CONFLICT,SQ_LDS_ADDR_CONFLICT,SQ_LDS_UNALIGNED_STALL,SQ_WAVES_EQ_64,SQ_WAVES_LT_64,SQ_WAVES_LT_48,SQ_WAVES_LT_32,SQ_WAVES_LT_16,TCP_TCC_NC_WRITE_REQ_sum,TCP_TCC_NC_ATOMIC_REQ_sum,TCP_TCC_UC_READ_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TA_FLAT_ATOMIC_WAVEFRONTS_sum,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TCC_EA_RDREQ_IO_CREDIT_STALL_sum,TCC_EA_RDREQ_GMI_CREDIT_STALL_sum,TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum,TCC_TAG_STALL_sum,wave_size_12,obj_12,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS_SMEM,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TA_BUFFER_COALESCED_READ_CYCLES_sum,TA_BUFFER_COALESCED_WRITE_CYCLES_sum,SPI_RA_RES_STALL_CSN,SPI_RA_TMP_STALL_CSN,CPC_CPC_UTCL2IU_BUSY,CPC_CPC_UTCL2IU_IDLE,CPF_CMP_UTCL1_STALL_ON_TRANSLATION,TCC_READ_sum,TCC_WRITE_sum,TCC_ATOMIC_sum,TCC_WRITEBACK_sum,wave_size_13,obj_13,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_INSTS_VALU,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,TCP_TCP_LATENCY_sum,TCP_TCC_READ_REQ_LATENCY_sum,TCP_TCC_WRITE_REQ_LATENCY_sum,TCP_TCC_READ_REQ_sum,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TCC_EA_WRREQ_STALL_sum,TCC_EA_WRREQ_IO_CREDIT_STALL_sum,TCC_EA_WRREQ_GMI_CREDIT_STALL_sum,TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum,wave_size_14,obj_14,TCC_EA_WRREQ_DRAM_CREDIT_STALL[0],TCC_EA_WRREQ_GMI_CREDIT_STALL[0],TCC_EA_WRREQ_IO_CREDIT_STALL[0],TCC_EA_WRREQ_LEVEL[0],TCC_EA_WRREQ_DRAM_CREDIT_STALL[1],TCC_EA_WRREQ_GMI_CREDIT_STALL[1],TCC_EA_WRREQ_IO_CREDIT_STALL[1],TCC_EA_WRREQ_LEVEL[1],TCC_EA_WRREQ_DRAM_CREDIT_STALL[2],TCC_EA_WRREQ_GMI_CREDIT_STALL[2],TCC_EA_WRREQ_IO_CREDIT_STALL[2],TCC_EA_WRREQ_LEVEL[2],TCC_EA_WRREQ_DRAM_CREDIT_STALL[3],TCC_EA_WRREQ_GMI_CREDIT_STALL[3],TCC_EA_WRREQ_IO_CREDIT_STALL[3],TCC_EA_WRREQ_LEVEL[3],TCC_EA_WRREQ_DRAM_CREDIT_STALL[4],TCC_EA_WRREQ_GMI_CREDIT_STALL[4],TCC_EA_WRREQ_IO_CREDIT_STALL[4],TCC_EA_WRREQ_LEVEL[4],TCC_EA_WRREQ_DRAM_CREDIT_STALL[5],TCC_EA_WRREQ_GMI_CREDIT_STALL[5],TCC_EA_WRREQ_IO_CREDIT_STALL[5],TCC_EA_WRREQ_LEVEL[5],TCC_EA_WRREQ_DRAM_CREDIT_STALL[6],TCC_EA_WRREQ_GMI_CREDIT_STALL[6],TCC_EA_WRREQ_IO_CREDIT_STALL[6],TCC_EA_WRREQ_LEVEL[6],TCC_EA_WRREQ_DRAM_CREDIT_STALL[7],TCC_EA_WRREQ_GMI_CREDIT_STALL[7],TCC_EA_WRREQ_IO_CREDIT_STALL[7],TCC_EA_WRREQ_LEVEL[7],TCC_EA_WRREQ_DRAM_CREDIT_STALL[8],TCC_EA_WRREQ_GMI_CREDIT_STALL[8],TCC_EA_WRREQ_IO_CREDIT_STALL[8],TCC_EA_WRREQ_LEVEL[8],TCC_EA_WRREQ_DRAM_CREDIT_STALL[9],TCC_EA_WRREQ_GMI_CREDIT_STALL[9],TCC_EA_WRREQ_IO_CREDIT_STALL[9],TCC_EA_WRREQ_LEVEL[9],TCC_EA_WRREQ_DRAM_CREDIT_STALL[10],TCC_EA_WRREQ_GMI_CREDIT_STALL[10],TCC_EA_WRREQ_IO_CREDIT_STALL[10],TCC_EA_WRREQ_LEVEL[10],TCC_EA_WRREQ_DRAM_CREDIT_STALL[11],TCC_EA_WRREQ_GMI_CREDIT_STALL[11],TCC_EA_WRREQ_IO_CREDIT_STALL[11],TCC_EA_WRREQ_LEVEL[11],TCC_EA_WRREQ_DRAM_CREDIT_STALL[12],TCC_EA_WRREQ_GMI_CREDIT_STALL[12],TCC_EA_WRREQ_IO_CREDIT_STALL[12],TCC_EA_WRREQ_LEVEL[12],TCC_EA_WRREQ_DRAM_CREDIT_STALL[13],TCC_EA_WRREQ_GMI_CREDIT_STALL[13],TCC_EA_WRREQ_IO_CREDIT_STALL[13],TCC_EA_WRREQ_LEVEL[13],TCC_EA_WRREQ_DRAM_CREDIT_STALL[14],TCC_EA_WRREQ_GMI_CREDIT_STALL[14],TCC_EA_WRREQ_IO_CREDIT_STALL[14],TCC_EA_WRREQ_LEVEL[14],TCC_EA_WRREQ_DRAM_CREDIT_STALL[15],TCC_EA_WRREQ_GMI_CREDIT_STALL[15],TCC_EA_WRREQ_IO_CREDIT_STALL[15],TCC_EA_WRREQ_LEVEL[15],TCC_EA_WRREQ_DRAM_CREDIT_STALL[16],TCC_EA_WRREQ_GMI_CREDIT_STALL[16],TCC_EA_WRREQ_IO_CREDIT_STALL[16],TCC_EA_WRREQ_LEVEL[16],TCC_EA_WRREQ_DRAM_CREDIT_STALL[17],TCC_EA_WRREQ_GMI_CREDIT_STALL[17],TCC_EA_WRREQ_IO_CREDIT_STALL[17],TCC_EA_WRREQ_LEVEL[17],TCC_EA_WRREQ_DRAM_CREDIT_STALL[18],TCC_EA_WRREQ_GMI_CREDIT_STALL[18],TCC_EA_WRREQ_IO_CREDIT_STALL[18],TCC_EA_WRREQ_LEVEL[18],TCC_EA_WRREQ_DRAM_CREDIT_STALL[19],TCC_EA_WRREQ_GMI_CREDIT_STALL[19],TCC_EA_WRREQ_IO_CREDIT_STALL[19],TCC_EA_WRREQ_LEVEL[19],TCC_EA_WRREQ_DRAM_CREDIT_STALL[20],TCC_EA_WRREQ_GMI_CREDIT_STALL[20],TCC_EA_WRREQ_IO_CREDIT_STALL[20],TCC_EA_WRREQ_LEVEL[20],TCC_EA_WRREQ_DRAM_CREDIT_STALL[21],TCC_EA_WRREQ_GMI_CREDIT_STALL[21],TCC_EA_WRREQ_IO_CREDIT_STALL[21],TCC_EA_WRREQ_LEVEL[21],TCC_EA_WRREQ_DRAM_CREDIT_STALL[22],TCC_EA_WRREQ_GMI_CREDIT_STALL[22],TCC_EA_WRREQ_IO_CREDIT_STALL[22],TCC_EA_WRREQ_LEVEL[22],TCC_EA_WRREQ_DRAM_CREDIT_STALL[23],TCC_EA_WRREQ_GMI_CREDIT_STALL[23],TCC_EA_WRREQ_IO_CREDIT_STALL[23],TCC_EA_WRREQ_LEVEL[23],TCC_EA_WRREQ_DRAM_CREDIT_STALL[24],TCC_EA_WRREQ_GMI_CREDIT_STALL[24],TCC_EA_WRREQ_IO_CREDIT_STALL[24],TCC_EA_WRREQ_LEVEL[24],TCC_EA_WRREQ_DRAM_CREDIT_STALL[25],TCC_EA_WRREQ_GMI_CREDIT_STALL[25],TCC_EA_WRREQ_IO_CREDIT_STALL[25],TCC_EA_WRREQ_LEVEL[25],TCC_EA_WRREQ_DRAM_CREDIT_STALL[26],TCC_EA_WRREQ_GMI_CREDIT_STALL[26],TCC_EA_WRREQ_IO_CREDIT_STALL[26],TCC_EA_WRREQ_LEVEL[26],TCC_EA_WRREQ_DRAM_CREDIT_STALL[27],TCC_EA_WRREQ_GMI_CREDIT_STALL[27],TCC_EA_WRREQ_IO_CREDIT_STALL[27],TCC_EA_WRREQ_LEVEL[27],TCC_EA_WRREQ_DRAM_CREDIT_STALL[28],TCC_EA_WRREQ_GMI_CREDIT_STALL[28],TCC_EA_WRREQ_IO_CREDIT_STALL[28],TCC_EA_WRREQ_LEVEL[28],TCC_EA_WRREQ_DRAM_CREDIT_STALL[29],TCC_EA_WRREQ_GMI_CREDIT_STALL[29],TCC_EA_WRREQ_IO_CREDIT_STALL[29],TCC_EA_WRREQ_LEVEL[29],TCC_EA_WRREQ_DRAM_CREDIT_STALL[30],TCC_EA_WRREQ_GMI_CREDIT_STALL[30],TCC_EA_WRREQ_IO_CREDIT_STALL[30],TCC_EA_WRREQ_LEVEL[30],TCC_EA_WRREQ_DRAM_CREDIT_STALL[31],TCC_EA_WRREQ_GMI_CREDIT_STALL[31],TCC_EA_WRREQ_IO_CREDIT_STALL[31],TCC_EA_WRREQ_LEVEL[31],wave_size_15,obj_15,TCC_EA_ATOMIC_LEVEL_sum,wave_size_16,obj_16,TCC_ATOMIC[0],TCC_CYCLE[0],TCC_EA_ATOMIC[0],TCC_EA_ATOMIC_LEVEL[0],TCC_ATOMIC[1],TCC_CYCLE[1],TCC_EA_ATOMIC[1],TCC_EA_ATOMIC_LEVEL[1],TCC_ATOMIC[2],TCC_CYCLE[2],TCC_EA_ATOMIC[2],TCC_EA_ATOMIC_LEVEL[2],TCC_ATOMIC[3],TCC_CYCLE[3],TCC_EA_ATOMIC[3],TCC_EA_ATOMIC_LEVEL[3],TCC_ATOMIC[4],TCC_CYCLE[4],TCC_EA_ATOMIC[4],TCC_EA_ATOMIC_LEVEL[4],TCC_ATOMIC[5],TCC_CYCLE[5],TCC_EA_ATOMIC[5],TCC_EA_ATOMIC_LEVEL[5],TCC_ATOMIC[6],TCC_CYCLE[6],TCC_EA_ATOMIC[6],TCC_EA_ATOMIC_LEVEL[6],TCC_ATOMIC[7],TCC_CYCLE[7],TCC_EA_ATOMIC[7],TCC_EA_ATOMIC_LEVEL[7],TCC_ATOMIC[8],TCC_CYCLE[8],TCC_EA_ATOMIC[8],TCC_EA_ATOMIC_LEVEL[8],TCC_ATOMIC[9],TCC_CYCLE[9],TCC_EA_ATOMIC[9],TCC_EA_ATOMIC_LEVEL[9],TCC_ATOMIC[10],TCC_CYCLE[10],TCC_EA_ATOMIC[10],TCC_EA_ATOMIC_LEVEL[10],TCC_ATOMIC[11],TCC_CYCLE[11],TCC_EA_ATOMIC[11],TCC_EA_ATOMIC_LEVEL[11],TCC_ATOMIC[12],TCC_CYCLE[12],TCC_EA_ATOMIC[12],TCC_EA_ATOMIC_LEVEL[12],TCC_ATOMIC[13],TCC_CYCLE[13],TCC_EA_ATOMIC[13],TCC_EA_ATOMIC_LEVEL[13],TCC_ATOMIC[14],TCC_CYCLE[14],TCC_EA_ATOMIC[14],TCC_EA_ATOMIC_LEVEL[14],TCC_ATOMIC[15],TCC_CYCLE[15],TCC_EA_ATOMIC[15],TCC_EA_ATOMIC_LEVEL[15],TCC_ATOMIC[16],TCC_CYCLE[16],TCC_EA_ATOMIC[16],TCC_EA_ATOMIC_LEVEL[16],TCC_ATOMIC[17],TCC_CYCLE[17],TCC_EA_ATOMIC[17],TCC_EA_ATOMIC_LEVEL[17],TCC_ATOMIC[18],TCC_CYCLE[18],TCC_EA_ATOMIC[18],TCC_EA_ATOMIC_LEVEL[18],TCC_ATOMIC[19],TCC_CYCLE[19],TCC_EA_ATOMIC[19],TCC_EA_ATOMIC_LEVEL[19],TCC_ATOMIC[20],TCC_CYCLE[20],TCC_EA_ATOMIC[20],TCC_EA_ATOMIC_LEVEL[20],TCC_ATOMIC[21],TCC_CYCLE[21],TCC_EA_ATOMIC[21],TCC_EA_ATOMIC_LEVEL[21],TCC_ATOMIC[22],TCC_CYCLE[22],TCC_EA_ATOMIC[22],TCC_EA_ATOMIC_LEVEL[22],TCC_ATOMIC[23],TCC_CYCLE[23],TCC_EA_ATOMIC[23],TCC_EA_ATOMIC_LEVEL[23],TCC_ATOMIC[24],TCC_CYCLE[24],TCC_EA_ATOMIC[24],TCC_EA_ATOMIC_LEVEL[24],TCC_ATOMIC[25],TCC_CYCLE[25],TCC_EA_ATOMIC[25],TCC_EA_ATOMIC_LEVEL[25],TCC_ATOMIC[26],TCC_CYCLE[26],TCC_EA_ATOMIC[26],TCC_EA_ATOMIC_LEVEL[26],TCC_ATOMIC[27],TCC_CYCLE[27],TCC_EA_ATOMIC[27],TCC_EA_ATOMIC_LEVEL[27],TCC_ATOMIC[28],TCC_CYCLE[28],TCC_EA_ATOMIC[28],TCC_EA_ATOMIC_LEVEL[28],TCC_ATOMIC[29],TCC_CYCLE[29],TCC_EA_ATOMIC[29],TCC_EA_ATOMIC_LEVEL[29],TCC_ATOMIC[30],TCC_CYCLE[30],TCC_EA_ATOMIC[30],TCC_EA_ATOMIC_LEVEL[30],TCC_ATOMIC[31],TCC_CYCLE[31],TCC_EA_ATOMIC[31],TCC_EA_ATOMIC_LEVEL[31],Start_Timestamp,End_Timestamp
0,"vecCopy(double*, double*, double*, int, int) [clone .kd]",2,1048576,256,0,0,8,8,16,64,0x7fc30f694ec0,1048576,0,0,0,0,0,131072,0.0,0.0,0.0,0.0,16384,0,87348.0,43724.0,131115.0,0.0,64,0x7febbf978ec0,32768,32768,16384,16384,65536,49152,11534336,65536,131072.0,0.0,0.0,0.0,32768.0,16384.0,0,0,131427.0,0.0,702.0,131426.0,64,0x7fd3331f8ec0,8192,0,4096,8192,0,4096,8192,0,4096,8336,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,64,0x7f0423f78ec0,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,141,8195,4240,8336,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,47,8416,4367,8463,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8288,4192,8288,0,8192,4096,8192,64,0x7f86859a0ec0,0,3512791,4096,4096,0,4075185,4096,4096,0,4050354,4096,4096,0,3291762,4096,4096,0,3648117,4096,4096,0,3475915,4096,4096,0,3401715,4096,4096,0,4876180,4096,4096,0,3564576,4096,4096,0,4954479,4096,4096,0,3577417,4096,4096,0,3897536,4096,4096,0,3937814,4096,4096,0,3200961,4096,4096,0,4307023,4096,4096,0,3437387,4096,4096,0,3469997,4096,4096,0,4081154,4096,4096,0,4559960,4096,4096,0,3410129,4096,4096,0,3622592,4096,4096,0,4278017,4096,4096,0,3663285,4096,4096,0,3512199,4096,4096,0,3747528,4096,4096,0,3763701,4096,4096,0,4056891,4096,4096,0,4076337,4096,4096,0,3769795,4096,4096,0,3456594,4096,4096,0,3737070,4096,4096,0,3683305,4096,4096,64,0x7f3533fd8ec0,0,0,192,0,65536,64483,48,1340,31836,0.0,0.0,0.0,32768.0,0.0,0.0,0.0,32768.0,4096,16384,539,48894,1884,0,48.0,345.0,0.0,262288.0,64,0x7f03fadb0ec0,131072.0,131072.0,0.0,2397655.0,0.0,0.0,91464616.0,62880703.0,64,0x7f4f40544ec0,188620,0,0,65536,64048,48,1440,32768,2097152.0,2097152.0,1048576.0,1048576.0,0.0,0.0,0.0,16384.0,13332,29716,9867,588,0,46106,262677.0,0.0,188.0,262489.0,64,0x7f4ac1df8ec0,397360,247249,3606399,16384,26665627,144,48,0,49669,49669,4061022.0,3133855.0,7117.0,1222708.0,2219234.0,0.0,3124558.0,2812713.0,395903,257200,49669,0,49669,0,1589408.0,992409.0,0.0,0.0,64,0x7f15a9140ec0,32768,0,0,0,16384,16384,393216,22578123,960.0,513867.0,0.0,524288.0,985426.0,32768.0,0,0,0,16772,131072.0,131072.0,0.0,131072.0,64,0x7f3220bc8ec0,4096,0,1299,0,4096,0,0,0,4096,0,25,0,4099,0,0,0,4096,0,194,0,4096,0,1030,0,4097,0,0,0,4096,0,0,0,4096,0,9,0,4096,0,0,0,4096,0,843,0,4144,0,0,0,4096,0,450,0,4096,0,0,0,4096,0,747,0,4096,0,0,0,4096,0,560,0,4096,0,9570,0,4096,0,0,0,4096,0,0,0,4096,0,92,0,4096,0,0,0,4311,0,505,0,4096,0,1211,0,4096,0,1269,0,4096,0,141,0,4144,0,64,0,4096,0,95,0,4096,0,483,0,4096,0,874,0,4096,0,0,0,4096,0,88,0,64,0x7f9024270ec0,0,0,0,16384,0,0,0,0,0.0,0.0,0.0,0.0,16384.0,0.0,0,81920,0.0,0.0,56535.0,123636.0,64,0x7fa1fe0bcec0,32768,0,16384,16384,32768,49152,0,65536,0.0,0.0,120.0,524288.0,0.0,0.0,0,0,913,48024,0,131602.0,131072.0,0.0,131104.0,64,0x7f999865cec0,2155958,360448,163840,0,0,180224,114688,0,63695534.0,181199542.0,74505077.0,131072.0,0.0,804135.0,0,0,26498,137304.0,0.0,0.0,137304.0,64,0x7fd2cf110ec0,1685,0,0,1826847,2360,0,0,1860759,2027,0,0,1821394,3197,0,0,1901423,1329,0,0,1716767,1034,0,0,1626266,875,0,0,1712843,2757,0,0,2059626,2470,0,0,1893736,1951,0,0,1838109,2377,0,0,1936004,1213,0,0,1798810,1258,0,0,1657001,1529,0,0,1818839,3836,0,0,2088713,1079,0,0,1761429,4638,0,0,2078907,1003,0,0,1684209,3012,0,0,2027863,2071,0,0,1863477,1709,0,0,1796774,2034,0,0,1805821,5878,0,0,2246656,1991,0,0,1868345,2172,0,0,1874076,1206,0,0,1677991,3871,0,0,2139344,5253,0,0,2076311,1859,0,0,1878838,3865,0,0,2072964,3565,0,0,1968075,1693,0,0,1859162,64,0x7fe405ce8ec0,0.0,64,0x7fd64e238ec0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,0,48276,0,0,1410100033478037,1410100033502197
1,"vecCopy(double*, double*, double*, int, int) [clone .kd]",2,1048576,256,0,0,8,8,16,64,0x7fc30f694ec0,1048576,0,0,0,0,0,131072,0.0,0.0,0.0,0.0,16384,0,63792.0,36508.0,83751.0,0.0,64,0x7febbf978ec0,32768,32768,16384,16384,65536,49152,11534336,65536,131072.0,0.0,0.0,0.0,32768.0,16384.0,0,0,131791.0,0.0,1434.0,131789.0,64,0x7fd3331f8ec0,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,64,0x7f0423f78ec0,0,8192,4096,8192,0,8193,4097,8193,0,8192,4096,8192,0,8192,4096,8192,0,8193,4097,8193,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,47,8481,4432,8528,0,8193,4097,8193,0,8192,4096,8192,0,8193,4097,8193,0,8288,4192,8288,0,8192,4096,8192,64,0x7f86859a0ec0,0,3976751,2746,2746,0,3235262,2728,2728,0,3044451,2719,2719,0,3832340,2748,2748,0,3828952,2699,2699,0,3230555,2752,2752,0,3213971,2757,2757,0,3906586,2751,2751,0,3559697,2726,2726,0,3046972,2708,2708,0,3153001,2754,2754,0,3573120,2742,2742,0,3689377,2744,2744,0,3073893,2710,2710,0,3502741,2732,2732,0,3277733,2746,2746,0,3865264,2728,2728,0,3821840,2740,2740,0,4021725,2737,2737,0,3793872,2760,2760,0,3633571,2738,2738,0,4711348,2737,2737,0,3758264,2698,2698,0,2991069,2696,2696,0,3689540,2724,2724,0,3246738,2720,2720,0,3465070,2738,2738,0,3690412,2748,2748,0,3310688,2728,2728,0,2931025,2704,2704,0,3818240,2744,2744,0,3614424,2732,2732,64,0x7f3533fd8ec0,0,0,48,0,65536,65536,0,0,32056,0.0,0.0,0.0,32768.0,0.0,0.0,0.0,32768.0,4096,16384,457,44234,1694,0,48.0,388.0,0.0,262144.0,64,0x7f03fadb0ec0,131072.0,131072.0,0.0,2426353.0,0.0,0.0,107627540.0,49685710.0,64,0x7f4f40544ec0,189150,0,0,65536,64048,48,1440,32768,2097152.0,2097152.0,1048576.0,1048576.0,0.0,0.0,0.0,16384.0,12283,28667,8619,2408,0,41664,262556.0,0.0,47.0,262509.0,64,0x7f4ac1df8ec0,341384,233097,3403978,16384,25027673,0,48,0,42672,42672,3785876.0,3052246.0,7020.0,1076341.0,2098175.0,0.0,3043055.0,2731106.0,341376,242871,42672,0,42672,0,1365504.0,810597.0,0.0,0.0,64,0x7f15a9140ec0,32768,0,0,0,16384,16384,393216,22105908,960.0,513997.0,0.0,524288.0,812354.0,32768.0,0,0,0,13513,86875.0,86875.0,0.0,86875.0,64,0x7f3220bc8ec0,4096,0,531,0,4099,0,489,0,4096,0,204,0,4096,0,0,0,4096,0,9296,0,4097,0,0,0,4097,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,82,0,4096,0,670,0,4144,0,1145,0,4096,0,1134,0,4096,0,0,0,4096,0,313,0,4096,0,839,0,4096,0,394,0,4096,0,1744,0,4096,0,615,0,4096,0,0,0,4096,0,500,0,4096,0,0,0,4278,0,840,0,4096,0,0,0,4096,0,0,0,4096,0,736,0,4144,0,0,0,4096,0,33,0,4096,0,0,0,4097,0,406,0,4096,0,0,0,4096,0,0,0,64,0x7f9024270ec0,0,0,0,16384,0,0,0,0,0.0,0.0,0.0,0.0,16384.0,0.0,0,81920,0.0,0.0,79567.0,149743.0,64,0x7fa1fe0bcec0,32768,0,16384,16384,32768,49152,0,65536,0.0,0.0,240.0,524288.0,0.0,0.0,0,0,5117,45204,1068,131909.0,131072.0,0.0,101064.0,64,0x7f999865cec0,2593036,360448,163840,0,0,180224,114688,0,62159453.0,174238750.0,66434037.0,131072.0,0.0,886033.0,0,0,26787,75940.0,0.0,0.0,75940.0,64,0x7fd2cf110ec0,3566,0,0,1563547,5989,0,0,1827753,2133,0,0,1558770,7918,0,0,1902753,908,0,0,1357752,2263,0,0,1533636,1389,0,0,1451083,4274,0,0,1726467,613,0,0,1284997,2826,0,0,1620161,1550,0,0,1426455,639,0,0,1397839,2395,0,0,1604147,4910,0,0,1762981,868,0,0,1357925,4618,0,0,1687716,1691,0,0,1381251,893,0,0,1401858,2622,0,0,1498832,5376,0,0,1782192,1100,0,0,1293889,2744,0,0,1590412,6568,0,0,1860968,6050,0,0,1800894,1836,0,0,1448440,1553,0,0,1434269,2760,0,0,1585630,4625,0,0,1696053,506,0,0,1202905,6189,0,0,1774715,3353,0,0,1662679,925,0,0,1406030,64,0x7fe405ce8ec0,0.0,64,0x7fd64e238ec0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,0,43847,0,0,1410100033593877,1410100033612597
2,"vecCopy(double*, double*, double*, int, int) [clone .kd]",2,1048576,256,0,0,8,8,16,64,0x7fc30f694ec0,1048576,0,0,0,0,0,131072,0.0,0.0,0.0,0.0,16384,0,86999.0,0.0,131112.0,0.0,64,0x7febbf978ec0,32768,32768,16384,16384,65536,49152,11534336,65536,131072.0,0.0,0.0,0.0,32768.0,16384.0,0,0,131421.0,0.0,696.0,131420.0,64,0x7fd3331f8ec0,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,64,0x7f0423f78ec0,0,8192,4096,8192,0,8193,4097,8193,0,8192,4096,8192,0,8192,4096,8192,0,8193,4097,8193,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,47,8458,4409,8505,0,8193,4097,8193,0,8192,4096,8192,0,8193,4097,8193,0,8288,4192,8288,0,8192,4096,8192,64,0x7f86859a0ec0,0,4461761,2704,2704,0,3466720,2704,2704,0,4060341,2690,2690,0,3897505,2703,2703,0,3888352,2688,2688,0,3706792,2694,2694,0,3736151,2704,2704,0,4705413,2681,2681,0,3753589,2725,2725,0,3431345,2696,2696,0,3862428,2668,2668,0,3601176,2724,2724,0,4293758,2712,2712,0,3325524,2704,2704,0,4219062,2700,2700,0,3926287,2694,2694,0,3799414,2696,2696,0,3441928,2700,2700,0,4070602,2684,2684,0,3811901,2728,2728,0,3695054,2688,2688,0,4401082,2743,2743,0,3929467,2684,2684,0,3191490,2712,2712,0,3577087,2690,2690,0,3567360,2696,2696,0,4153744,2727,2727,0,3333947,2698,2698,0,3523290,2692,2692,0,3898407,2696,2696,0,3957767,2706,2706,0,3433115,2686,2686,64,0x7f3533fd8ec0,0,0,48,0,65536,65536,0,0,31551,0.0,0.0,0.0,32768.0,0.0,0.0,0.0,32768.0,4096,16384,458,43449,1734,0,48.0,385.0,0.0,262144.0,64,0x7f03fadb0ec0,131072.0,131072.0,0.0,2483507.0,0.0,0.0,96272680.0,49886972.0,64,0x7f4f40544ec0,189766,0,0,65536,64048,48,1440,32768,2097152.0,2097152.0,1048576.0,1048576.0,0.0,0.0,0.0,16384.0,14437,30821,8571,2414,0,40605,262540.0,0.0,47.0,262493.0,64,0x7f4ac1df8ec0,339472,231527,3380998,16384,24964507,0,48,0,42433,42433,3761911.0,3017583.0,7070.0,1043331.0,2057628.0,0.0,3008883.0,2697688.0,339464,241095,42433,0,42433,0,1357856.0,807631.0,0.0,0.0,64,0x7f15a9140ec0,32768,0,0,0,16384,16384,393216,22475190,960.0,513889.0,0.0,524288.0,1117908.0,32768.0,0,0,0,13113,86624.0,86625.0,0.0,86624.0,64,0x7f3220bc8ec0,4096,0,1308,0,4099,0,694,0,4096,0,0,0,4096,0,0,0,4096,0,6129,0,4097,0,123,0,4097,0,842,0,4096,0,34,0,4096,0,52,0,4096,0,3785,0,4096,0,0,0,4144,0,863,0,4096,0,1047,0,4096,0,847,0,4096,0,0,0,4096,0,54,0,4096,0,1567,0,4096,0,4931,0,4096,0,1741,0,4096,0,0,0,4096,0,221,0,4096,0,644,0,4230,0,59,0,4096,0,61,0,4096,0,0,0,4096,0,1156,0,4144,0,0,0,4096,0,202,0,4096,0,40,0,4097,0,919,0,4096,0,0,0,4096,0,89,0,64,0x7f9024270ec0,0,0,0,16384,0,0,0,0,0.0,0.0,0.0,0.0,16384.0,0.0,0,81920,0.0,0.0,66174.0,140962.0,64,0x7fa1fe0bcec0,32768,0,16384,16384,32768,49152,0,65536,0.0,0.0,120.0,524288.0,0.0,0.0,0,0,2685,39960,0,131487.0,131072.0,0.0,86546.0,64,0x7f999865cec0,1825824,360448,163840,0,0,180224,114688,0,67127863.0,184758876.0,76601215.0,131072.0,0.0,858131.0,0,0,26832,108089.0,0.0,0.0,108089.0,64,0x7fd2cf110ec0,1616,0,0,1409054,2894,0,0,1594410,923,0,0,1272513,5769,0,0,1770206,814,0,0,1230202,1734,0,0,1419924,2682,0,0,1547898,2193,0,0,1491855,604,0,0,1209722,474,0,0,1236197,1189,0,0,1391919,1295,0,0,1448270,1531,0,0,1385158,1224,0,0,1371506,886,0,0,1282401,2861,0,0,1503989,771,0,0,1292369,2405,0,0,1602214,2719,0,0,1530684,2236,0,0,1439181,1134,0,0,1309982,682,0,0,1324571,1317,0,0,1375824,2983,0,0,1531154,1082,0,0,1387922,1318,0,0,1368581,1722,0,0,1485274,5935,0,0,1818492,1870,0,0,1538158,2441,0,0,1569172,701,0,0,1311460,2418,0,0,1480520,64,0x7fe405ce8ec0,0.0,64,0x7fd64e238ec0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,0,42072,0,0,1410100033638517,1410100033657077