/*
 * =============================================================================
 *   ROC Runtime Conformance Release License
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 * Copyright (c) 2018, Advanced Micro Devices, Inc.
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 *                 AMD Research and AMD ROC Software Development
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 *                 Advanced Micro Devices, Inc.
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#ifndef ROCRTST_SUITES_STRESS_QUEUE_WRITE_INDEX_CONCURRENT_TESTS_H_
#define ROCRTST_SUITES_STRESS_QUEUE_WRITE_INDEX_CONCURRENT_TESTS_H_


#include "common/base_rocr.h"
#include "hsa/hsa.h"
#include "suites/test_common/test_base.h"


class QueueWriteIndexConcurrentTest : public TestBase {
 public:
    QueueWriteIndexConcurrentTest(bool launch_Concurrent_AddWriteIndex,
                         bool launch_Concurrent_CasWriteIndex ,
                         bool launch_Concurrent_LoadStoreWriteIndex);

  // @Brief: Destructor for test case of MemoryTest
  virtual ~QueueWriteIndexConcurrentTest();

  // @Brief: Setup the environment for measurement
  virtual void SetUp();

  // @Brief: Core measurement execution
  virtual void Run();

  // @Brief: Clean up and retrive the resource
  virtual void Close();

  // @Brief: Display  results
  virtual void DisplayResults() const;

  // @Brief: Display information about what this test does
  virtual void DisplayTestInfo(void);


  // @Brief: Verifies that the hsa_queue_write_index_add operations is atomic,
  // and 'torn' adds do not occur when this API is executed concurrently.
  void QueueAddWriteIndexAtomic(void);

  // @Brief:  Verifies that the hsa_queue_cas_write_index operations is atomic,
  // and 'torn' compare and swaps do not occur when this API is executed
  // concurrently.
  void QueueCasWriteIndexAtomic(void);

  // @Brief: Verifies that the hsa_queue_write_index_load and store operations
  // are atomic, and 'torn' loads or stores do not occur when these APIs are executed
  // concurrently.
  void QueueLoadStoreWriteIndexAtomic(void);

 private:
  void QueueAddWriteIndexAtomic(hsa_agent_t cpuAgent, hsa_agent_t gpuAgent);
  void QueueCasWriteIndexAtomic(hsa_agent_t cpuAgent, hsa_agent_t gpuAgent);
  void QueueLoadStoreWriteIndexAtomic(hsa_agent_t cpuAgent, hsa_agent_t gpuAgent);
};

#endif  // ROCRTST_SUITES_STRESS_QUEUE_WRITE_INDEX_CONCURRENT_TESTS_H_