Dispatch_ID,Kernel_Name,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,wave_size,obj,TCC_EA_WRREQ_DRAM_CREDIT_STALL[0],TCC_EA_WRREQ_GMI_CREDIT_STALL[0],TCC_EA_WRREQ_IO_CREDIT_STALL[0],TCC_EA_WRREQ_LEVEL[0],TCC_EA_WRREQ_DRAM_CREDIT_STALL[1],TCC_EA_WRREQ_GMI_CREDIT_STALL[1],TCC_EA_WRREQ_IO_CREDIT_STALL[1],TCC_EA_WRREQ_LEVEL[1],TCC_EA_WRREQ_DRAM_CREDIT_STALL[2],TCC_EA_WRREQ_GMI_CREDIT_STALL[2],TCC_EA_WRREQ_IO_CREDIT_STALL[2],TCC_EA_WRREQ_LEVEL[2],TCC_EA_WRREQ_DRAM_CREDIT_STALL[3],TCC_EA_WRREQ_GMI_CREDIT_STALL[3],TCC_EA_WRREQ_IO_CREDIT_STALL[3],TCC_EA_WRREQ_LEVEL[3],TCC_EA_WRREQ_DRAM_CREDIT_STALL[4],TCC_EA_WRREQ_GMI_CREDIT_STALL[4],TCC_EA_WRREQ_IO_CREDIT_STALL[4],TCC_EA_WRREQ_LEVEL[4],TCC_EA_WRREQ_DRAM_CREDIT_STALL[5],TCC_EA_WRREQ_GMI_CREDIT_STALL[5],TCC_EA_WRREQ_IO_CREDIT_STALL[5],TCC_EA_WRREQ_LEVEL[5],TCC_EA_WRREQ_DRAM_CREDIT_STALL[6],TCC_EA_WRREQ_GMI_CREDIT_STALL[6],TCC_EA_WRREQ_IO_CREDIT_STALL[6],TCC_EA_WRREQ_LEVEL[6],TCC_EA_WRREQ_DRAM_CREDIT_STALL[7],TCC_EA_WRREQ_GMI_CREDIT_STALL[7],TCC_EA_WRREQ_IO_CREDIT_STALL[7],TCC_EA_WRREQ_LEVEL[7],TCC_EA_WRREQ_DRAM_CREDIT_STALL[8],TCC_EA_WRREQ_GMI_CREDIT_STALL[8],TCC_EA_WRREQ_IO_CREDIT_STALL[8],TCC_EA_WRREQ_LEVEL[8],TCC_EA_WRREQ_DRAM_CREDIT_STALL[9],TCC_EA_WRREQ_GMI_CREDIT_STALL[9],TCC_EA_WRREQ_IO_CREDIT_STALL[9],TCC_EA_WRREQ_LEVEL[9],TCC_EA_WRREQ_DRAM_CREDIT_STALL[10],TCC_EA_WRREQ_GMI_CREDIT_STALL[10],TCC_EA_WRREQ_IO_CREDIT_STALL[10],TCC_EA_WRREQ_LEVEL[10],TCC_EA_WRREQ_DRAM_CREDIT_STALL[11],TCC_EA_WRREQ_GMI_CREDIT_STALL[11],TCC_EA_WRREQ_IO_CREDIT_STALL[11],TCC_EA_WRREQ_LEVEL[11],TCC_EA_WRREQ_DRAM_CREDIT_STALL[12],TCC_EA_WRREQ_GMI_CREDIT_STALL[12],TCC_EA_WRREQ_IO_CREDIT_STALL[12],TCC_EA_WRREQ_LEVEL[12],TCC_EA_WRREQ_DRAM_CREDIT_STALL[13],TCC_EA_WRREQ_GMI_CREDIT_STALL[13],TCC_EA_WRREQ_IO_CREDIT_STALL[13],TCC_EA_WRREQ_LEVEL[13],TCC_EA_WRREQ_DRAM_CREDIT_STALL[14],TCC_EA_WRREQ_GMI_CREDIT_STALL[14],TCC_EA_WRREQ_IO_CREDIT_STALL[14],TCC_EA_WRREQ_LEVEL[14],TCC_EA_WRREQ_DRAM_CREDIT_STALL[15],TCC_EA_WRREQ_GMI_CREDIT_STALL[15],TCC_EA_WRREQ_IO_CREDIT_STALL[15],TCC_EA_WRREQ_LEVEL[15],TCC_EA_WRREQ_DRAM_CREDIT_STALL[16],TCC_EA_WRREQ_GMI_CREDIT_STALL[16],TCC_EA_WRREQ_IO_CREDIT_STALL[16],TCC_EA_WRREQ_LEVEL[16],TCC_EA_WRREQ_DRAM_CREDIT_STALL[17],TCC_EA_WRREQ_GMI_CREDIT_STALL[17],TCC_EA_WRREQ_IO_CREDIT_STALL[17],TCC_EA_WRREQ_LEVEL[17],TCC_EA_WRREQ_DRAM_CREDIT_STALL[18],TCC_EA_WRREQ_GMI_CREDIT_STALL[18],TCC_EA_WRREQ_IO_CREDIT_STALL[18],TCC_EA_WRREQ_LEVEL[18],TCC_EA_WRREQ_DRAM_CREDIT_STALL[19],TCC_EA_WRREQ_GMI_CREDIT_STALL[19],TCC_EA_WRREQ_IO_CREDIT_STALL[19],TCC_EA_WRREQ_LEVEL[19],TCC_EA_WRREQ_DRAM_CREDIT_STALL[20],TCC_EA_WRREQ_GMI_CREDIT_STALL[20],TCC_EA_WRREQ_IO_CREDIT_STALL[20],TCC_EA_WRREQ_LEVEL[20],TCC_EA_WRREQ_DRAM_CREDIT_STALL[21],TCC_EA_WRREQ_GMI_CREDIT_STALL[21],TCC_EA_WRREQ_IO_CREDIT_STALL[21],TCC_EA_WRREQ_LEVEL[21],TCC_EA_WRREQ_DRAM_CREDIT_STALL[22],TCC_EA_WRREQ_GMI_CREDIT_STALL[22],TCC_EA_WRREQ_IO_CREDIT_STALL[22],TCC_EA_WRREQ_LEVEL[22],TCC_EA_WRREQ_DRAM_CREDIT_STALL[23],TCC_EA_WRREQ_GMI_CREDIT_STALL[23],TCC_EA_WRREQ_IO_CREDIT_STALL[23],TCC_EA_WRREQ_LEVEL[23],TCC_EA_WRREQ_DRAM_CREDIT_STALL[24],TCC_EA_WRREQ_GMI_CREDIT_STALL[24],TCC_EA_WRREQ_IO_CREDIT_STALL[24],TCC_EA_WRREQ_LEVEL[24],TCC_EA_WRREQ_DRAM_CREDIT_STALL[25],TCC_EA_WRREQ_GMI_CREDIT_STALL[25],TCC_EA_WRREQ_IO_CREDIT_STALL[25],TCC_EA_WRREQ_LEVEL[25],TCC_EA_WRREQ_DRAM_CREDIT_STALL[26],TCC_EA_WRREQ_GMI_CREDIT_STALL[26],TCC_EA_WRREQ_IO_CREDIT_STALL[26],TCC_EA_WRREQ_LEVEL[26],TCC_EA_WRREQ_DRAM_CREDIT_STALL[27],TCC_EA_WRREQ_GMI_CREDIT_STALL[27],TCC_EA_WRREQ_IO_CREDIT_STALL[27],TCC_EA_WRREQ_LEVEL[27],TCC_EA_WRREQ_DRAM_CREDIT_STALL[28],TCC_EA_WRREQ_GMI_CREDIT_STALL[28],TCC_EA_WRREQ_IO_CREDIT_STALL[28],TCC_EA_WRREQ_LEVEL[28],TCC_EA_WRREQ_DRAM_CREDIT_STALL[29],TCC_EA_WRREQ_GMI_CREDIT_STALL[29],TCC_EA_WRREQ_IO_CREDIT_STALL[29],TCC_EA_WRREQ_LEVEL[29],TCC_EA_WRREQ_DRAM_CREDIT_STALL[30],TCC_EA_WRREQ_GMI_CREDIT_STALL[30],TCC_EA_WRREQ_IO_CREDIT_STALL[30],TCC_EA_WRREQ_LEVEL[30],TCC_EA_WRREQ_DRAM_CREDIT_STALL[31],TCC_EA_WRREQ_GMI_CREDIT_STALL[31],TCC_EA_WRREQ_IO_CREDIT_STALL[31],TCC_EA_WRREQ_LEVEL[31],wave_size_1,obj_1,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_WAVES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,SQ_INSTS_VMEM,SQ_INSTS_SALU,GRBM_COUNT,GRBM_GUI_ACTIVE,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TD_TCP_STALL_CYCLES_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TA_TA_BUSY_sum,TA_BUFFER_WAVEFRONTS_sum,TD_TD_BUSY_sum,TD_TC_STALL_sum,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TCC_CYCLE_sum,TCC_BUSY_sum,TCC_PROBE_sum,TCC_PROBE_ALL_sum,wave_size_2,obj_2,SQC_DCACHE_REQ_READ_1,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,wave_size_3,obj_3,SQ_INSTS_FLAT_LDS_ONLY,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_PENDING_STALL_CYCLES_sum,wave_size_4,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INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_CC_ATOMIC_REQ_sum,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA_RDREQ_LEVEL_sum,TCC_EA_WRREQ_LEVEL_sum,TCC_EA_ATOMIC_LEVEL_sum,wave_size_9,obj_9,TCC_RW_REQ[0],TCC_TOO_MANY_EA_WRREQS_STALL[0],TCC_WRITE[0],TCC_RW_REQ[1],TCC_TOO_MANY_EA_WRREQS_STALL[1],TCC_WRITE[1],TCC_RW_REQ[2],TCC_TOO_MANY_EA_WRREQS_STALL[2],TCC_WRITE[2],TCC_RW_REQ[3],TCC_TOO_MANY_EA_WRREQS_STALL[3],TCC_WRITE[3],TCC_RW_REQ[4],TCC_TOO_MANY_EA_WRREQS_STALL[4],TCC_WRITE[4],TCC_RW_REQ[5],TCC_TOO_MANY_EA_WRREQS_STALL[5],TCC_WRITE[5],TCC_RW_REQ[6],TCC_TOO_MANY_EA_WRREQS_STALL[6],TCC_WRITE[6],TCC_RW_REQ[7],TCC_TOO_MANY_EA_WRREQS_STALL[7],TCC_WRITE[7],TCC_RW_REQ[8],TCC_TOO_MANY_EA_WRREQS_STALL[8],TCC_WRITE[8],TCC_RW_REQ[9],TCC_TOO_MANY_EA_WRREQS_STALL[9],TCC_WRITE[9],TCC_RW_REQ[10],TCC_TOO_MANY_EA_WRREQS_STALL[10],TCC_WRITE[10],TCC_RW_REQ[11],TCC_TOO_MANY_EA_WRREQS_STALL[11],TCC_WRITE[11],TCC_RW_REQ[12],TCC_TOO_MANY_EA_WRREQS_STALL[12],TCC_WRITE[12],TCC_RW_REQ[13],TCC_TOO_MANY_EA_WRREQS_STALL[13],TCC_WRITE[13],TCC_RW_REQ[14],TCC_TOO_MANY_EA_WRREQS_STALL[14],TCC_WRITE[14],TCC_RW_REQ[15],TCC_TOO_MANY_EA_WRREQS_STALL[15],TCC_WRITE[15],TCC_RW_REQ[16],TCC_TOO_MANY_EA_WRREQS_STALL[16],TCC_WRITE[16],TCC_RW_REQ[17],TCC_TOO_MANY_EA_WRREQS_STALL[17],TCC_WRITE[17],TCC_RW_REQ[18],TCC_TOO_MANY_EA_WRREQS_STALL[18],TCC_WRITE[18],TCC_RW_REQ[19],TCC_TOO_MANY_EA_WRREQS_STALL[19],TCC_WRITE[19],TCC_RW_REQ[20],TCC_TOO_MANY_EA_WRREQS_STALL[20],TCC_WRITE[20],TCC_RW_REQ[21],TCC_TOO_MANY_EA_WRREQS_STALL[21],TCC_WRITE[21],TCC_RW_REQ[22],TCC_TOO_MANY_EA_WRREQS_STALL[22],TCC_WRITE[22],TCC_RW_REQ[23],TCC_TOO_MANY_EA_WRREQS_STALL[23],TCC_WRITE[23],TCC_RW_REQ[24],TCC_TOO_MANY_EA_WRREQS_STALL[24],TCC_WRITE[24],TCC_RW_REQ[25],TCC_TOO_MANY_EA_WRREQS_STALL[25],TCC_WRITE[25],TCC_RW_REQ[26],TCC_TOO_MANY_EA_WRREQS_STALL[26],TCC_WRITE[26],TCC_RW_REQ[27],TCC_TOO_MANY_EA_WRREQS_STALL[27],TCC_WRITE[27],TCC_RW_REQ[28],TCC_TOO_MANY_EA_WRREQS_STALL[28],TCC_WRITE[28],TCC_RW_REQ[29],TCC_TOO_MANY_EA_WRREQS_STALL[29],TCC_WRITE[29],TCC_RW_REQ[30],TCC_TOO_MANY_EA_WRREQS_STALL[30],TCC_WRITE[30],TCC_RW_REQ[31],TCC_TOO_MANY_EA_WRREQS_STALL[31],TCC_WRITE[31],wave_size_10,obj_10,TCC_EA_RDREQ_IO_CREDIT_STALL[0],TCC_EA_RDREQ_LEVEL[0],TCC_EA_WRREQ[0],TCC_EA_WRREQ_64B[0],TCC_EA_RDREQ_IO_CREDIT_STALL[1],TCC_EA_RDREQ_LEVEL[1],TCC_EA_WRREQ[1],TCC_EA_WRREQ_64B[1],TCC_EA_RDREQ_IO_CREDIT_STALL[2],TCC_EA_RDREQ_LEVEL[2],TCC_EA_WRREQ[2],TCC_EA_WRREQ_64B[2],TCC_EA_RDREQ_IO_CREDIT_STALL[3],TCC_EA_RDREQ_LEVEL[3],TCC_EA_WRREQ[3],TCC_EA_WRREQ_64B[3],TCC_EA_RDREQ_IO_CREDIT_STALL[4],TCC_EA_RDREQ_LEVEL[4],TCC_EA_WRREQ[4],TCC_EA_WRREQ_64B[4],TCC_EA_RDREQ_IO_CREDIT_STALL[5],TCC_EA_RDREQ_LEVEL[5],TCC_EA_WRREQ[5],TCC_EA_WRREQ_64B[5],TCC_EA_RDREQ_IO_CREDIT_STALL[6],TCC_EA_RDREQ_LEVEL[6],TCC_EA_WRREQ[6],TCC_EA_WRREQ_64B[6],TCC_EA_RDREQ_IO_CREDIT_STALL[7],TCC_EA_RDREQ_LEVEL[7],TCC_EA_WRREQ[7],TCC_EA_WRREQ_64B[7],TCC_EA_RDREQ_IO_CREDIT_STALL[8],TCC_EA_RDREQ_LEVEL[8],TCC_EA_WRREQ[8],TCC_EA_WRREQ_64B[8],TCC_EA_RDREQ_IO_CREDIT_STALL[9],TCC_EA_RDREQ_LEVEL[9],TCC_EA_WRREQ[9],TCC_EA_WRREQ_64B[9],TCC_EA_RDREQ_IO_CREDIT_STALL[10],TCC_EA_RDREQ_LEVEL[10],TCC_EA_WRREQ[10],TCC_EA_WRREQ_64B[10],TCC_EA_RDREQ_IO_CREDIT_STALL[11],TCC_EA_RDREQ_LEVEL[11],TCC_EA_WRREQ[11],TCC_EA_WRREQ_64B[11],TCC_EA_RDREQ_IO_CREDIT_STALL[12],TCC_EA_RDREQ_LEVEL[12],TCC_EA_WRREQ[12],TCC_EA_WRREQ_64B[12],TCC_EA_RDREQ_IO_CREDIT_STALL[13],TCC_EA_RDREQ_LEVEL[13],TCC_EA_WRREQ[13],TCC_EA_WRREQ_64B[13],TCC_EA_RDREQ_IO_CREDIT_STALL[14],TCC_EA_RDREQ_LEVEL[14],TCC_EA_WRREQ[14],TCC_EA_WRREQ_64B[14],TCC_EA_RDREQ_IO_CREDIT_STALL[15],TCC_EA_RDREQ_LEVEL[15],TCC_EA_WRREQ[15],TCC_EA_WRREQ_64B[15],TCC_EA_RDREQ_IO_CREDIT_STALL[16],TCC_EA_RDREQ_LEVEL[16],TCC_EA_WRREQ[16],TCC_EA_WRREQ_64B[16],TCC_EA_RDREQ_IO_CREDIT_STALL[17],TCC_EA_RDREQ_LEVEL[17],TCC_EA_WRREQ[17],TCC_EA_WRREQ_64B[17],TCC_EA_RDREQ_IO_CREDIT_STALL[18],TCC_EA_RDREQ_LEVEL[18],TCC_EA_WRREQ[18],TCC_EA_WRREQ_64B[18],TCC_EA_RDREQ_IO_CREDIT_STALL[19],TCC_EA_RDREQ_LEVEL[19],TCC_EA_WRREQ[19],TCC_EA_WRREQ_64B[19],TCC_EA_RDREQ_IO_CREDIT_STALL[20],TCC_EA_RDREQ_LEVEL[20],TCC_EA_WRREQ[20],TCC_EA_WRREQ_64B[20],TCC_EA_RDREQ_IO_CREDIT_STALL[21],TCC_EA_RDREQ_LEVEL[21],TCC_EA_WRREQ[21],TCC_EA_WRREQ_64B[21],TCC_EA_RDREQ_IO_CREDIT_STALL[22],TCC_EA_RDREQ_LEVEL[22],TCC_EA_WRREQ[22],TCC_EA_WRREQ_64B[22],TCC_EA_RDREQ_IO_CREDIT_STALL[23],TCC_EA_RDREQ_LEVEL[23],TCC_EA_WRREQ[23],TCC_EA_WRREQ_64B[23],TCC_EA_RDREQ_IO_CREDIT_STALL[24],TCC_EA_RDREQ_LEVEL[24],TCC_EA_WRREQ[24],TCC_EA_WRREQ_64B[24],TCC_EA_RDREQ_IO_CREDIT_STALL[25],TCC_EA_RDREQ_LEVEL[25],TCC_EA_WRREQ[25],TCC_EA_WRREQ_64B[25],TCC_EA_RDREQ_IO_CREDIT_STALL[26],TCC_EA_RDREQ_LEVEL[26],TCC_EA_WRREQ[26],TCC_EA_WRREQ_64B[26],TCC_EA_RDREQ_IO_CREDIT_STALL[27],TCC_EA_RDREQ_LEVEL[27],TCC_EA_WRREQ[27],TCC_EA_WRREQ_64B[27],TCC_EA_RDREQ_IO_CREDIT_STALL[28],TCC_EA_RDREQ_LEVEL[28],TCC_EA_WRREQ[28],TCC_EA_WRREQ_64B[28],TCC_EA_RDREQ_IO_CREDIT_STALL[29],TCC_EA_RDREQ_LEVEL[29],TCC_EA_WRREQ[29],TCC_EA_WRREQ_64B[29],TCC_EA_RDREQ_IO_CREDIT_STALL[30],TCC_EA_RDREQ_LEVEL[30],TCC_EA_WRREQ[30],TCC_EA_WRREQ_64B[30],TCC_EA_RDREQ_IO_CREDIT_STALL[31],TCC_EA_RDREQ_LEVEL[31],TCC_EA_WRREQ[31],TCC_EA_WRREQ_64B[31],wave_size_11,obj_11,TCC_ATOMIC[0],TCC_CYCLE[0],TCC_EA_ATOMIC[0],TCC_EA_ATOMIC_LEVEL[0],TCC_ATOMIC[1],TCC_CYCLE[1],TCC_EA_ATOMIC[1],TCC_EA_ATOMIC_LEVEL[1],TCC_ATOMIC[2],TCC_CYCLE[2],TCC_EA_ATOMIC[2],TCC_EA_ATOMIC_LEVEL[2],TCC_ATOMIC[3],TCC_CYCLE[3],TCC_EA_ATOMIC[3],TCC_EA_ATOMIC_LEVEL[3],TCC_ATOMIC[4],TCC_CYCLE[4],TCC_EA_ATOMIC[4],TCC_EA_ATOMIC_LEVEL[4],TCC_ATOMIC[5],TCC_CYCLE[5],TCC_EA_ATOMIC[5],TCC_EA_ATOMIC_LEVEL[5],TCC_ATOMIC[6],TCC_CYCLE[6],TCC_EA_ATOMIC[6],TCC_EA_ATOMIC_LEVEL[6],TCC_ATOMIC[7],TCC_CYCLE[7],TCC_EA_ATOMIC[7],TCC_EA_ATOMIC_LEVEL[7],TCC_ATOMIC[8],TCC_CYCLE[8],TCC_EA_ATOMIC[8],TCC_EA_ATOMIC_LEVEL[8],TCC_ATOMIC[9],TCC_CYCLE[9],TCC_EA_ATOMIC[9],TCC_EA_ATOMIC_LEVEL[9],TCC_ATOMIC[10],TCC_CYCLE[10],TCC_EA_ATOMIC[10],TCC_EA_ATOMIC_LEVEL[10],TCC_ATOMIC[11],TCC_CYCLE[11],TCC_EA_ATOMIC[11],TCC_EA_ATOMIC_LEVEL[11],TCC_ATOMIC[12],TCC_CYCLE[12],TCC_EA_ATOMIC[12],TCC_EA_ATOMIC_LEVEL[12],TCC_ATOMIC[13],TCC_CYCLE[13],TCC_EA_ATOMIC[13],TCC_EA_ATOMIC_LEVEL[13],TCC_ATOMIC[14],TCC_CYCLE[14],TCC_EA_ATOMIC[14],TCC_EA_ATOMIC_LEVEL[14],TCC_ATOMIC[15],TCC_CYCLE[15],TCC_EA_ATOMIC[15],TCC_EA_ATOMIC_LEVEL[15],TCC_ATOMIC[16],TCC_CYCLE[16],TCC_EA_ATOMIC[16],TCC_EA_ATOMIC_LEVEL[16],TCC_ATOMIC[17],TCC_CYCLE[17],TCC_EA_ATOMIC[17],TCC_EA_ATOMIC_LEVEL[17],TCC_ATOMIC[18],TCC_CYCLE[18],TCC_EA_ATOMIC[18],TCC_EA_ATOMIC_LEVEL[18],TCC_ATOMIC[19],TCC_CYCLE[19],TCC_EA_ATOMIC[19],TCC_EA_ATOMIC_LEVEL[19],TCC_ATOMIC[20],TCC_CYCLE[20],TCC_EA_ATOMIC[20],TCC_EA_ATOMIC_LEVEL[20],TCC_ATOMIC[21],TCC_CYCLE[21],TCC_EA_ATOMIC[21],TCC_EA_ATOMIC_LEVEL[21],TCC_ATOMIC[22],TCC_CYCLE[22],TCC_EA_ATOMIC[22],TCC_EA_ATOMIC_LEVEL[22],TCC_ATOMIC[23],TCC_CYCLE[23],TCC_EA_ATOMIC[23],TCC_EA_ATOMIC_LEVEL[23],TCC_ATOMIC[24],TCC_CYCLE[24],TCC_EA_ATOMIC[24],TCC_EA_ATOMIC_LEVEL[24],TCC_ATOMIC[25],TCC_CYCLE[25],TCC_EA_ATOMIC[25],TCC_EA_ATOMIC_LEVEL[25],TCC_ATOMIC[26],TCC_CYCLE[26],TCC_EA_ATOMIC[26],TCC_EA_ATOMIC_LEVEL[26],TCC_ATOMIC[27],TCC_CYCLE[27],TCC_EA_ATOMIC[27],TCC_EA_ATOMIC_LEVEL[27],TCC_ATOMIC[28],TCC_CYCLE[28],TCC_EA_ATOMIC[28],TCC_EA_ATOMIC_LEVEL[28],TCC_ATOMIC[29],TCC_CYCLE[29],TCC_EA_ATOMIC[29],TCC_EA_ATOMIC_LEVEL[29],TCC_ATOMIC[30],TCC_CYCLE[30],TCC_EA_ATOMIC[30],TCC_EA_ATOMIC_LEVEL[30],TCC_ATOMIC[31],TCC_CYCLE[31],TCC_EA_ATOMIC[31],TCC_EA_ATOMIC_LEVEL[31],wave_size_12,obj_12,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,GRBM_SPI_BUSY,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TD_SPI_STALL_sum,TD_LOAD_WAVEFRONT_sum,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TCC_NC_REQ_sum,TCC_UC_REQ_sum,TCC_CC_REQ_sum,TCC_RW_REQ_sum,wave_size_13,obj_13,SQ_WAVE_CYCLES,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_BUSY_CU_CYCLES,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,TCP_UTCL1_TRANSLATION_MISS_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TCC_EA_WRREQ_sum,TCC_EA_WRREQ_64B_sum,TCC_EA_WR_UNCACHED_32B_sum,TCC_EA_WRREQ_DRAM_sum,wave_size_14,obj_14,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,TCP_TCP_LATENCY_sum,TCP_TCC_READ_REQ_LATENCY_sum,TCP_TCC_WRITE_REQ_LATENCY_sum,TCP_TCC_READ_REQ_sum,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TCC_EA_WRREQ_STALL_sum,TCC_EA_RDREQ_sum,TCC_EA_RDREQ_32B_sum,TCC_EA_RD_UNCACHED_32B_sum,wave_size_15,obj_15,SQC_ICACHE_MISSES_DUPLICATE,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,wave_size_16,obj_16,SQC_TC_DATA_WRITE_REQ,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,wave_size_17,obj_17,TCC_HIT[0],TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_HIT[1],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_HIT[2],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_HIT[3],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_HIT[4],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_HIT[5],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_HIT[6],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_HIT[7],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_HIT[8],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_HIT[9],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_HIT[10],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_HIT[11],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_HIT[12],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_HIT[13],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_HIT[14],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_HIT[15],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_HIT[16],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_HIT[17],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_HIT[18],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_HIT[19],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_HIT[20],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_HIT[21],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_HIT[22],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_HIT[23],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_HIT[24],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_HIT[25],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_HIT[26],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_HIT[27],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_HIT[28],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_HIT[29],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_HIT[30],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_HIT[31],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],wave_size_18,obj_18,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,TCP_TCC_NC_WRITE_REQ_sum,TCP_TCC_NC_ATOMIC_REQ_sum,TCP_TCC_UC_READ_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TA_FLAT_ATOMIC_WAVEFRONTS_sum,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TCC_NORMAL_EVICT_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCC_EA_ATOMIC_sum,Start_Timestamp,End_Timestamp
0,"vecCopy(double*, double*, double*, int, int) [clone .kd]",2,1048576,256,0,0,8,0,16,64,0x7f45e8864ec0,0,0,0,959816,0,0,0,1032511,0,0,0,1027354,0,0,0,1137939,21,0,0,1090811,20,0,0,1141143,0,0,0,1038463,0,0,0,1111903,0,0,0,999958,0,0,0,1019021,0,0,0,1007879,0,0,0,1094171,0,0,0,1139343,0,0,0,1153115,0,0,0,1052603,0,0,0,1122644,0,0,0,1144638,0,0,0,1033489,0,0,0,1054298,0,0,0,1118792,68,0,0,1102882,4,0,0,1168287,0,0,0,1150992,145,0,0,1208644,65,0,0,1123200,0,0,0,1110009,0,0,0,1054530,0,0,0,1113734,0,0,0,1048076,0,0,0,1042633,0,0,0,1199684,0,0,0,1241521,64,0x7f0654f40ec0,224864,125381,16384,0,16384,16384,32768,49152,28107,28107,1908028.0,1339206.0,3354.0,163080.0,1029591.0,0.0,1331594.0,1035287.0,223153,133528,28107,0,28107,0,899424.0,494622.0,0.0,0.0,64,0x7efe10100ec0,32768,32768,0,64,0x7f2d294f8ec0,0,0,0,0,0,0,168,56,131072.0,131072.0,0.0,989056.0,64,0x7f17fb4a8ec0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,130,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4097,0,0,0,4098,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,130,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4097,0,0,0,4099,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4099,0,0,0,4096,0,17,0,64,0x7f18f3b9cec0,0,65536,32768,0,0,0,16384,16384,0.0,0.0,0.0,524288.0,0.0,0.0,0.0,9699,0,815,27949,0,73035.0,131072.0,0.0,65568.0,64,0x7f0fa16e4ec0,0,0,0,0,0,0,0,114688,2097152.0,2097152.0,1048576.0,1048576.0,0.0,0.0,0.0,16384.0,12648,19258,7150,545,0,26227,204468.0,0.0,73387.0,131081.0,64,0x7f7063168ec0,10485760,65536,0,0,0,16384,0,0,131072.0,0.0,0.0,0.0,32768.0,16384.0,0,0,131083.0,35115.0,46289.0,19247.0,64,0x7f3084b78ec0,131072,0,0,0,0,0,0,0,0.0,0.0,0.0,0.0,16384,0,40107130.0,35056246.0,0.0,64,0x7fe23e274ec0,6380,0,4096,6361,0,4096,6368,0,4096,6398,0,4096,6380,0,4096,6416,0,4096,6407,0,4096,6390,0,4096,6392,0,4096,6382,0,4096,6363,0,4096,6366,0,4096,6397,0,4096,6381,0,4096,6419,0,4096,6410,0,4096,6394,0,4096,6390,0,4096,6367,0,4096,6382,0,4096,6350,0,4096,6383,0,4096,6406,0,4096,6515,0,4096,6346,0,4096,6397,0,4096,6391,0,4096,6370,0,4096,6385,0,4096,6354,0,4096,6385,0,4096,6407,0,4096,64,0x7f3bbf214ec0,0,1048775,4096,4096,0,1412295,4096,4096,0,1098048,4096,4096,0,1328166,4096,4096,0,1305513,4096,4096,0,1551157,4096,4096,0,1137886,4096,4096,0,1668744,4096,4096,0,1058675,4096,4096,0,1176828,4096,4096,0,1346323,4096,4096,0,1118734,4096,4096,0,1168012,4096,4096,0,1440504,4096,4096,0,1275507,4096,4096,0,1314191,4096,4096,0,1360783,4096,4096,0,1149962,4096,4096,0,1249657,4096,4096,0,1403804,4096,4096,0,1334334,4096,4096,0,1338248,4096,4096,0,1164659,4096,4096,0,1309164,4096,4096,0,1329707,4096,4096,0,1063559,4096,4096,0,1158681,4096,4096,0,1304918,4096,4096,0,1341379,4096,4096,0,1044580,4096,4096,0,1026281,4096,4096,0,1363026,4096,4096,64,0x7f280d968ec0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,0,28004,0,0,64,0x7f1291c08ec0,0,393216,163840,0,0,0,0,0,17292,0.0,0.0,0.0,32768.0,0.0,0.0,387.0,32768.0,4096,16384,352,27856,2144,0,56.0,6.0,0.0,204417.0,64,0x7f43d4258ec0,11018966,9879316,795586,344064,1659935,0,0,163840,832.0,515142.0,0.0,524288.0,255027.0,32768.0,520103,0,0,11806,131072.0,131072.0,0.0,131072.0,64,0x7f40c2944ec0,114688,0,32768,32768,16384,16384,65536,49152,27615661.0,86899284.0,39352299.0,131072.0,0.0,197485.0,0,0,14941,340.0,131080.0,0.0,8.0,64,0x7efd878f0ec0,1269,113822,0,0,65536,63800,56,1680,64,0x7fe20b9f8ec0,0,0,0,224,0,65536,64279,56,64,0x7ff861dacec0,2277,4096,2277,6373,2283,4096,2283,6379,2315,4096,2315,6411,2317,4096,2317,6413,2248,4096,2248,6344,2323,4096,2323,6419,2245,4096,2245,6341,2274,4096,2274,6370,2273,4097,2274,6370,2278,4096,2278,6374,2282,4096,2282,6378,2315,4096,2315,6411,2317,4096,2317,6413,2248,4096,2248,6344,2328,4098,2330,6426,2244,4096,2244,6340,2238,4096,2238,6334,2276,4096,2276,6372,2275,4097,2276,6372,2333,4096,2333,6429,2278,4096,2278,6374,2269,4096,2269,6365,2289,4096,2289,6385,2508,4099,2511,6607,2292,4098,2294,6390,2238,4096,2238,6334,2277,4096,2277,6373,2279,4096,2279,6375,2339,4096,2339,6435,2279,4096,2279,6375,2273,4096,2273,6369,2292,4096,2292,6388,64,0x7f8f3aa1cec0,0,0,1048576,0,0,0,0,0,0.0,0.0,0.0,0.0,16384.0,0.0,0,32768,65551.0,0.0,0.0,0.0,1412582414437599,1412582414457599
1,"vecCopy(double*, double*, double*, int, int) [clone .kd]",2,1048576,256,0,0,8,0,16,64,0x7f45e8864ec0,1958,0,0,2190946,659,0,0,2390786,251,0,0,2000387,418,0,0,1965535,1465,0,0,2478621,1551,0,0,2629908,961,0,0,2093922,0,0,0,1828696,0,0,0,1862561,481,0,0,2178693,186,0,0,2066939,583,0,0,2012375,388,0,0,2240373,1129,0,0,2347013,421,0,0,2253231,304,0,0,2129376,0,0,0,1800233,3255,0,0,2903220,374,0,0,2030487,4040,0,0,3015260,0,0,0,1868923,371,0,0,2222800,789,0,0,2040544,392,0,0,2010724,208,0,0,1725030,0,0,0,1649937,1511,0,0,2604944,645,0,0,2032011,3175,0,0,2845524,1082,0,0,2214342,704,0,0,2315256,1243,0,0,2307227,64,0x7f0654f40ec0,326280,220152,16384,0,16384,16384,32768,49152,40784,40784,3138787.0,2356052.0,3863.0,329884.0,1734545.0,0.0,2344234.0,2036761.0,326272,229315,40784,0,40784,0,1305088.0,770272.0,0.0,0.0,64,0x7efe10100ec0,32768,32768,0,64,0x7f2d294f8ec0,0,0,0,0,0,0,0,56,131072.0,131072.0,0.0,2016056.0,64,0x7f17fb4a8ec0,4096,0,690,0,4096,0,2007,0,4096,0,342,0,4096,0,80,0,4096,0,465,0,4096,0,1904,0,4096,0,0,0,4097,0,712,0,4096,0,695,0,4096,0,65,0,4096,0,150,0,4096,0,77,0,4099,0,0,0,4098,0,16,0,4096,0,541,0,4096,0,142,0,4096,0,222,0,4096,0,1033,0,4096,0,382,0,4096,0,1107,0,4096,0,151,0,4096,0,222,0,4097,0,312,0,4097,0,243,0,4096,0,376,0,4096,0,154,0,4096,0,283,0,4096,0,254,0,4096,0,95,0,4096,0,140,0,4099,0,127,0,4096,0,729,0,64,0x7f18f3b9cec0,0,65536,32768,0,0,0,16384,16384,0.0,0.0,0.0,524288.0,0.0,0.0,0.0,16061,0,819,36368,0,69512.0,131072.0,0.0,45724.0,64,0x7f0fa16e4ec0,0,0,0,0,0,0,0,114688,2097152.0,2097152.0,1048576.0,1048576.0,0.0,0.0,0.0,16384.0,32624,29146,9689,3129,0,39320,201375.0,0.0,70291.0,131084.0,64,0x7f7063168ec0,10485760,65536,0,0,0,16384,0,0,131072.0,0.0,0.0,0.0,32768.0,16384.0,0,0,131072.0,87493.0,45614.0,0.0,64,0x7f3084b78ec0,131072,0,0,0,0,0,0,0,0.0,0.0,0.0,0.0,16384,0,117369585.0,58816453.0,0.0,64,0x7fe23e274ec0,6264,0,4096,6287,0,4096,6253,0,4096,6298,0,4096,6274,0,4096,6245,0,4096,6293,0,4096,6315,0,4096,6316,0,4096,6268,0,4096,6289,0,4096,6254,0,4096,6297,0,4096,6278,0,4096,6244,0,4096,6299,0,4096,6260,0,4096,6312,0,4096,6255,0,4096,6272,0,4096,6291,0,4096,6264,0,4096,6278,0,4096,6272,0,4096,6275,0,4096,6263,0,4096,6312,0,4096,6260,0,4096,6268,0,4096,6294,0,4096,6263,0,4096,6279,0,4096,64,0x7f3bbf214ec0,0,4683334,2852,2852,0,3278654,2898,2898,0,3174777,2828,2828,0,4436132,2856,2856,0,2891793,2880,2880,0,3908965,2852,2852,0,3305618,2856,2856,0,4200457,2816,2816,0,3311269,2816,2816,0,3158797,2848,2848,0,2781615,2900,2900,0,3140924,2828,2828,0,3666451,2856,2856,0,3039961,2884,2884,0,3084192,2844,2844,0,3100762,2856,2856,0,3462098,2812,2812,0,3731539,2852,2852,0,4482250,2856,2856,0,3859595,2848,2848,0,3297823,2816,2816,0,3298269,2864,2864,0,4979024,2840,2840,0,4226647,2832,2832,0,2855540,2832,2832,0,3878724,2812,2812,0,3751461,2852,2852,0,4042774,2860,2860,0,3624801,2848,2848,0,2574082,2816,2816,0,3226755,2864,2864,0,4349907,2838,2838,64,0x7f280d968ec0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,0,41402,0,0,64,0x7f1291c08ec0,0,393216,163840,0,0,0,0,0,29502,0.0,0.0,0.0,32768.0,0.0,0.0,222.0,32768.0,4096,16384,302,41819,2075,0,56.0,9.0,0.0,200718.0,64,0x7f43d4258ec0,19849945,18380829,1125052,344064,2838809,0,0,163840,832.0,515140.0,0.0,524288.0,566571.0,32768.0,1039119,0,0,13271,90882.0,90882.0,0.0,90882.0,64,0x7f40c2944ec0,114688,0,32768,32768,16384,16384,65536,49152,57714196.0,197999237.0,51088640.0,131072.0,0.0,481350.0,0,0,24387,4936.0,131081.0,0.0,16.0,64,0x7efd878f0ec0,0,180414,0,0,65536,63800,56,1680,64,0x7fe20b9f8ec0,0,0,0,56,0,65536,65536,0,64,0x7ff861dacec0,2157,4096,2157,6253,2185,4096,2185,6281,2161,4096,2161,6257,2165,4096,2165,6261,2163,4096,2163,6259,2162,4096,2162,6258,2160,4096,2160,6256,2176,4096,2176,6272,2179,4097,2180,6276,2162,4096,2162,6258,2185,4096,2185,6281,2160,4096,2160,6256,2172,4096,2172,6268,2158,4096,2158,6254,2162,4098,2164,6260,2156,4096,2156,6252,2161,4096,2161,6257,2190,4096,2190,6286,2203,4097,2204,6300,2188,4096,2188,6284,2172,4096,2172,6268,2168,4097,2169,6265,2168,4096,2168,6264,2226,4097,2227,6323,2175,4098,2177,6273,2164,4096,2164,6260,2188,4096,2188,6284,2202,4096,2202,6298,2197,4096,2197,6293,2168,4099,2171,6267,2166,4096,2166,6262,2165,4096,2165,6261,64,0x7f8f3aa1cec0,0,0,1048576,0,0,0,0,0,0.0,0.0,0.0,0.0,16384.0,0.0,0,32768,65550.0,0.0,0.0,0.0,1412582414476479,1412582414491999
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