Rahul Manocha c4f7593001 clr: Update signal count and pool size for staging buffer (#2889) ...

* clr: Update signal count and pool size for staging buffer

* Change to naming of variables etc

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Co-authored-by: Rahul Manocha <rmanocha@amd.com>

2026-01-29 10:34:00 -08:00

..

cmake

SWDEV-558849 - Add support for static linking with ROCR (#2659)

2026-01-20 14:53:01 -05:00

compiler/lib/utils

SWDEV-556684 - HSAIL Cleanup re-apply commit 4abdfe5: (#2024)

2025-12-10 09:09:12 -08:00

device

clr: Update signal count and pool size for staging buffer (#2889)

2026-01-29 10:34:00 -08:00

elf

SWDEV-556684 - HSAIL cleanup (#1657)

2025-11-08 02:22:03 -08:00

include

SWDEV-516307 - Clean up ICD references in HIP (#1019)

2025-10-08 09:49:35 -04:00

os

SWDEV-565304 - Pass numa node to migrate pages correctly (#1729)

2025-12-19 13:36:53 -08:00

platform

clr: Implement dynamic stream to HWq logic (#1958)

2026-01-23 10:40:54 -08:00

thread

SWDEV-558844 - Cleanup Os header (#1530)

2025-10-27 11:52:31 -04:00

utils

SWDEV-576718 - provide option to limit memory cache usage (#2810)

2026-01-26 11:35:01 -05:00

.gitattributes

SWDEV-1 - fix line endings for .asm files

2021-08-22 23:56:08 -07:00

.gitignore

Add .gitignore file.

2020-02-18 11:09:50 -05:00

CMakeLists.txt

SWDEV-509213 - make cmake_minimum_required consistent across clr (#51)

2025-04-15 15:23:41 +05:30

LICENSE.md

LICENSE clean up (#919)

2025-09-10 12:06:14 -04:00