ea624cbb7c
Change-Id: I3cbb787ef27d90486b212dfb1a8c77c460acc2ac
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
[ROCm/rdc commit: 434e40305d]
180 satır
6.3 KiB
C++
180 satır
6.3 KiB
C++
/*
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Copyright (c) 2021 - present Advanced Micro Devices, Inc. All rights reserved.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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*/
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#ifndef RDC_MODULES_RDC_ROCR_RDCROCRBASE_H_
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#define RDC_MODULES_RDC_ROCR_RDCROCRBASE_H_
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#include <stdint.h>
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#include <stdio.h>
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#include <string>
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#include "hsa/hsa.h"
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#include "hsa/hsa_ext_amd.h"
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#include "rdc_lib/RdcPerfTimer.h"
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namespace amd {
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namespace rdc {
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/// Common interface for RocR tests and samples
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class RdcRocrBase {
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public:
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RdcRocrBase(void);
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virtual ~RdcRocrBase(void);
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///< Setters and Getters
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void set_gpu_device1(hsa_agent_t in_dev) { gpu_device1_.handle = in_dev.handle; }
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hsa_agent_t* gpu_device1(void) { return &gpu_device1_; }
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void set_cpu_device(hsa_agent_t in_dev) { cpu_device_.handle = in_dev.handle; }
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hsa_agent_t* cpu_device(void) { return &cpu_device_; }
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void set_kernel_file_name(const char* in_file_name) { kernel_file_name_ = in_file_name; }
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std::string const kernel_file_name(void) const { return kernel_file_name_; }
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void set_kernel_name(std::string in_kernel_name) { kernel_name_ = in_kernel_name; }
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std::string const kernel_name(void) const { return kernel_name_; }
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void set_agent_name(std::string in_agent_name) { agent_name_ = in_agent_name; }
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std::string const get_agent_name(void) const { return agent_name_; }
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void set_kernel_object(uint64_t in_kernel_object) { kernel_object_ = in_kernel_object; }
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uint64_t kernel_object(void) const { return kernel_object_; }
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void set_profile(hsa_profile_t in_prof) { profile_ = in_prof; }
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hsa_profile_t profile(void) const { return profile_; }
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uint32_t private_segment_size(void) const { return private_segment_size_; }
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void set_private_segment_size(uint32_t sz) { private_segment_size_ = sz; }
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void set_group_segment_size(uint32_t sz) { group_segment_size_ = sz; }
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uint32_t group_segment_size(void) const { return group_segment_size_; }
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void set_group_size(uint32_t sz) { group_size_ = sz; }
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uint32_t group_size(void) const { return group_size_; }
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void set_main_queue(hsa_queue_t* q) { main_queue_ = q; }
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hsa_queue_t* main_queue(void) const { return main_queue_; }
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hsa_kernel_dispatch_packet_t& aql(void) { return aql_; }
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void set_num_iteration(int num) { num_iteration_ = num; }
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uint32_t num_iteration(void) const { return num_iteration_; }
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hsa_amd_memory_pool_t& device_pool(void) { return device_pool_; }
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hsa_amd_memory_pool_t& cpu_pool(void) { return cpu_pool_; }
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hsa_amd_memory_pool_t& kern_arg_pool(void) { return kern_arg_pool_; }
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void set_kernarg_size(uint32_t sz) { kernarg_size_ = sz; }
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uint32_t kernarg_size(void) const { return kernarg_size_; }
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void set_kernarg_align(uint32_t align) { kernarg_align_ = align; }
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uint32_t kernarg_align(void) const { return kernarg_align_; }
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void* kernarg_buffer(void) const { return kernarg_buffer_; }
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void set_kernarg_buffer(void* buffer) { kernarg_buffer_ = buffer; }
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int32_t requires_profile(void) const { return requires_profile_; }
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char* orig_hsa_enable_interrupt() const { return orig_hsa_enable_interrupt_; }
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bool enable_interrupt() const { return enable_interrupt_; }
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void set_title(std::string name) { title_ = name; }
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std::string title(void) const { return title_; }
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RdcPerfTimer* hsa_timer(void) { return &hsa_timer_; }
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void set_verbosity(uint32_t v) { verbosity_ = v; }
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uint32_t verbosity(void) const { return verbosity_; }
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void set_monitor_verbosity(uint32_t m) { monitor_verbosity_ = m; }
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uint32_t monitor_verbosity(void) const { return monitor_verbosity_; }
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protected:
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void set_requires_profile(int32_t reqd_prof) { requires_profile_ = reqd_prof; }
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void set_enable_interrupt(bool doEnable) { enable_interrupt_ = doEnable; }
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private:
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uint64_t num_iteration_; ///< Number of times to execute test
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hsa_queue_t* main_queue_; ///< AQL queue used for packets
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hsa_agent_t gpu_device1_; ///< Handle to first GPU found
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hsa_agent_t cpu_device_; ///< Handle to CPU
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hsa_amd_memory_pool_t device_pool_; ///< Memory pool on gpu pool list
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hsa_amd_memory_pool_t cpu_pool_; ///< Memory pool on cpu pool list
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hsa_amd_memory_pool_t kern_arg_pool_; ///< Memory pool suitable for args
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uint64_t kernel_object_; ///< Handle to kernel code
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std::string kernel_file_name_; ///< Code object file name
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std::string kernel_name_; ///< Kernel name
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std::string agent_name_; ///< Agent name
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hsa_kernel_dispatch_packet_t aql_; ///< Kernel dispatch packet
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uint32_t group_segment_size_; ///< Kernel group seg size
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uint32_t kernarg_size_; ///< Kernarg memory size
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uint32_t kernarg_align_; ///< Alignment for kern argument memory
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void* kernarg_buffer_; ///< Unaligned allocated kernel arg. buffer
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hsa_profile_t profile_; ///< Device profile.
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uint32_t group_size_; ///< Number of work items in one group
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uint32_t private_segment_size_; ///< Kernel private seg size
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int32_t requires_profile_; ///< Profile required by test (-1 if no req.)
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char* orig_hsa_enable_interrupt_; ///< Orig. value of HSA_ENABLE_INTERRUPT
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bool enable_interrupt_; ///< Whether to enable/disable interrupts for test
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std::string title_; ///< Displayed title of test
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uint32_t verbosity_; ///< How much additional output to produce
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uint32_t monitor_verbosity_; ///< verbose or not
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RdcPerfTimer hsa_timer_; ///< Timer to be used for timing parts of test
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};
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} // namespace rdc
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} // namespace amd
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#endif // RDC_MODULES_RDC_ROCR_RDCROCRBASE_H_
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