857e5ef3ce
Co-authored-by: Eisuke Kawashima <e-kwsm@users.noreply.github.com> Co-authored-by: systems-assistant[bot] <systems-assistant[bot]@users.noreply.github.com> Co-authored-by: Maisam Arif <Maisam.Arif@amd.com>
125 wiersze
3.8 KiB
C++
125 wiersze
3.8 KiB
C++
/*
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* =============================================================================
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* ROC Runtime Conformance Release License
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* =============================================================================
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* The University of Illinois/NCSA
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* Open Source License (NCSA)
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*
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* Copyright (c) 2025, Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Developed by:
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*
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* AMD Research and AMD ROC Software Development
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*
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* Advanced Micro Devices, Inc.
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*
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* www.amd.com
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal with the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimers.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimers in
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* the documentation and/or other materials provided with the distribution.
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* - Neither the names of <Name of Development Group, Name of Institution>,
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* nor the names of its contributors may be used to endorse or promote
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* products derived from this Software without specific prior written
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* permission.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS WITH THE SOFTWARE.
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*
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*/
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#ifndef INCLUDE_ROCM_SMI_ROCM_SMI_COUNTERS_H_
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#define INCLUDE_ROCM_SMI_ROCM_SMI_COUNTERS_H_
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#include <linux/perf_event.h>
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#include <cstdint>
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#include <vector>
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#include <unordered_set>
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#include <string>
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#include "rocm_smi/rocm_smi.h"
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namespace amd {
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namespace smi {
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namespace evt {
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class RSMIEventGrpHashFunction {
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public:
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size_t operator()(const rsmi_event_group_t& grp) const {
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return static_cast<size_t>(grp);
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}
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};
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typedef std::unordered_set<rsmi_event_group_t, RSMIEventGrpHashFunction>
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dev_evt_grp_set_t;
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void
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GetSupportedEventGroups(uint32_t dev_ind, dev_evt_grp_set_t*supported_grps);
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struct evnt_info_t {
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uint8_t start_bit;
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uint8_t field_size;
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uint64_t value;
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};
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struct perf_read_format_t {
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union {
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struct {
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uint64_t value;
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uint64_t enabled_time;
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uint64_t run_time;
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};
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uint64_t values[3];
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};
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};
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class Event {
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public:
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explicit Event(rsmi_event_type_t event, uint32_t dev_ind);
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~Event(void);
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int32_t openPerfHandle();
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int32_t startCounter(void);
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int32_t stopCounter(void);
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uint32_t getValue(rsmi_counter_value_t *val);
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uint32_t dev_file_ind(void) const {return dev_file_ind_;}
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uint32_t dev_ind(void) const {return dev_ind_;}
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private:
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// perf_event_attr fields
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std::vector<evnt_info_t> event_info_;
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std::string evt_path_root_;
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rsmi_event_type_t event_type_;
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uint32_t dev_file_ind_;
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uint32_t dev_ind_;
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int32_t fd_;
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perf_event_attr attr_;
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uint64_t prev_cntr_val_;
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int32_t get_event_file_info(void);
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int32_t get_event_type(uint32_t *ev_type);
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};
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} // namespace evt
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} // namespace smi
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} // namespace amd
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#endif // INCLUDE_ROCM_SMI_ROCM_SMI_COUNTERS_H_
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