Peter Park
161 rivejä
5.2 KiB
C++
161 rivejä
5.2 KiB
C++
/*
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* =============================================================================
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* The University of Illinois/NCSA
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* Open Source License (NCSA)
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*
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* Copyright (c) 2017-2025, Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Developed by:
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*
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* AMD Research and AMD ROC Software Development
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*
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* Advanced Micro Devices, Inc.
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*
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* www.amd.com
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal with the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimers.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimers in
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* the documentation and/or other materials provided with the distribution.
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* - Neither the names of <Name of Development Group, Name of Institution>,
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* nor the names of its contributors may be used to endorse or promote
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* products derived from this Software without specific prior written
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* permission.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS WITH THE SOFTWARE.
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*
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*/
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#ifndef INCLUDE_ROCM_SMI_ROCM_SMI_PROPERTIES_H_
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#define INCLUDE_ROCM_SMI_ROCM_SMI_PROPERTIES_H_
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#include "rocm_smi/rocm_smi_common.h"
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#include "rocm_smi/rocm_smi.h"
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#include <cstdint>
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#include <map>
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namespace amd {
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namespace smi {
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//
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// Property reinforcement check list
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//
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using AMDGpuPropertyId_t = uint32_t;
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using AMDGpuDevIdx_t = uint32_t;
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using AMDGpuVerbId_t = uint32_t;
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using AMDGpuAsicId_t = uint16_t;
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using AMDGpuAsicRevId_t = uint16_t;
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using AMDGpuOpModeType_t = uint8_t;
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enum class AMDGpuVerbTypes_t : AMDGpuVerbId_t
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{
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kNone = 0,
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kSetGpuPciBandwidth,
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kSetPowerCap,
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kSetGpuPowerProfile,
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kSetGpuClkRange,
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kSetGpuOdClkInfo,
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kSetGpuOdVoltInfo,
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kSetGpuPerfLevelV1,
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kSetGpuPerfLevel,
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kGetGpuPowerProfilePresets,
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kResetGpu,
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kSetGpuPerfDeterminismMode,
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kSetGpuFanSpeed,
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kResetGpuFan,
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kSetClkFreq,
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kSetGpuOverdriveLevelV1,
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kSetGpuOverdriveLevel,
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kGetGpuFanRpms,
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kGetGpuFanSpeed,
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kGetGpuFanSpeedMax,
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kGetGpuVoltMetric,
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kGetGpuOverDriveLevel,
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kGetGpuOdVoltInfo,
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kGetGpuOdVoltCurveRegions,
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};
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using AMDGpuVerbList_t = std::map<AMDGpuVerbTypes_t, std::string>;
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enum class AMDGpuPropertyTypesOffset_t : AMDGpuPropertyId_t
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{
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kNone = 0,
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kDevInfoTypes = (0x1000 << 0),
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kMonitorTypes = (0x1000 << 1),
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kPerfTypes = (0x1000 << 2),
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kClkTypes = (0x1000 << 3),
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kVoltMetricTypes = (0x1000 << 4),
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};
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using AMDGpuPropertyOffsetType = std::underlying_type<AMDGpuPropertyTypesOffset_t>::type;
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using AMDGpuPropertyTypesOffsetList_t = std::map<AMDGpuPropertyTypesOffset_t, std::string>;
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AMDGpuPropertyTypesOffset_t operator| (AMDGpuPropertyTypesOffset_t lhs, AMDGpuPropertyTypesOffset_t rhs);
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AMDGpuPropertyTypesOffset_t operator& (AMDGpuPropertyTypesOffset_t lhs, AMDGpuPropertyTypesOffset_t rhs);
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enum class AMDGpuPropertyOpModeTypes_t : AMDGpuOpModeType_t
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{
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kBareMetal = (0x1 << 0),
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kSrIov = (0x1 << 1),
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kBoth = (0x1 << 2),
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};
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using AMDGpuPropertyOpModeType = std::underlying_type<AMDGpuPropertyOpModeTypes_t>::type;
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using AMDGpuOpModeList_t = std::map<AMDGpuPropertyOpModeTypes_t, std::string>;
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AMDGpuPropertyOpModeTypes_t operator| (AMDGpuPropertyOpModeTypes_t lhs, AMDGpuPropertyOpModeTypes_t rhs);
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AMDGpuPropertyOpModeTypes_t operator& (AMDGpuPropertyOpModeTypes_t lhs, AMDGpuPropertyOpModeTypes_t rhs);
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struct AMDGpuProperties_t
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{
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AMDGpuAsicRevId_t m_pci_rev_id;
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AMDGpuPropertyId_t m_property;
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AMDGpuVerbTypes_t m_verb_id;
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AMDGpuPropertyOpModeTypes_t m_opmode;
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bool m_should_be_available;
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};
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using AMDGpuPropertyList_t = std::multimap<AMDGpuAsicId_t, AMDGpuProperties_t>;
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struct AMDGpuPropertyQuery_t
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{
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AMDGpuAsicId_t m_asic_id;
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AMDGpuAsicRevId_t m_pci_rev_id;
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AMDGpuDevIdx_t m_dev_idx;
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AMDGpuPropertyId_t m_property;
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AMDGpuVerbTypes_t m_verb_id;
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};
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//
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AMDGpuPropertyId_t make_unique_property_id(AMDGpuPropertyTypesOffset_t type_offset, AMDGpuPropertyId_t property_id);
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AMDGpuPropertyId_t unmake_unique_property_id(AMDGpuPropertyId_t property_id);
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rsmi_status_t validate_property_reinforcement_query(uint32_t dv_ind,
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AMDGpuVerbTypes_t dev_info_type,
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rsmi_status_t actual_error_code);
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void dump_amdgpu_property_reinforcement_list();
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} // namespace smi
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} // namespace amd
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#endif // INCLUDE_ROCM_SMI_ROCM_SMI_DEVICE_H_
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