f9cdc37350
Set execute permission for HSA allocated memory
We need execute permission for HSA memory (req for IB buffers).
Enforcement is upcoming which will break counter collection (see ticket).
Change-Id: Id939bbdd8686915407bc60d0dfcd5110b0e91e90
Co-authored-by: Benjamin Welton <bewelton@amd.com>
Co-authored-by: Bhardwaj, Gopesh <Gopesh.Bhardwaj@amd.com>
[ROCm/rocprofiler commit: 6cc5501260]
373 lines
16 KiB
C++
373 lines
16 KiB
C++
/*
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* =============================================================================
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* ROC Runtime Conformance Release License
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* =============================================================================
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* The University of Illinois/NCSA
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* Open Source License (NCSA)
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*
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* Copyright (c) 2017, Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Developed by:
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*
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* AMD Research and AMD ROC Software Development
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*
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* Advanced Micro Devices, Inc.
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*
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* www.amd.com
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal with the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimers.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimers in
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* the documentation and/or other materials provided with the distribution.
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* - Neither the names of <Name of Development Group, Name of Institution>,
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* nor the names of its contributors may be used to endorse or promote
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* products derived from this Software without specific prior written
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* permission.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS WITH THE SOFTWARE.
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*
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*/
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#include <cassert>
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#include <iostream>
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#include "hsa/hsa.h"
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#include "hsa/hsa_ext_amd.h"
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#define RET_IF_HSA_ERR(err) \
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{ \
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if ((err) != HSA_STATUS_SUCCESS) { \
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const char* msg = 0; \
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hsa_status_string(err, &msg); \
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std::cout << "hsa api call failure at line " << __LINE__ << ", file: " << __FILE__ \
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<< ". Call returned " << err << std::endl; \
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std::cout << msg << std::endl; \
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return (err); \
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} \
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}
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static const uint32_t kTestFillValue1 = 0xabcdef12;
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static const uint32_t kTestFillValue2 = 0xba5eba11;
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static const uint32_t kTestFillValue3 = 0xfeed5a1e;
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static const uint32_t kTestInitValue = 0xbaadf00d;
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// This structure holds an agent pointer and associated memory pool to be used
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// for this test program.
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struct async_mem_cpy_agent {
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hsa_agent_t dev;
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hsa_amd_memory_pool_t pool;
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size_t granule;
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void* ptr;
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};
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struct async_mem_cpy_pool_query {
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async_mem_cpy_agent* pool_info;
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hsa_agent_t peer_device;
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};
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struct callback_args {
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struct async_mem_cpy_agent cpu;
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struct async_mem_cpy_agent gpu1;
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struct async_mem_cpy_agent gpu2;
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};
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// Find the least common multiple of 2 numbers
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static uint32_t lcm(uint32_t a, uint32_t b) {
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int tmp_a;
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int tmp_b;
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tmp_a = a;
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tmp_b = b;
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while (tmp_a != tmp_b) {
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if (tmp_a < tmp_b) {
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tmp_a = tmp_a + a;
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} else {
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tmp_b = tmp_b + b;
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}
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}
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return tmp_a;
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}
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// This function is a callback for hsa_amd_agent_iterate_memory_pools()
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// and will test whether the provided memory pool is 1) in the GLOBAL
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// segment, 2) allows allocation and 3) is accessible by the provided
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// agent. The "data" input parameter is assumed to be pointing to a
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// struct async_mem_cpy_agent. If the provided pool meets these criteria,
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// HSA_STATUS_INFO_BREAK is returned.
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static hsa_status_t FindPool(hsa_amd_memory_pool_t in_pool, void* data) {
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hsa_amd_segment_t segment;
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hsa_status_t err;
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if (nullptr == data) {
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return HSA_STATUS_ERROR_INVALID_ARGUMENT;
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}
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struct async_mem_cpy_pool_query* args = (struct async_mem_cpy_pool_query*)data;
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err = hsa_amd_memory_pool_get_info(in_pool, HSA_AMD_MEMORY_POOL_INFO_SEGMENT, &segment);
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RET_IF_HSA_ERR(err);
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if (segment != HSA_AMD_SEGMENT_GLOBAL) {
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return HSA_STATUS_SUCCESS;
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}
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bool canAlloc;
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err = hsa_amd_memory_pool_get_info(in_pool, HSA_AMD_MEMORY_POOL_INFO_RUNTIME_ALLOC_ALLOWED,
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&canAlloc);
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RET_IF_HSA_ERR(err);
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if (!canAlloc) {
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return HSA_STATUS_SUCCESS;
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}
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if (args->peer_device.handle != 0) {
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hsa_amd_memory_pool_access_t access = HSA_AMD_MEMORY_POOL_ACCESS_NEVER_ALLOWED;
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err = hsa_amd_agent_memory_pool_get_info(args->peer_device, in_pool,
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HSA_AMD_AGENT_MEMORY_POOL_INFO_ACCESS, &access);
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RET_IF_HSA_ERR(err);
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if (access == HSA_AMD_MEMORY_POOL_ACCESS_NEVER_ALLOWED) {
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return HSA_STATUS_SUCCESS;
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}
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}
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err = hsa_amd_memory_pool_get_info(in_pool, HSA_AMD_MEMORY_POOL_INFO_RUNTIME_ALLOC_GRANULE,
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&args->pool_info->granule);
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RET_IF_HSA_ERR(err);
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args->pool_info->pool = in_pool;
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return HSA_STATUS_INFO_BREAK;
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}
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// This function is meant to be a callback to hsa_iterate_agents. For each
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// input agent the iterator provides as input, this function will check to
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// see if the input agent is a CPU agent. If so, it will update the
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// async_mem_cpy_agent structure pointed to by the input parameter "data".
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// Return values:
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// HSA_STATUS_INFO_BREAK -- CPU agent has been found and stored. Iterator
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// should stop iterating
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// HSA_STATUS_SUCCESS -- CPU agent has not yet been found; iterator
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// should keep iterating
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// Other -- Some error occurred
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static hsa_status_t FindCPUDevice(hsa_agent_t agent, void* data) {
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if (data == NULL) {
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return HSA_STATUS_ERROR_INVALID_ARGUMENT;
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}
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hsa_device_type_t hsa_device_type;
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hsa_status_t err = hsa_agent_get_info(agent, HSA_AGENT_INFO_DEVICE, &hsa_device_type);
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RET_IF_HSA_ERR(err);
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if (hsa_device_type == HSA_DEVICE_TYPE_CPU) {
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struct async_mem_cpy_agent* args = (struct async_mem_cpy_agent*)data;
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args->dev = agent;
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async_mem_cpy_pool_query pool_query;
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pool_query.peer_device.handle = 0;
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pool_query.pool_info = args;
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err = hsa_amd_agent_iterate_memory_pools(agent, FindPool, &pool_query);
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if (err == HSA_STATUS_INFO_BREAK) { // we found what we were looking for
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return HSA_STATUS_INFO_BREAK;
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} else {
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args->dev = {0};
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return err;
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}
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}
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// Returning HSA_STATUS_SUCCESS tells the calling iterator to keep iterating
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return HSA_STATUS_SUCCESS;
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}
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// This function is meant to be a callback to hsa_iterate_agents. It will
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// attempt to find 2, or at least 1 GPU agent suitable for our test. The data
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// input parameter should point to a callback_args struct. The 2 GPU fields
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// will be updated as GPUs are discovered.
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// Return values:
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// HSA_STATUS_INFO_BREAK -- 2 GPU agents have been found and stored. Iterator
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// should stop iterating
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// HSA_STATUS_SUCCESS -- 2 GPU agents have not yet been found; 0 or 1 may
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// have been found; iterator function should keep iterating
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// Other -- Some error occurred
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static hsa_status_t FindGPUs(hsa_agent_t agent, void* data) {
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if (data == NULL) {
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return HSA_STATUS_ERROR_INVALID_ARGUMENT;
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}
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hsa_device_type_t hsa_device_type;
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hsa_status_t err = hsa_agent_get_info(agent, HSA_AGENT_INFO_DEVICE, &hsa_device_type);
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RET_IF_HSA_ERR(err);
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if (hsa_device_type != HSA_DEVICE_TYPE_GPU) {
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return HSA_STATUS_SUCCESS;
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}
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struct callback_args* args = (struct callback_args*)data;
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struct async_mem_cpy_agent* gpu;
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async_mem_cpy_pool_query pool_query = {0, 0};
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if (args->gpu1.dev.handle == 0) {
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gpu = &args->gpu1;
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} else {
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gpu = &args->gpu2;
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// Check that gpu1 has peer access into the selected pool.
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pool_query.peer_device = args->gpu1.dev;
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}
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// Make sure GPU device has pool host can access
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gpu->dev = agent;
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pool_query.pool_info = gpu;
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err = hsa_amd_agent_iterate_memory_pools(agent, FindPool, &pool_query);
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if (err == HSA_STATUS_INFO_BREAK) {
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if (gpu == &args->gpu2) {
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// We found 2 gpu's
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return HSA_STATUS_INFO_BREAK;
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} else {
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// Keep looking for another gpu
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return HSA_STATUS_SUCCESS;
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}
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} else {
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gpu->dev = {0};
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}
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RET_IF_HSA_ERR(err);
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// Returning HSA_STATUS_SUCCESS tells the calling iterator to keep iterating
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return HSA_STATUS_SUCCESS;
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}
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// This is the main test, showing various paths of async. copy. Source and
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// destination agents and their respective pools should already be discovered.
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// Additionally, buffer from the pools should already be allocated and availble
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// from the input parameters.
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static hsa_status_t AsyncCpyTest(async_mem_cpy_agent* dst, async_mem_cpy_agent* src,
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callback_args* args, size_t sz, uint32_t val) {
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hsa_status_t err;
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hsa_signal_t copy_signal;
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// Initialize the system and destination buffers with a value so we can later
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// validate it has been overwritten
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void* sysPtr = args->cpu.ptr;
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err = hsa_amd_memory_fill(sysPtr, kTestInitValue, sz / sizeof(uint32_t));
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RET_IF_HSA_ERR(err);
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if (dst->ptr != sysPtr) {
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err = hsa_amd_memory_fill(dst->ptr, kTestInitValue, sz / sizeof(uint32_t));
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RET_IF_HSA_ERR(err);
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}
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// Fill the source buffer with the provided uint32_t value
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err = hsa_amd_memory_fill(src->ptr, val, sz / sizeof(uint32_t));
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RET_IF_HSA_ERR(err);
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// Make sure the target and destination agents have access to the buffer.
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hsa_agent_t ag_list[2] = {dst->dev, src->dev};
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err = hsa_amd_agents_allow_access(2, ag_list, NULL, dst->ptr);
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RET_IF_HSA_ERR(err);
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// Create a signal that will be used to inform us when the copy is done
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err = hsa_signal_create(1, 0, NULL, ©_signal);
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RET_IF_HSA_ERR(err);
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// Do the copy...
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err = hsa_amd_memory_async_copy(dst->ptr, dst->dev, src->ptr, src->dev, sz, 0, NULL, copy_signal);
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RET_IF_HSA_ERR(err);
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// Here we do a blocking wait. Alternatively, we could also use a
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// non-blocking wait in a loop, and do other work while waiting.
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if (hsa_signal_wait_relaxed(copy_signal, HSA_SIGNAL_CONDITION_LT, 1, -1,
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HSA_WAIT_STATE_BLOCKED) != 0) {
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printf("Async copy returned error value.\n");
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return HSA_STATUS_ERROR;
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}
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// Verify the copy was successful; copy from the dst buffer to the sysBuf,
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// (if the result is not already in sys. mem.) and check the sysBuf values
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if (dst->ptr != sysPtr) {
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if (src->ptr != sysPtr) {
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// In this case, we need to give the gpu dev that owns dst->ptr access
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// to the system memory we are going to copy to.
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hsa_agent_t ag_list_ck[2] = {dst->dev, args->cpu.dev};
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err = hsa_amd_agents_allow_access(2, ag_list_ck, NULL, sysPtr);
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RET_IF_HSA_ERR(err);
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}
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// Reset signal to 1
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hsa_signal_store_screlease(copy_signal, 1);
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err = hsa_amd_memory_async_copy(sysPtr, args->cpu.dev, dst->ptr, dst->dev, sz, 0, NULL,
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copy_signal);
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RET_IF_HSA_ERR(err);
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if (hsa_signal_wait_relaxed(copy_signal, HSA_SIGNAL_CONDITION_LT, 1, -1,
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HSA_WAIT_STATE_BLOCKED) != 0) {
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printf("Async copy returned error value.\n");
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return HSA_STATUS_ERROR;
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}
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}
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// Check that the contents of the buffer are what is expected.
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for (uint32_t i = 0; i < sz / sizeof(uint32_t); ++i) {
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if (reinterpret_cast<uint32_t*>(sysPtr)[i] != val) {
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fprintf(stdout, "Expected 0x%x but got 0x%x in buffer at index %d.\n", val,
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reinterpret_cast<uint32_t*>(sysPtr)[i], i);
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return HSA_STATUS_ERROR;
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}
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}
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return HSA_STATUS_SUCCESS;
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}
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// This program illustrates the usage of the asynchronous copy capability of
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// the RocR runtime library. The program will create a system memory buffer and
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// a local buffer for each GPU, up to 2 GPUs, if the system has at least 2
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// GPUs. The program will copy data to/from the host from/to the GPU. If 2
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// GPUs are available, the program will also copy data from one to the other.
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int main() {
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hsa_status_t err;
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struct callback_args args;
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bool twoGPUs = false;
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err = hsa_init();
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RET_IF_HSA_ERR(err);
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// First, find the cpu agent and associated pool
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args.cpu = {0, 0, 0};
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err = hsa_iterate_agents(FindCPUDevice, reinterpret_cast<void*>(&args.cpu));
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assert(err == HSA_STATUS_INFO_BREAK);
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if (err != HSA_STATUS_INFO_BREAK) {
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return -1;
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}
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// Now, find 1 or 2 (if possible) GPUs and associated pool(s) for our test
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args.gpu1 = {0, 0, 0};
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args.gpu2 = {0, 0, 0};
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err = hsa_iterate_agents(FindGPUs, &args);
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if (err == HSA_STATUS_INFO_BREAK) {
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twoGPUs = true;
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} else {
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// See if we at least have 1 GPU
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if (args.gpu1.dev.handle == 0) {
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fprintf(stdout, "GPU with accessible VRAM not found; at least 1 required. Exiting\n");
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return -1;
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}
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fprintf(stdout,
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"Only 1 GPU found with required VRAM. "
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"Peer-to-Peer copy will be skipped.\n");
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}
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// We will use the smallest amount of allocatable memory that works for all
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// potential sources and destinations of the copy
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size_t sz = lcm(args.cpu.granule, args.gpu1.granule);
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// Allocate memory on each source/destination
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if (twoGPUs) {
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sz = lcm(sz, args.gpu2.granule);
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err = hsa_amd_memory_pool_allocate(args.gpu2.pool, sz, HSA_AMD_MEMORY_POOL_EXECUTABLE_FLAG,
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reinterpret_cast<void**>(&args.gpu2.ptr));
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RET_IF_HSA_ERR(err);
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}
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err = hsa_amd_memory_pool_allocate(args.cpu.pool, sz, HSA_AMD_MEMORY_POOL_EXECUTABLE_FLAG, reinterpret_cast<void**>(&args.cpu.ptr));
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RET_IF_HSA_ERR(err);
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err =
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hsa_amd_memory_pool_allocate(args.gpu1.pool, sz, HSA_AMD_MEMORY_POOL_EXECUTABLE_FLAG, reinterpret_cast<void**>(&args.gpu1.ptr));
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RET_IF_HSA_ERR(err);
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char name[64];
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err = hsa_agent_get_info(args.cpu.dev, HSA_AGENT_INFO_NAME, &name);
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fprintf(stdout, "CPU is \"%s\"\n", name);
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err = hsa_agent_get_info(args.gpu1.dev, HSA_AGENT_INFO_NAME, &name);
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fprintf(stdout, "GPU1 is \"%s\"\n", name);
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if (twoGPUs) {
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err = hsa_agent_get_info(args.gpu2.dev, HSA_AGENT_INFO_NAME, &name);
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fprintf(stdout, "GPU2 is \"%s\"\n", name);
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}
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fprintf(stdout, "Copying %lu bytes from gpu1 memory to system memory...\n", sz);
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err = AsyncCpyTest(&args.cpu, &args.gpu1, &args, sz, kTestFillValue1);
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RET_IF_HSA_ERR(err);
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fprintf(stdout, "Success!\n");
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fprintf(stdout, "Copying %lu bytes from system memory to gpu1 memory...\n", sz);
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err = AsyncCpyTest(&args.gpu1, &args.cpu, &args, sz, kTestFillValue2);
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RET_IF_HSA_ERR(err);
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fprintf(stdout, "Success!\n");
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if (twoGPUs) {
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fprintf(stdout, "Copying %lu bytes from gpu1 memory to gpu2 memory...\n", sz);
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err = AsyncCpyTest(&args.gpu2, &args.gpu1, &args, sz, kTestFillValue3);
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RET_IF_HSA_ERR(err);
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fprintf(stdout, "Success!\n");
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}
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// Clean up
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err = hsa_amd_memory_pool_free(args.cpu.ptr);
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RET_IF_HSA_ERR(err);
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err = hsa_amd_memory_pool_free(args.gpu1.ptr);
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RET_IF_HSA_ERR(err);
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if (twoGPUs) {
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err = hsa_amd_memory_pool_free(args.gpu2.ptr);
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RET_IF_HSA_ERR(err);
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}
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}
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