Jose Santos
34 KiB
34 KiB
| 1 | Dispatch_ID | Kernel_Name | GPU_ID | Grid_Size | Workgroup_Size | LDS_Per_Workgroup | Scratch_Per_Workitem | Arch_VGPR | Accum_VGPR | SGPR | wave_size | obj | SQ_INSTS_VALU_INT64 | SQ_INSTS_SMEM | SQ_INSTS_FLAT | SQ_INSTS_LDS | SQ_INSTS_GDS | SQ_INSTS_EXP_GDS | SQ_INSTS_BRANCH | SQ_INSTS_SENDMSG | TCP_TOTAL_ATOMIC_WITH_RET_sum | TCP_TOTAL_ATOMIC_WITHOUT_RET_sum | TCP_TOTAL_WRITEBACK_INVALIDATES_sum | TCP_TOTAL_CACHE_ACCESSES_sum | TA_BUFFER_COALESCED_READ_CYCLES_sum | TA_BUFFER_COALESCED_WRITE_CYCLES_sum | TD_COALESCABLE_WAVEFRONT_sum | SPI_RA_RES_STALL_CSN | SPI_RA_TMP_STALL_CSN | CPC_CPC_UTCL2IU_BUSY | CPC_CPC_UTCL2IU_IDLE | CPF_CMP_UTCL1_STALL_ON_TRANSLATION | TCC_READ_sum | TCC_WRITE_sum | TCC_ATOMIC_sum | TCC_WRITEBACK_sum | wave_size_1 | obj_1 | TCC_EA_RDREQ[0] | TCC_EA_RDREQ_32B[0] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[0] | TCC_EA_RDREQ_GMI_CREDIT_STALL[0] | TCC_EA_RDREQ[1] | TCC_EA_RDREQ_32B[1] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[1] | TCC_EA_RDREQ_GMI_CREDIT_STALL[1] | TCC_EA_RDREQ[2] | TCC_EA_RDREQ_32B[2] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[2] | TCC_EA_RDREQ_GMI_CREDIT_STALL[2] | TCC_EA_RDREQ[3] | TCC_EA_RDREQ_32B[3] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[3] | TCC_EA_RDREQ_GMI_CREDIT_STALL[3] | TCC_EA_RDREQ[4] | TCC_EA_RDREQ_32B[4] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[4] | TCC_EA_RDREQ_GMI_CREDIT_STALL[4] | TCC_EA_RDREQ[5] | TCC_EA_RDREQ_32B[5] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[5] | TCC_EA_RDREQ_GMI_CREDIT_STALL[5] | TCC_EA_RDREQ[6] | TCC_EA_RDREQ_32B[6] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[6] | TCC_EA_RDREQ_GMI_CREDIT_STALL[6] | TCC_EA_RDREQ[7] | TCC_EA_RDREQ_32B[7] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[7] | TCC_EA_RDREQ_GMI_CREDIT_STALL[7] | TCC_EA_RDREQ[8] | TCC_EA_RDREQ_32B[8] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[8] | TCC_EA_RDREQ_GMI_CREDIT_STALL[8] | TCC_EA_RDREQ[9] | TCC_EA_RDREQ_32B[9] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[9] | TCC_EA_RDREQ_GMI_CREDIT_STALL[9] | TCC_EA_RDREQ[10] | TCC_EA_RDREQ_32B[10] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[10] | TCC_EA_RDREQ_GMI_CREDIT_STALL[10] | TCC_EA_RDREQ[11] | TCC_EA_RDREQ_32B[11] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[11] | TCC_EA_RDREQ_GMI_CREDIT_STALL[11] | TCC_EA_RDREQ[12] | TCC_EA_RDREQ_32B[12] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[12] | TCC_EA_RDREQ_GMI_CREDIT_STALL[12] | TCC_EA_RDREQ[13] | TCC_EA_RDREQ_32B[13] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[13] | TCC_EA_RDREQ_GMI_CREDIT_STALL[13] | TCC_EA_RDREQ[14] | TCC_EA_RDREQ_32B[14] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[14] | TCC_EA_RDREQ_GMI_CREDIT_STALL[14] | TCC_EA_RDREQ[15] | TCC_EA_RDREQ_32B[15] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[15] | TCC_EA_RDREQ_GMI_CREDIT_STALL[15] | TCC_EA_RDREQ[16] | TCC_EA_RDREQ_32B[16] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[16] | TCC_EA_RDREQ_GMI_CREDIT_STALL[16] | TCC_EA_RDREQ[17] | TCC_EA_RDREQ_32B[17] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[17] | TCC_EA_RDREQ_GMI_CREDIT_STALL[17] | TCC_EA_RDREQ[18] | TCC_EA_RDREQ_32B[18] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[18] | TCC_EA_RDREQ_GMI_CREDIT_STALL[18] | TCC_EA_RDREQ[19] | TCC_EA_RDREQ_32B[19] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[19] | TCC_EA_RDREQ_GMI_CREDIT_STALL[19] | TCC_EA_RDREQ[20] | TCC_EA_RDREQ_32B[20] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[20] | TCC_EA_RDREQ_GMI_CREDIT_STALL[20] | TCC_EA_RDREQ[21] | TCC_EA_RDREQ_32B[21] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[21] | TCC_EA_RDREQ_GMI_CREDIT_STALL[21] | TCC_EA_RDREQ[22] | TCC_EA_RDREQ_32B[22] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[22] | TCC_EA_RDREQ_GMI_CREDIT_STALL[22] | TCC_EA_RDREQ[23] | TCC_EA_RDREQ_32B[23] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[23] | TCC_EA_RDREQ_GMI_CREDIT_STALL[23] | TCC_EA_RDREQ[24] | TCC_EA_RDREQ_32B[24] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[24] | TCC_EA_RDREQ_GMI_CREDIT_STALL[24] | TCC_EA_RDREQ[25] | TCC_EA_RDREQ_32B[25] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[25] | TCC_EA_RDREQ_GMI_CREDIT_STALL[25] | TCC_EA_RDREQ[26] | TCC_EA_RDREQ_32B[26] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[26] | TCC_EA_RDREQ_GMI_CREDIT_STALL[26] | TCC_EA_RDREQ[27] | TCC_EA_RDREQ_32B[27] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[27] | TCC_EA_RDREQ_GMI_CREDIT_STALL[27] | TCC_EA_RDREQ[28] | TCC_EA_RDREQ_32B[28] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[28] | TCC_EA_RDREQ_GMI_CREDIT_STALL[28] | TCC_EA_RDREQ[29] | TCC_EA_RDREQ_32B[29] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[29] | TCC_EA_RDREQ_GMI_CREDIT_STALL[29] | TCC_EA_RDREQ[30] | TCC_EA_RDREQ_32B[30] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[30] | TCC_EA_RDREQ_GMI_CREDIT_STALL[30] | TCC_EA_RDREQ[31] | TCC_EA_RDREQ_32B[31] | TCC_EA_RDREQ_DRAM_CREDIT_STALL[31] | TCC_EA_RDREQ_GMI_CREDIT_STALL[31] | wave_size_2 | obj_2 | SQC_DCACHE_REQ_READ_1 | SQC_DCACHE_REQ_READ_2 | SQC_DCACHE_REQ_READ_4 | wave_size_3 | obj_3 | SQC_ICACHE_MISSES_DUPLICATE | SQC_DCACHE_INPUT_VALID_READYB | SQC_DCACHE_ATOMIC | SQC_DCACHE_REQ_READ_8 | SQC_DCACHE_REQ | SQC_DCACHE_HITS | SQC_DCACHE_MISSES | SQC_DCACHE_MISSES_DUPLICATE | wave_size_4 | obj_4 | SQ_WAVE_CYCLES | SQ_WAIT_ANY | SQ_WAIT_INST_ANY | SQ_ACTIVE_INST_ANY | SQ_BUSY_CU_CYCLES | SQ_ACTIVE_INST_VMEM | SQ_ACTIVE_INST_LDS | SQ_ACTIVE_INST_VALU | TCP_UTCL1_TRANSLATION_MISS_sum | TCP_UTCL1_TRANSLATION_HIT_sum | TCP_UTCL1_PERMISSION_MISS_sum | TCP_UTCL1_REQUEST_sum | TA_ADDR_STALLED_BY_TC_CYCLES_sum | TA_TOTAL_WAVEFRONTS_sum | SPI_RA_WAVE_SIMD_FULL_CSN | SPI_RA_VGPR_SIMD_FULL_CSN | CPC_CPC_UTCL2IU_STALL | CPC_ME1_BUSY_FOR_PACKET_DECODE | TCC_EA_WRREQ_sum | TCC_EA_WRREQ_64B_sum | TCC_EA_WR_UNCACHED_32B_sum | TCC_EA_WRREQ_DRAM_sum | wave_size_5 | obj_5 | SQ_INSTS_FLAT_LDS_ONLY | SQ_INSTS_VALU_MFMA_MOPS_I8 | SQ_INSTS_VALU_MFMA_MOPS_F16 | SQ_INSTS_VALU_MFMA_MOPS_BF16 | SQ_INSTS_VALU_MFMA_MOPS_F32 | SQ_INSTS_VALU_MFMA_MOPS_F64 | SQC_TC_INST_REQ | SQC_TC_DATA_READ_REQ | TCP_TCC_RW_READ_REQ_sum | TCP_TCC_RW_WRITE_REQ_sum | TCP_TCC_RW_ATOMIC_REQ_sum | TCP_PENDING_STALL_CYCLES_sum | wave_size_6 | obj_6 | SQ_INSTS_SMEM_NORM | SQ_INSTS_MFMA | SQ_INSTS_VALU_MFMA_I8 | SQ_INSTS_VALU_MFMA_F16 | SQ_INSTS_VALU_MFMA_BF16 | SQ_INSTS_VALU_MFMA_F32 | SQ_INSTS_VALU_MFMA_F64 | SQ_VALU_MFMA_BUSY_CYCLES | TCP_TCC_UC_ATOMIC_REQ_sum | TCP_TCC_CC_READ_REQ_sum | TCP_TCC_CC_WRITE_REQ_sum | TCP_TCC_CC_ATOMIC_REQ_sum | SPI_VWC_CSC_WR | SPI_RA_BULKY_CU_FULL_CSN | TCC_EA_RDREQ_LEVEL_sum | TCC_EA_WRREQ_LEVEL_sum | TCC_EA_ATOMIC_LEVEL_sum | wave_size_7 | obj_7 | SQ_ACTIVE_INST_SCA | SQ_ACTIVE_INST_EXP_GDS | SQ_ACTIVE_INST_MISC | SQ_ACTIVE_INST_FLAT | SQ_INST_CYCLES_VMEM_WR | SQ_INST_CYCLES_VMEM_RD | SQ_INST_CYCLES_SMEM | SQ_INST_CYCLES_SALU | TCP_TCP_LATENCY_sum | TCP_TCC_READ_REQ_LATENCY_sum | TCP_TCC_WRITE_REQ_LATENCY_sum | TCP_TCC_READ_REQ_sum | TA_ADDR_STALLED_BY_TD_CYCLES_sum | TA_DATA_STALLED_BY_TC_CYCLES_sum | SPI_RA_SGPR_SIMD_FULL_CSN | SPI_RA_LDS_CU_FULL_CSN | CPC_ME1_DC0_SPI_BUSY | TCC_EA_WRREQ_STALL_sum | TCC_EA_RDREQ_sum | TCC_EA_RDREQ_32B_sum | TCC_EA_RD_UNCACHED_32B_sum | wave_size_8 | obj_8 | SQC_TC_DATA_WRITE_REQ | SQC_TC_DATA_ATOMIC_REQ | SQC_TC_STALL | SQC_TC_REQ | SQC_DCACHE_REQ_READ_16 | SQC_ICACHE_REQ | SQC_ICACHE_HITS | SQC_ICACHE_MISSES | wave_size_9 | obj_9 | TCC_EA_WRREQ_DRAM_CREDIT_STALL[0] | TCC_EA_WRREQ_GMI_CREDIT_STALL[0] | TCC_EA_WRREQ_IO_CREDIT_STALL[0] | TCC_EA_WRREQ_LEVEL[0] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[1] | TCC_EA_WRREQ_GMI_CREDIT_STALL[1] | TCC_EA_WRREQ_IO_CREDIT_STALL[1] | TCC_EA_WRREQ_LEVEL[1] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[2] | TCC_EA_WRREQ_GMI_CREDIT_STALL[2] | TCC_EA_WRREQ_IO_CREDIT_STALL[2] | TCC_EA_WRREQ_LEVEL[2] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[3] | TCC_EA_WRREQ_GMI_CREDIT_STALL[3] | TCC_EA_WRREQ_IO_CREDIT_STALL[3] | TCC_EA_WRREQ_LEVEL[3] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[4] | TCC_EA_WRREQ_GMI_CREDIT_STALL[4] | TCC_EA_WRREQ_IO_CREDIT_STALL[4] | TCC_EA_WRREQ_LEVEL[4] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[5] | TCC_EA_WRREQ_GMI_CREDIT_STALL[5] | TCC_EA_WRREQ_IO_CREDIT_STALL[5] | TCC_EA_WRREQ_LEVEL[5] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[6] | TCC_EA_WRREQ_GMI_CREDIT_STALL[6] | TCC_EA_WRREQ_IO_CREDIT_STALL[6] | TCC_EA_WRREQ_LEVEL[6] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[7] | TCC_EA_WRREQ_GMI_CREDIT_STALL[7] | TCC_EA_WRREQ_IO_CREDIT_STALL[7] | TCC_EA_WRREQ_LEVEL[7] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[8] | TCC_EA_WRREQ_GMI_CREDIT_STALL[8] | TCC_EA_WRREQ_IO_CREDIT_STALL[8] | TCC_EA_WRREQ_LEVEL[8] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[9] | TCC_EA_WRREQ_GMI_CREDIT_STALL[9] | TCC_EA_WRREQ_IO_CREDIT_STALL[9] | TCC_EA_WRREQ_LEVEL[9] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[10] | TCC_EA_WRREQ_GMI_CREDIT_STALL[10] | TCC_EA_WRREQ_IO_CREDIT_STALL[10] | TCC_EA_WRREQ_LEVEL[10] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[11] | TCC_EA_WRREQ_GMI_CREDIT_STALL[11] | TCC_EA_WRREQ_IO_CREDIT_STALL[11] | TCC_EA_WRREQ_LEVEL[11] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[12] | TCC_EA_WRREQ_GMI_CREDIT_STALL[12] | TCC_EA_WRREQ_IO_CREDIT_STALL[12] | TCC_EA_WRREQ_LEVEL[12] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[13] | TCC_EA_WRREQ_GMI_CREDIT_STALL[13] | TCC_EA_WRREQ_IO_CREDIT_STALL[13] | TCC_EA_WRREQ_LEVEL[13] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[14] | TCC_EA_WRREQ_GMI_CREDIT_STALL[14] | TCC_EA_WRREQ_IO_CREDIT_STALL[14] | TCC_EA_WRREQ_LEVEL[14] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[15] | TCC_EA_WRREQ_GMI_CREDIT_STALL[15] | TCC_EA_WRREQ_IO_CREDIT_STALL[15] | TCC_EA_WRREQ_LEVEL[15] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[16] | TCC_EA_WRREQ_GMI_CREDIT_STALL[16] | TCC_EA_WRREQ_IO_CREDIT_STALL[16] | TCC_EA_WRREQ_LEVEL[16] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[17] | TCC_EA_WRREQ_GMI_CREDIT_STALL[17] | TCC_EA_WRREQ_IO_CREDIT_STALL[17] | TCC_EA_WRREQ_LEVEL[17] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[18] | TCC_EA_WRREQ_GMI_CREDIT_STALL[18] | TCC_EA_WRREQ_IO_CREDIT_STALL[18] | TCC_EA_WRREQ_LEVEL[18] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[19] | TCC_EA_WRREQ_GMI_CREDIT_STALL[19] | TCC_EA_WRREQ_IO_CREDIT_STALL[19] | TCC_EA_WRREQ_LEVEL[19] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[20] | TCC_EA_WRREQ_GMI_CREDIT_STALL[20] | TCC_EA_WRREQ_IO_CREDIT_STALL[20] | TCC_EA_WRREQ_LEVEL[20] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[21] | TCC_EA_WRREQ_GMI_CREDIT_STALL[21] | TCC_EA_WRREQ_IO_CREDIT_STALL[21] | TCC_EA_WRREQ_LEVEL[21] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[22] | TCC_EA_WRREQ_GMI_CREDIT_STALL[22] | TCC_EA_WRREQ_IO_CREDIT_STALL[22] | TCC_EA_WRREQ_LEVEL[22] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[23] | TCC_EA_WRREQ_GMI_CREDIT_STALL[23] | TCC_EA_WRREQ_IO_CREDIT_STALL[23] | TCC_EA_WRREQ_LEVEL[23] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[24] | TCC_EA_WRREQ_GMI_CREDIT_STALL[24] | TCC_EA_WRREQ_IO_CREDIT_STALL[24] | TCC_EA_WRREQ_LEVEL[24] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[25] | TCC_EA_WRREQ_GMI_CREDIT_STALL[25] | TCC_EA_WRREQ_IO_CREDIT_STALL[25] | TCC_EA_WRREQ_LEVEL[25] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[26] | TCC_EA_WRREQ_GMI_CREDIT_STALL[26] | TCC_EA_WRREQ_IO_CREDIT_STALL[26] | TCC_EA_WRREQ_LEVEL[26] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[27] | TCC_EA_WRREQ_GMI_CREDIT_STALL[27] | TCC_EA_WRREQ_IO_CREDIT_STALL[27] | TCC_EA_WRREQ_LEVEL[27] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[28] | TCC_EA_WRREQ_GMI_CREDIT_STALL[28] | TCC_EA_WRREQ_IO_CREDIT_STALL[28] | TCC_EA_WRREQ_LEVEL[28] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[29] | TCC_EA_WRREQ_GMI_CREDIT_STALL[29] | TCC_EA_WRREQ_IO_CREDIT_STALL[29] | TCC_EA_WRREQ_LEVEL[29] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[30] | TCC_EA_WRREQ_GMI_CREDIT_STALL[30] | TCC_EA_WRREQ_IO_CREDIT_STALL[30] | TCC_EA_WRREQ_LEVEL[30] | TCC_EA_WRREQ_DRAM_CREDIT_STALL[31] | TCC_EA_WRREQ_GMI_CREDIT_STALL[31] | TCC_EA_WRREQ_IO_CREDIT_STALL[31] | TCC_EA_WRREQ_LEVEL[31] | wave_size_10 | obj_10 | SQ_THREAD_CYCLES_VALU | SQ_IFETCH | SQ_LDS_BANK_CONFLICT | SQ_LDS_ADDR_CONFLICT | SQ_LDS_UNALIGNED_STALL | SQ_WAVES_EQ_64 | SQ_WAVES_LT_64 | SQ_WAVES_LT_48 | TCP_TCC_WRITE_REQ_sum | TCP_TCC_ATOMIC_WITH_RET_REQ_sum | TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum | TCP_TCC_NC_READ_REQ_sum | TA_FLAT_WAVEFRONTS_sum | TA_FLAT_READ_WAVEFRONTS_sum | SPI_RA_BAR_CU_FULL_CSN | SPI_RA_TGLIM_CU_FULL_CSN | TCC_EA_RDREQ_DRAM_sum | TCC_TAG_STALL_sum | TCC_NORMAL_WRITEBACK_sum | TCC_ALL_TC_OP_WB_WRITEBACK_sum | wave_size_11 | obj_11 | TCC_RW_REQ[0] | TCC_TOO_MANY_EA_WRREQS_STALL[0] | TCC_WRITE[0] | TCC_RW_REQ[1] | TCC_TOO_MANY_EA_WRREQS_STALL[1] | TCC_WRITE[1] | TCC_RW_REQ[2] | TCC_TOO_MANY_EA_WRREQS_STALL[2] | TCC_WRITE[2] | TCC_RW_REQ[3] | TCC_TOO_MANY_EA_WRREQS_STALL[3] | TCC_WRITE[3] | TCC_RW_REQ[4] | TCC_TOO_MANY_EA_WRREQS_STALL[4] | TCC_WRITE[4] | TCC_RW_REQ[5] | TCC_TOO_MANY_EA_WRREQS_STALL[5] | TCC_WRITE[5] | TCC_RW_REQ[6] | TCC_TOO_MANY_EA_WRREQS_STALL[6] | TCC_WRITE[6] | TCC_RW_REQ[7] | TCC_TOO_MANY_EA_WRREQS_STALL[7] | TCC_WRITE[7] | TCC_RW_REQ[8] | TCC_TOO_MANY_EA_WRREQS_STALL[8] | TCC_WRITE[8] | TCC_RW_REQ[9] | TCC_TOO_MANY_EA_WRREQS_STALL[9] | TCC_WRITE[9] | TCC_RW_REQ[10] | TCC_TOO_MANY_EA_WRREQS_STALL[10] | TCC_WRITE[10] | TCC_RW_REQ[11] | TCC_TOO_MANY_EA_WRREQS_STALL[11] | TCC_WRITE[11] | TCC_RW_REQ[12] | TCC_TOO_MANY_EA_WRREQS_STALL[12] | TCC_WRITE[12] | TCC_RW_REQ[13] | TCC_TOO_MANY_EA_WRREQS_STALL[13] | TCC_WRITE[13] | TCC_RW_REQ[14] | TCC_TOO_MANY_EA_WRREQS_STALL[14] | TCC_WRITE[14] | TCC_RW_REQ[15] | TCC_TOO_MANY_EA_WRREQS_STALL[15] | TCC_WRITE[15] | TCC_RW_REQ[16] | TCC_TOO_MANY_EA_WRREQS_STALL[16] | TCC_WRITE[16] | TCC_RW_REQ[17] | TCC_TOO_MANY_EA_WRREQS_STALL[17] | TCC_WRITE[17] | TCC_RW_REQ[18] | TCC_TOO_MANY_EA_WRREQS_STALL[18] | TCC_WRITE[18] | TCC_RW_REQ[19] | TCC_TOO_MANY_EA_WRREQS_STALL[19] | TCC_WRITE[19] | TCC_RW_REQ[20] | TCC_TOO_MANY_EA_WRREQS_STALL[20] | TCC_WRITE[20] | TCC_RW_REQ[21] | TCC_TOO_MANY_EA_WRREQS_STALL[21] | TCC_WRITE[21] | TCC_RW_REQ[22] | TCC_TOO_MANY_EA_WRREQS_STALL[22] | TCC_WRITE[22] | TCC_RW_REQ[23] | TCC_TOO_MANY_EA_WRREQS_STALL[23] | TCC_WRITE[23] | TCC_RW_REQ[24] | TCC_TOO_MANY_EA_WRREQS_STALL[24] | TCC_WRITE[24] | TCC_RW_REQ[25] | TCC_TOO_MANY_EA_WRREQS_STALL[25] | TCC_WRITE[25] | TCC_RW_REQ[26] | TCC_TOO_MANY_EA_WRREQS_STALL[26] | TCC_WRITE[26] | TCC_RW_REQ[27] | TCC_TOO_MANY_EA_WRREQS_STALL[27] | TCC_WRITE[27] | TCC_RW_REQ[28] | TCC_TOO_MANY_EA_WRREQS_STALL[28] | TCC_WRITE[28] | TCC_RW_REQ[29] | TCC_TOO_MANY_EA_WRREQS_STALL[29] | TCC_WRITE[29] | TCC_RW_REQ[30] | TCC_TOO_MANY_EA_WRREQS_STALL[30] | TCC_WRITE[30] | TCC_RW_REQ[31] | TCC_TOO_MANY_EA_WRREQS_STALL[31] | TCC_WRITE[31] | wave_size_12 | obj_12 | TCC_HIT[0] | TCC_MISS[0] | TCC_READ[0] | TCC_REQ[0] | TCC_HIT[1] | TCC_MISS[1] | TCC_READ[1] | TCC_REQ[1] | TCC_HIT[2] | TCC_MISS[2] | TCC_READ[2] | TCC_REQ[2] | TCC_HIT[3] | TCC_MISS[3] | TCC_READ[3] | TCC_REQ[3] | TCC_HIT[4] | TCC_MISS[4] | TCC_READ[4] | TCC_REQ[4] | TCC_HIT[5] | TCC_MISS[5] | TCC_READ[5] | TCC_REQ[5] | TCC_HIT[6] | TCC_MISS[6] | TCC_READ[6] | TCC_REQ[6] | TCC_HIT[7] | TCC_MISS[7] | TCC_READ[7] | TCC_REQ[7] | TCC_HIT[8] | TCC_MISS[8] | TCC_READ[8] | TCC_REQ[8] | TCC_HIT[9] | TCC_MISS[9] | TCC_READ[9] | TCC_REQ[9] | TCC_HIT[10] | TCC_MISS[10] | TCC_READ[10] | TCC_REQ[10] | TCC_HIT[11] | TCC_MISS[11] | TCC_READ[11] | TCC_REQ[11] | TCC_HIT[12] | TCC_MISS[12] | TCC_READ[12] | TCC_REQ[12] | TCC_HIT[13] | TCC_MISS[13] | TCC_READ[13] | TCC_REQ[13] | TCC_HIT[14] | TCC_MISS[14] | TCC_READ[14] | TCC_REQ[14] | TCC_HIT[15] | TCC_MISS[15] | TCC_READ[15] | TCC_REQ[15] | TCC_HIT[16] | TCC_MISS[16] | TCC_READ[16] | TCC_REQ[16] | TCC_HIT[17] | TCC_MISS[17] | TCC_READ[17] | TCC_REQ[17] | TCC_HIT[18] | TCC_MISS[18] | TCC_READ[18] | TCC_REQ[18] | TCC_HIT[19] | TCC_MISS[19] | TCC_READ[19] | TCC_REQ[19] | TCC_HIT[20] | TCC_MISS[20] | TCC_READ[20] | TCC_REQ[20] | TCC_HIT[21] | TCC_MISS[21] | TCC_READ[21] | TCC_REQ[21] | TCC_HIT[22] | TCC_MISS[22] | TCC_READ[22] | TCC_REQ[22] | TCC_HIT[23] | TCC_MISS[23] | TCC_READ[23] | TCC_REQ[23] | TCC_HIT[24] | TCC_MISS[24] | TCC_READ[24] | TCC_REQ[24] | TCC_HIT[25] | TCC_MISS[25] | TCC_READ[25] | TCC_REQ[25] | TCC_HIT[26] | TCC_MISS[26] | TCC_READ[26] | TCC_REQ[26] | TCC_HIT[27] | TCC_MISS[27] | TCC_READ[27] | TCC_REQ[27] | TCC_HIT[28] | TCC_MISS[28] | TCC_READ[28] | TCC_REQ[28] | TCC_HIT[29] | TCC_MISS[29] | TCC_READ[29] | TCC_REQ[29] | TCC_HIT[30] | TCC_MISS[30] | TCC_READ[30] | TCC_REQ[30] | TCC_HIT[31] | TCC_MISS[31] | TCC_READ[31] | TCC_REQ[31] | wave_size_13 | obj_13 | SQ_CYCLES | SQ_BUSY_CYCLES | SQ_WAVES | SQ_INSTS_VALU_CVT | SQ_INSTS_VMEM_WR | SQ_INSTS_VMEM_RD | SQ_INSTS_VMEM | SQ_INSTS_SALU | GRBM_COUNT | GRBM_GUI_ACTIVE | TCP_GATE_EN1_sum | TCP_GATE_EN2_sum | TCP_TD_TCP_STALL_CYCLES_sum | TCP_TCR_TCP_STALL_CYCLES_sum | TA_TA_BUSY_sum | TA_BUFFER_WAVEFRONTS_sum | TD_TD_BUSY_sum | TD_TC_STALL_sum | SPI_CSN_WINDOW_VALID | SPI_CSN_BUSY | CPC_CPC_STAT_BUSY | CPC_CPC_STAT_IDLE | CPF_CPF_STAT_BUSY | CPF_CPF_STAT_STALL | TCC_CYCLE_sum | TCC_BUSY_sum | TCC_PROBE_sum | TCC_PROBE_ALL_sum | wave_size_14 | obj_14 | TCC_ATOMIC[0] | TCC_CYCLE[0] | TCC_EA_ATOMIC[0] | TCC_EA_ATOMIC_LEVEL[0] | TCC_ATOMIC[1] | TCC_CYCLE[1] | TCC_EA_ATOMIC[1] | TCC_EA_ATOMIC_LEVEL[1] | TCC_ATOMIC[2] | TCC_CYCLE[2] | TCC_EA_ATOMIC[2] | TCC_EA_ATOMIC_LEVEL[2] | TCC_ATOMIC[3] | TCC_CYCLE[3] | TCC_EA_ATOMIC[3] | TCC_EA_ATOMIC_LEVEL[3] | TCC_ATOMIC[4] | TCC_CYCLE[4] | TCC_EA_ATOMIC[4] | TCC_EA_ATOMIC_LEVEL[4] | TCC_ATOMIC[5] | TCC_CYCLE[5] | TCC_EA_ATOMIC[5] | TCC_EA_ATOMIC_LEVEL[5] | TCC_ATOMIC[6] | TCC_CYCLE[6] | TCC_EA_ATOMIC[6] | TCC_EA_ATOMIC_LEVEL[6] | TCC_ATOMIC[7] | TCC_CYCLE[7] | TCC_EA_ATOMIC[7] | TCC_EA_ATOMIC_LEVEL[7] | TCC_ATOMIC[8] | TCC_CYCLE[8] | TCC_EA_ATOMIC[8] | TCC_EA_ATOMIC_LEVEL[8] | TCC_ATOMIC[9] | TCC_CYCLE[9] | TCC_EA_ATOMIC[9] | TCC_EA_ATOMIC_LEVEL[9] | TCC_ATOMIC[10] | TCC_CYCLE[10] | TCC_EA_ATOMIC[10] | TCC_EA_ATOMIC_LEVEL[10] | TCC_ATOMIC[11] | TCC_CYCLE[11] | TCC_EA_ATOMIC[11] | TCC_EA_ATOMIC_LEVEL[11] | TCC_ATOMIC[12] | TCC_CYCLE[12] | TCC_EA_ATOMIC[12] | TCC_EA_ATOMIC_LEVEL[12] | TCC_ATOMIC[13] | TCC_CYCLE[13] | TCC_EA_ATOMIC[13] | TCC_EA_ATOMIC_LEVEL[13] | TCC_ATOMIC[14] | TCC_CYCLE[14] | TCC_EA_ATOMIC[14] | TCC_EA_ATOMIC_LEVEL[14] | TCC_ATOMIC[15] | TCC_CYCLE[15] | TCC_EA_ATOMIC[15] | TCC_EA_ATOMIC_LEVEL[15] | TCC_ATOMIC[16] | TCC_CYCLE[16] | TCC_EA_ATOMIC[16] | TCC_EA_ATOMIC_LEVEL[16] | TCC_ATOMIC[17] | TCC_CYCLE[17] | TCC_EA_ATOMIC[17] | TCC_EA_ATOMIC_LEVEL[17] | TCC_ATOMIC[18] | TCC_CYCLE[18] | TCC_EA_ATOMIC[18] | TCC_EA_ATOMIC_LEVEL[18] | TCC_ATOMIC[19] | TCC_CYCLE[19] | TCC_EA_ATOMIC[19] | TCC_EA_ATOMIC_LEVEL[19] | TCC_ATOMIC[20] | TCC_CYCLE[20] | TCC_EA_ATOMIC[20] | TCC_EA_ATOMIC_LEVEL[20] | TCC_ATOMIC[21] | TCC_CYCLE[21] | TCC_EA_ATOMIC[21] | TCC_EA_ATOMIC_LEVEL[21] | TCC_ATOMIC[22] | TCC_CYCLE[22] | TCC_EA_ATOMIC[22] | TCC_EA_ATOMIC_LEVEL[22] | TCC_ATOMIC[23] | TCC_CYCLE[23] | TCC_EA_ATOMIC[23] | TCC_EA_ATOMIC_LEVEL[23] | TCC_ATOMIC[24] | TCC_CYCLE[24] | TCC_EA_ATOMIC[24] | TCC_EA_ATOMIC_LEVEL[24] | TCC_ATOMIC[25] | TCC_CYCLE[25] | TCC_EA_ATOMIC[25] | TCC_EA_ATOMIC_LEVEL[25] | TCC_ATOMIC[26] | TCC_CYCLE[26] | TCC_EA_ATOMIC[26] | TCC_EA_ATOMIC_LEVEL[26] | TCC_ATOMIC[27] | TCC_CYCLE[27] | TCC_EA_ATOMIC[27] | TCC_EA_ATOMIC_LEVEL[27] | TCC_ATOMIC[28] | TCC_CYCLE[28] | TCC_EA_ATOMIC[28] | TCC_EA_ATOMIC_LEVEL[28] | TCC_ATOMIC[29] | TCC_CYCLE[29] | TCC_EA_ATOMIC[29] | TCC_EA_ATOMIC_LEVEL[29] | TCC_ATOMIC[30] | TCC_CYCLE[30] | TCC_EA_ATOMIC[30] | TCC_EA_ATOMIC_LEVEL[30] | TCC_ATOMIC[31] | TCC_CYCLE[31] | TCC_EA_ATOMIC[31] | TCC_EA_ATOMIC_LEVEL[31] | wave_size_15 | obj_15 | SQ_INSTS_VALU_MUL_F32 | SQ_INSTS_VALU_FMA_F32 | SQ_INSTS_VALU_TRANS_F32 | SQ_INSTS_VALU_ADD_F64 | SQ_INSTS_VALU_MUL_F64 | SQ_INSTS_VALU_FMA_F64 | SQ_INSTS_VALU_TRANS_F64 | SQ_INSTS_VALU_INT32 | TCP_VOLATILE_sum | TCP_TOTAL_ACCESSES_sum | TCP_TOTAL_READ_sum | TCP_TOTAL_WRITE_sum | TA_BUFFER_ATOMIC_WAVEFRONTS_sum | TA_BUFFER_TOTAL_CYCLES_sum | TD_ATOMIC_WAVEFRONT_sum | TD_STORE_WAVEFRONT_sum | SPI_RA_REQ_NO_ALLOC | SPI_RA_REQ_NO_ALLOC_CSN | CPC_CPC_STAT_STALL | CPC_UTCL1_STALL_ON_TRANSLATION | CPF_CPF_STAT_IDLE | CPF_CPF_TCIU_IDLE | TCC_REQ_sum | TCC_STREAMING_REQ_sum | TCC_HIT_sum | TCC_MISS_sum | wave_size_16 | obj_16 | SQ_INSTS_VSKIPPED | SQ_INSTS | SQ_INSTS_VALU | SQ_INSTS_VALU_ADD_F16 | SQ_INSTS_VALU_MUL_F16 | SQ_INSTS_VALU_FMA_F16 | SQ_INSTS_VALU_TRANS_F16 | SQ_INSTS_VALU_ADD_F32 | GRBM_SPI_BUSY | TCP_READ_TAGCONFLICT_STALL_CYCLES_sum | TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum | TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum | TCP_TA_TCP_STATE_READ_sum | TA_BUFFER_READ_WAVEFRONTS_sum | TA_BUFFER_WRITE_WAVEFRONTS_sum | TD_SPI_STALL_sum | TD_LOAD_WAVEFRONT_sum | SPI_CSN_NUM_THREADGROUPS | SPI_CSN_WAVE | CPC_CPC_TCIU_BUSY | CPC_CPC_TCIU_IDLE | CPF_CPF_TCIU_BUSY | CPF_CPF_TCIU_STALL | TCC_NC_REQ_sum | TCC_UC_REQ_sum | TCC_CC_REQ_sum | TCC_RW_REQ_sum | wave_size_17 | obj_17 | TCC_EA_RDREQ_IO_CREDIT_STALL[0] | TCC_EA_RDREQ_LEVEL[0] | TCC_EA_WRREQ[0] | TCC_EA_WRREQ_64B[0] | TCC_EA_RDREQ_IO_CREDIT_STALL[1] | TCC_EA_RDREQ_LEVEL[1] | TCC_EA_WRREQ[1] | TCC_EA_WRREQ_64B[1] | TCC_EA_RDREQ_IO_CREDIT_STALL[2] | TCC_EA_RDREQ_LEVEL[2] | TCC_EA_WRREQ[2] | TCC_EA_WRREQ_64B[2] | TCC_EA_RDREQ_IO_CREDIT_STALL[3] | TCC_EA_RDREQ_LEVEL[3] | TCC_EA_WRREQ[3] | TCC_EA_WRREQ_64B[3] | TCC_EA_RDREQ_IO_CREDIT_STALL[4] | TCC_EA_RDREQ_LEVEL[4] | TCC_EA_WRREQ[4] | TCC_EA_WRREQ_64B[4] | TCC_EA_RDREQ_IO_CREDIT_STALL[5] | TCC_EA_RDREQ_LEVEL[5] | TCC_EA_WRREQ[5] | TCC_EA_WRREQ_64B[5] | TCC_EA_RDREQ_IO_CREDIT_STALL[6] | TCC_EA_RDREQ_LEVEL[6] | TCC_EA_WRREQ[6] | TCC_EA_WRREQ_64B[6] | TCC_EA_RDREQ_IO_CREDIT_STALL[7] | TCC_EA_RDREQ_LEVEL[7] | TCC_EA_WRREQ[7] | TCC_EA_WRREQ_64B[7] | TCC_EA_RDREQ_IO_CREDIT_STALL[8] | TCC_EA_RDREQ_LEVEL[8] | TCC_EA_WRREQ[8] | TCC_EA_WRREQ_64B[8] | TCC_EA_RDREQ_IO_CREDIT_STALL[9] | TCC_EA_RDREQ_LEVEL[9] | TCC_EA_WRREQ[9] | TCC_EA_WRREQ_64B[9] | TCC_EA_RDREQ_IO_CREDIT_STALL[10] | TCC_EA_RDREQ_LEVEL[10] | TCC_EA_WRREQ[10] | TCC_EA_WRREQ_64B[10] | TCC_EA_RDREQ_IO_CREDIT_STALL[11] | TCC_EA_RDREQ_LEVEL[11] | TCC_EA_WRREQ[11] | TCC_EA_WRREQ_64B[11] | TCC_EA_RDREQ_IO_CREDIT_STALL[12] | TCC_EA_RDREQ_LEVEL[12] | TCC_EA_WRREQ[12] | TCC_EA_WRREQ_64B[12] | TCC_EA_RDREQ_IO_CREDIT_STALL[13] | TCC_EA_RDREQ_LEVEL[13] | TCC_EA_WRREQ[13] | TCC_EA_WRREQ_64B[13] | TCC_EA_RDREQ_IO_CREDIT_STALL[14] | TCC_EA_RDREQ_LEVEL[14] | TCC_EA_WRREQ[14] | TCC_EA_WRREQ_64B[14] | TCC_EA_RDREQ_IO_CREDIT_STALL[15] | TCC_EA_RDREQ_LEVEL[15] | TCC_EA_WRREQ[15] | TCC_EA_WRREQ_64B[15] | TCC_EA_RDREQ_IO_CREDIT_STALL[16] | TCC_EA_RDREQ_LEVEL[16] | TCC_EA_WRREQ[16] | TCC_EA_WRREQ_64B[16] | TCC_EA_RDREQ_IO_CREDIT_STALL[17] | TCC_EA_RDREQ_LEVEL[17] | TCC_EA_WRREQ[17] | TCC_EA_WRREQ_64B[17] | TCC_EA_RDREQ_IO_CREDIT_STALL[18] | TCC_EA_RDREQ_LEVEL[18] | TCC_EA_WRREQ[18] | TCC_EA_WRREQ_64B[18] | TCC_EA_RDREQ_IO_CREDIT_STALL[19] | TCC_EA_RDREQ_LEVEL[19] | TCC_EA_WRREQ[19] | TCC_EA_WRREQ_64B[19] | TCC_EA_RDREQ_IO_CREDIT_STALL[20] | TCC_EA_RDREQ_LEVEL[20] | TCC_EA_WRREQ[20] | TCC_EA_WRREQ_64B[20] | TCC_EA_RDREQ_IO_CREDIT_STALL[21] | TCC_EA_RDREQ_LEVEL[21] | TCC_EA_WRREQ[21] | TCC_EA_WRREQ_64B[21] | TCC_EA_RDREQ_IO_CREDIT_STALL[22] | TCC_EA_RDREQ_LEVEL[22] | TCC_EA_WRREQ[22] | TCC_EA_WRREQ_64B[22] | TCC_EA_RDREQ_IO_CREDIT_STALL[23] | TCC_EA_RDREQ_LEVEL[23] | TCC_EA_WRREQ[23] | TCC_EA_WRREQ_64B[23] | TCC_EA_RDREQ_IO_CREDIT_STALL[24] | TCC_EA_RDREQ_LEVEL[24] | TCC_EA_WRREQ[24] | TCC_EA_WRREQ_64B[24] | TCC_EA_RDREQ_IO_CREDIT_STALL[25] | TCC_EA_RDREQ_LEVEL[25] | TCC_EA_WRREQ[25] | TCC_EA_WRREQ_64B[25] | TCC_EA_RDREQ_IO_CREDIT_STALL[26] | TCC_EA_RDREQ_LEVEL[26] | TCC_EA_WRREQ[26] | TCC_EA_WRREQ_64B[26] | TCC_EA_RDREQ_IO_CREDIT_STALL[27] | TCC_EA_RDREQ_LEVEL[27] | TCC_EA_WRREQ[27] | TCC_EA_WRREQ_64B[27] | TCC_EA_RDREQ_IO_CREDIT_STALL[28] | TCC_EA_RDREQ_LEVEL[28] | TCC_EA_WRREQ[28] | TCC_EA_WRREQ_64B[28] | TCC_EA_RDREQ_IO_CREDIT_STALL[29] | TCC_EA_RDREQ_LEVEL[29] | TCC_EA_WRREQ[29] | TCC_EA_WRREQ_64B[29] | TCC_EA_RDREQ_IO_CREDIT_STALL[30] | TCC_EA_RDREQ_LEVEL[30] | TCC_EA_WRREQ[30] | TCC_EA_WRREQ_64B[30] | TCC_EA_RDREQ_IO_CREDIT_STALL[31] | TCC_EA_RDREQ_LEVEL[31] | TCC_EA_WRREQ[31] | TCC_EA_WRREQ_64B[31] | wave_size_18 | obj_18 | SQ_WAVES_LT_32 | SQ_WAVES_LT_16 | SQ_ITEMS | SQ_LDS_MEM_VIOLATIONS | SQ_LDS_ATOMIC_RETURN | SQ_LDS_IDX_ACTIVE | SQ_WAVES_RESTORED | SQ_WAVES_SAVED | TCP_TCC_NC_WRITE_REQ_sum | TCP_TCC_NC_ATOMIC_REQ_sum | TCP_TCC_UC_READ_REQ_sum | TCP_TCC_UC_WRITE_REQ_sum | TA_FLAT_WRITE_WAVEFRONTS_sum | TA_FLAT_ATOMIC_WAVEFRONTS_sum | SPI_RA_WVLIM_STALL_CSN | SPI_SWC_CSC_WR | TCC_NORMAL_EVICT_sum | TCC_ALL_TC_OP_INV_EVICT_sum | TCC_TOO_MANY_EA_WRREQS_STALL_sum | TCC_EA_ATOMIC_sum | Start_Timestamp | End_Timestamp |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2 | 0 | vecCopy(double*, double*, double*, int, int) | 2 | 1048576 | 256 | 0 | 0 | 8 | 0 | 16 | 64 | 0x7f8cb5680ec0 | 0 | 65536 | 32768 | 0 | 0 | 0 | 16384 | 16384 | 0.0 | 0.0 | 0.0 | 524288.0 | 0.0 | 0.0 | 0.0 | 9941 | 0 | 815 | 28305 | 0 | 72771.0 | 131072.0 | 0.0 | 65568.0 | 64 | 0x7f4dc6f04ec0 | 4096 | 0 | 50 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4100 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 83 | 0 | 4096 | 0 | 77 | 0 | 4096 | 0 | 91 | 0 | 4096 | 0 | 96 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 128 | 0 | 4096 | 0 | 7 | 0 | 4097 | 0 | 0 | 0 | 4097 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4097 | 0 | 0 | 0 | 4096 | 0 | 96 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 66 | 0 | 4099 | 0 | 28 | 0 | 4096 | 0 | 88 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 71 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 10 | 0 | 64 | 0x7f12d755cec0 | 32768 | 32768 | 0 | 64 | 0x7fc427340ec0 | 1280 | 120072 | 0 | 0 | 65536 | 63800 | 56 | 1680 | 64 | 0x7f0ede0a8ec0 | 10792683 | 9709413 | 739206 | 344064 | 1634345 | 0 | 0 | 163840 | 832.0 | 515146.0 | 0.0 | 524288.0 | 283214.0 | 32768.0 | 470483 | 0 | 0 | 10679 | 131072.0 | 131072.0 | 0.0 | 131072.0 | 64 | 0x7fd053b44ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 168 | 56 | 131072.0 | 131072.0 | 0.0 | 952369.0 | 64 | 0x7ff1c88bcec0 | 131072 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.0 | 0.0 | 0.0 | 0.0 | 16384 | 0 | 40067951.0 | 35212390.0 | 0.0 | 64 | 0x7f27f1d84ec0 | 114688 | 0 | 32768 | 32768 | 16384 | 16384 | 65536 | 49152 | 28005946.0 | 84730216.0 | 39691226.0 | 131072.0 | 0.0 | 231750.0 | 0 | 0 | 15405 | 326.0 | 131082.0 | 0.0 | 12.0 | 64 | 0x7f02bc090ec0 | 0 | 0 | 0 | 224 | 0 | 65536 | 64201 | 56 | 64 | 0x7f71fb6c4ec0 | 0 | 0 | 0 | 1062890 | 0 | 0 | 0 | 1161710 | 0 | 0 | 0 | 1005251 | 0 | 0 | 0 | 1146937 | 126 | 0 | 0 | 1173208 | 155 | 0 | 0 | 1181359 | 0 | 0 | 0 | 1083314 | 0 | 0 | 0 | 1141285 | 0 | 0 | 0 | 1024216 | 0 | 0 | 0 | 1008006 | 51 | 0 | 0 | 1068883 | 0 | 0 | 0 | 1139113 | 0 | 0 | 0 | 1143369 | 0 | 0 | 0 | 967772 | 0 | 0 | 0 | 1059054 | 0 | 0 | 0 | 1225094 | 0 | 0 | 0 | 1073672 | 172 | 0 | 0 | 1151115 | 0 | 0 | 0 | 975037 | 0 | 0 | 0 | 1106246 | 0 | 0 | 0 | 1048663 | 0 | 0 | 0 | 1127460 | 19 | 0 | 0 | 1010370 | 0 | 0 | 0 | 1042960 | 0 | 0 | 0 | 982746 | 209 | 0 | 0 | 1382108 | 0 | 0 | 0 | 972810 | 0 | 0 | 0 | 1045236 | 103 | 0 | 0 | 1319196 | 0 | 0 | 0 | 1105676 | 0 | 0 | 0 | 1105274 | 0 | 0 | 0 | 1179278 | 64 | 0x7f5c86b64ec0 | 10485760 | 65536 | 0 | 0 | 0 | 16384 | 0 | 0 | 131072.0 | 0.0 | 0.0 | 0.0 | 32768.0 | 16384.0 | 0 | 0 | 131080.0 | 34601.0 | 46044.0 | 19492.0 | 64 | 0x7fe59bab8ec0 | 6377 | 0 | 4096 | 6325 | 0 | 4096 | 6367 | 0 | 4096 | 6400 | 0 | 4096 | 6329 | 0 | 4096 | 6346 | 0 | 4096 | 6386 | 0 | 4096 | 6414 | 0 | 4096 | 6417 | 0 | 4096 | 6378 | 0 | 4096 | 6329 | 0 | 4096 | 6369 | 0 | 4096 | 6399 | 0 | 4096 | 6325 | 0 | 4096 | 6347 | 0 | 4096 | 6386 | 0 | 4096 | 6433 | 0 | 4096 | 6385 | 0 | 4096 | 6391 | 0 | 4096 | 6387 | 0 | 4096 | 6412 | 0 | 4096 | 6414 | 0 | 4096 | 6384 | 0 | 4096 | 6529 | 0 | 4096 | 6361 | 0 | 4096 | 6434 | 0 | 4096 | 6388 | 0 | 4096 | 6393 | 0 | 4096 | 6390 | 0 | 4096 | 6414 | 0 | 4096 | 6414 | 0 | 4096 | 6387 | 0 | 4096 | 64 | 0x7f00e0898ec0 | 2223 | 4096 | 2223 | 6319 | 2278 | 4096 | 2278 | 6374 | 2268 | 4096 | 2268 | 6364 | 2300 | 4096 | 2300 | 6396 | 2227 | 4096 | 2227 | 6323 | 2267 | 4096 | 2267 | 6363 | 2303 | 4096 | 2303 | 6399 | 2311 | 4097 | 2312 | 6408 | 2309 | 4096 | 2309 | 6405 | 2225 | 4096 | 2225 | 6321 | 2278 | 4096 | 2278 | 6374 | 2270 | 4096 | 2270 | 6366 | 2296 | 4096 | 2296 | 6392 | 2229 | 4096 | 2229 | 6325 | 2269 | 4096 | 2269 | 6365 | 2298 | 4096 | 2298 | 6394 | 2251 | 4096 | 2251 | 6347 | 2291 | 4096 | 2291 | 6387 | 2279 | 4097 | 2280 | 6376 | 2278 | 4100 | 2282 | 6378 | 2280 | 4096 | 2280 | 6376 | 2317 | 4096 | 2317 | 6413 | 2299 | 4096 | 2299 | 6395 | 2424 | 4098 | 2426 | 6522 | 2254 | 4096 | 2254 | 6350 | 2305 | 4097 | 2306 | 6402 | 2291 | 4096 | 2291 | 6387 | 2287 | 4096 | 2287 | 6383 | 2281 | 4096 | 2281 | 6377 | 2281 | 4096 | 2281 | 6377 | 2315 | 4096 | 2315 | 6411 | 2303 | 4096 | 2303 | 6399 | 64 | 0x7f34907d8ec0 | 227904 | 126692 | 16384 | 0 | 16384 | 16384 | 32768 | 49152 | 28487 | 28487 | 1924642.0 | 1335880.0 | 3355.0 | 166343.0 | 1034129.0 | 0.0 | 1327872.0 | 1029460.0 | 226193 | 134828 | 28487 | 0 | 28487 | 0 | 911584.0 | 485326.0 | 0.0 | 0.0 | 64 | 0x7f9df37d0ec0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 0 | 27818 | 0 | 0 | 64 | 0x7fb93c8acec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 114688 | 2097152.0 | 2097152.0 | 1048576.0 | 1048576.0 | 0.0 | 0.0 | 0.0 | 16384.0 | 12880 | 19043 | 8143 | 546 | 0 | 26860 | 204615.0 | 0.0 | 73534.0 | 131081.0 | 64 | 0x7f6090dc4ec0 | 0 | 393216 | 163840 | 0 | 0 | 0 | 0 | 0 | 17856 | 0.0 | 0.0 | 0.0 | 32768.0 | 0.0 | 0.0 | 409.0 | 32768.0 | 4096 | 16384 | 352 | 27100 | 1303 | 0 | 56.0 | 7.0 | 0.0 | 204738.0 | 64 | 0x7f0809060ec0 | 0 | 1186912 | 4096 | 4096 | 0 | 1223532 | 4096 | 4096 | 0 | 1219258 | 4096 | 4096 | 0 | 1658359 | 4096 | 4096 | 0 | 1251900 | 4096 | 4096 | 0 | 1347923 | 4096 | 4096 | 0 | 1019107 | 4096 | 4096 | 0 | 1325625 | 4096 | 4096 | 0 | 1163495 | 4096 | 4096 | 0 | 1111185 | 4096 | 4096 | 0 | 1268906 | 4096 | 4096 | 0 | 1205246 | 4096 | 4096 | 0 | 1109719 | 4096 | 4096 | 0 | 1234891 | 4096 | 4096 | 0 | 1379125 | 4096 | 4096 | 0 | 1279839 | 4096 | 4096 | 0 | 1088528 | 4096 | 4096 | 0 | 1462495 | 4096 | 4096 | 0 | 1204649 | 4096 | 4096 | 0 | 1343330 | 4096 | 4096 | 0 | 1555603 | 4096 | 4096 | 0 | 1315112 | 4096 | 4096 | 0 | 1486839 | 4096 | 4096 | 0 | 1133925 | 4096 | 4096 | 0 | 1285809 | 4096 | 4096 | 0 | 1027697 | 4096 | 4096 | 0 | 1075842 | 4096 | 4096 | 0 | 1319145 | 4096 | 4096 | 0 | 1231380 | 4096 | 4096 | 0 | 1161654 | 4096 | 4096 | 0 | 1105658 | 4096 | 4096 | 0 | 1555341 | 4096 | 4096 | 64 | 0x7fc4fdbbcec0 | 0 | 0 | 1048576 | 0 | 0 | 0 | 0 | 0 | 0.0 | 0.0 | 0.0 | 0.0 | 16384.0 | 0.0 | 0 | 32768 | 65551.0 | 0.0 | 0.0 | 0.0 | 200787787628212 | 200787787648052 |
| 3 | 1 | vecCopy(double*, double*, double*, int, int) | 2 | 1048576 | 256 | 0 | 0 | 8 | 0 | 16 | 64 | 0x7f8cb5680ec0 | 0 | 65536 | 32768 | 0 | 0 | 0 | 16384 | 16384 | 0.0 | 0.0 | 0.0 | 524288.0 | 0.0 | 0.0 | 0.0 | 19790 | 0 | 2696 | 38352 | 0 | 69472.0 | 131072.0 | 0.0 | 45644.0 | 64 | 0x7f4dc6f04ec0 | 4096 | 0 | 206 | 0 | 4096 | 0 | 777 | 0 | 4096 | 0 | 102 | 0 | 4100 | 0 | 562 | 0 | 4096 | 0 | 464 | 0 | 4096 | 0 | 2656 | 0 | 4096 | 0 | 491 | 0 | 4096 | 0 | 631 | 0 | 4096 | 0 | 322 | 0 | 4097 | 0 | 44 | 0 | 4096 | 0 | 282 | 0 | 4096 | 0 | 264 | 0 | 4096 | 0 | 525 | 0 | 4096 | 0 | 503 | 0 | 4096 | 0 | 536 | 0 | 4097 | 0 | 414 | 0 | 4097 | 0 | 227 | 0 | 4096 | 0 | 1186 | 0 | 4100 | 0 | 885 | 0 | 4096 | 0 | 720 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 12 | 0 | 4096 | 0 | 1515 | 0 | 4096 | 0 | 324 | 0 | 4096 | 0 | 268 | 0 | 4096 | 0 | 428 | 0 | 4096 | 0 | 0 | 0 | 4096 | 0 | 1081 | 0 | 4096 | 0 | 0 | 0 | 4097 | 0 | 16 | 0 | 4096 | 0 | 1100 | 0 | 4096 | 0 | 629 | 0 | 64 | 0x7f12d755cec0 | 32768 | 32768 | 0 | 64 | 0x7fc427340ec0 | 0 | 194575 | 0 | 0 | 65536 | 63800 | 56 | 1680 | 64 | 0x7f0ede0a8ec0 | 19029679 | 18003150 | 682465 | 344064 | 2744016 | 0 | 0 | 163840 | 832.0 | 515140.0 | 0.0 | 524288.0 | 633468.0 | 32768.0 | 892489 | 0 | 0 | 13912 | 91218.0 | 91218.0 | 0.0 | 91218.0 | 64 | 0x7fd053b44ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 56 | 131072.0 | 131072.0 | 0.0 | 2058821.0 | 64 | 0x7ff1c88bcec0 | 131072 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.0 | 0.0 | 0.0 | 0.0 | 16384 | 0 | 125741030.0 | 60350525.0 | 0.0 | 64 | 0x7f27f1d84ec0 | 114688 | 0 | 32768 | 32768 | 16384 | 16384 | 65536 | 49152 | 58716240.0 | 197706597.0 | 48130227.0 | 131072.0 | 0.0 | 479796.0 | 0 | 0 | 23433 | 4016.0 | 131073.0 | 0.0 | 0.0 | 64 | 0x7f02bc090ec0 | 0 | 0 | 0 | 56 | 0 | 65536 | 65536 | 0 | 64 | 0x7f71fb6c4ec0 | 0 | 0 | 0 | 1384594 | 69 | 0 | 0 | 2255638 | 83 | 0 | 0 | 1702593 | 0 | 0 | 0 | 2066209 | 0 | 0 | 0 | 1653195 | 0 | 0 | 0 | 2054875 | 279 | 0 | 0 | 1781753 | 0 | 0 | 0 | 1804358 | 0 | 0 | 0 | 1454844 | 0 | 0 | 0 | 1687793 | 0 | 0 | 0 | 1875678 | 0 | 0 | 0 | 1555374 | 0 | 0 | 0 | 1574007 | 0 | 0 | 0 | 1709013 | 396 | 0 | 0 | 1978961 | 12 | 0 | 0 | 1939986 | 0 | 0 | 0 | 1505907 | 90 | 0 | 0 | 1885483 | 0 | 0 | 0 | 1666838 | 0 | 0 | 0 | 1925293 | 0 | 0 | 0 | 1920417 | 1335 | 0 | 0 | 2479208 | 0 | 0 | 0 | 1395676 | 0 | 0 | 0 | 1834744 | 0 | 0 | 0 | 1650194 | 0 | 0 | 0 | 1775081 | 0 | 0 | 0 | 1501214 | 27 | 0 | 0 | 1727673 | 230 | 0 | 0 | 2102609 | 0 | 0 | 0 | 1705891 | 0 | 0 | 0 | 1899545 | 0 | 0 | 0 | 1854229 | 64 | 0x7f5c86b64ec0 | 10485760 | 65536 | 0 | 0 | 0 | 16384 | 0 | 0 | 131072.0 | 0.0 | 0.0 | 0.0 | 32768.0 | 16384.0 | 0 | 0 | 131072.0 | 93345.0 | 45562.0 | 0.0 | 64 | 0x7fe59bab8ec0 | 6254 | 0 | 4096 | 6261 | 0 | 4096 | 6268 | 0 | 4096 | 6290 | 0 | 4096 | 6258 | 0 | 4096 | 6321 | 0 | 4096 | 6261 | 0 | 4096 | 6277 | 0 | 4096 | 6276 | 0 | 4096 | 6258 | 0 | 4096 | 6266 | 0 | 4096 | 6270 | 0 | 4096 | 6290 | 0 | 4096 | 6263 | 0 | 4096 | 6323 | 0 | 4096 | 6266 | 0 | 4096 | 6254 | 0 | 4096 | 6263 | 0 | 4096 | 6283 | 0 | 4096 | 6276 | 0 | 4096 | 6270 | 0 | 4096 | 6307 | 0 | 4096 | 6266 | 0 | 4096 | 6299 | 0 | 4096 | 6298 | 0 | 4096 | 6255 | 0 | 4096 | 6264 | 0 | 4096 | 6288 | 0 | 4096 | 6281 | 0 | 4096 | 6271 | 0 | 4096 | 6310 | 0 | 4096 | 6265 | 0 | 4096 | 64 | 0x7f00e0898ec0 | 2155 | 4096 | 2155 | 6251 | 2146 | 4096 | 2146 | 6242 | 2177 | 4096 | 2177 | 6273 | 2172 | 4097 | 2173 | 6269 | 2181 | 4096 | 2181 | 6277 | 2174 | 4096 | 2174 | 6270 | 2180 | 4096 | 2180 | 6276 | 2178 | 4097 | 2179 | 6275 | 2178 | 4096 | 2178 | 6274 | 2155 | 4096 | 2155 | 6251 | 2146 | 4096 | 2146 | 6242 | 2182 | 4096 | 2182 | 6278 | 2175 | 4096 | 2175 | 6271 | 2184 | 4096 | 2184 | 6280 | 2174 | 4096 | 2174 | 6270 | 2183 | 4096 | 2183 | 6279 | 2206 | 4096 | 2206 | 6302 | 2197 | 4096 | 2197 | 6293 | 2176 | 4097 | 2177 | 6273 | 2160 | 4099 | 2163 | 6259 | 2180 | 4096 | 2180 | 6276 | 2196 | 4096 | 2196 | 6292 | 2157 | 4096 | 2157 | 6253 | 2127 | 4096 | 2127 | 6223 | 2130 | 4096 | 2130 | 6226 | 2258 | 4097 | 2259 | 6355 | 2198 | 4096 | 2198 | 6294 | 2178 | 4096 | 2178 | 6274 | 2161 | 4097 | 2162 | 6258 | 2180 | 4098 | 2182 | 6278 | 2199 | 4096 | 2199 | 6295 | 2157 | 4096 | 2157 | 6253 | 64 | 0x7f34907d8ec0 | 332152 | 222737 | 16384 | 0 | 16384 | 16384 | 32768 | 49152 | 41518 | 41518 | 3172936.0 | 2484232.0 | 5314.0 | 338169.0 | 1704683.0 | 0.0 | 2471654.0 | 2163784.0 | 332144 | 232463 | 41518 | 0 | 41518 | 0 | 1328576.0 | 771607.0 | 0.0 | 0.0 | 64 | 0x7f9df37d0ec0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 0 | 42176 | 0 | 0 | 64 | 0x7fb93c8acec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 114688 | 2097152.0 | 2097152.0 | 1048576.0 | 1048576.0 | 0.0 | 0.0 | 0.0 | 16384.0 | 30907 | 27235 | 9652 | 2476 | 0 | 39335 | 201008.0 | 0.0 | 69925.0 | 131083.0 | 64 | 0x7f6090dc4ec0 | 0 | 393216 | 163840 | 0 | 0 | 0 | 0 | 0 | 30057 | 0.0 | 0.0 | 0.0 | 32768.0 | 0.0 | 0.0 | 209.0 | 32768.0 | 4096 | 16384 | 302 | 41040 | 1954 | 0 | 56.0 | 12.0 | 0.0 | 200750.0 | 64 | 0x7f0809060ec0 | 0 | 3159295 | 2840 | 2840 | 0 | 4074954 | 2860 | 2860 | 0 | 3442000 | 2860 | 2860 | 0 | 4663990 | 2858 | 2858 | 0 | 3821061 | 2900 | 2900 | 0 | 4015918 | 2852 | 2852 | 0 | 2863952 | 2884 | 2884 | 0 | 3690902 | 2816 | 2816 | 0 | 3351559 | 2816 | 2816 | 0 | 3271066 | 2840 | 2840 | 0 | 3218057 | 2864 | 2864 | 0 | 3910547 | 2860 | 2860 | 0 | 3194412 | 2846 | 2846 | 0 | 3424184 | 2900 | 2900 | 0 | 4028667 | 2848 | 2848 | 0 | 4020056 | 2884 | 2884 | 0 | 3931060 | 2812 | 2812 | 0 | 3076775 | 2852 | 2852 | 0 | 3577935 | 2852 | 2852 | 0 | 3691164 | 2832 | 2832 | 0 | 4011722 | 2844 | 2844 | 0 | 3902622 | 2892 | 2892 | 0 | 4221938 | 2840 | 2840 | 0 | 4603345 | 2832 | 2832 | 0 | 4021856 | 2832 | 2832 | 0 | 3345800 | 2806 | 2806 | 0 | 4412748 | 2854 | 2854 | 0 | 3985792 | 2852 | 2852 | 0 | 3464193 | 2832 | 2832 | 0 | 3753271 | 2844 | 2844 | 0 | 3840056 | 2888 | 2888 | 0 | 3976717 | 2840 | 2840 | 64 | 0x7fc4fdbbcec0 | 0 | 0 | 1048576 | 0 | 0 | 0 | 0 | 0 | 0.0 | 0.0 | 0.0 | 0.0 | 16384.0 | 0.0 | 0 | 32768 | 65550.0 | 0.0 | 0.0 | 0.0 | 200787787740532 | 200787787757172 |
| 4 | 2 | vecCopy(double*, double*, double*, int, int) | 2 | 1048576 | 256 | 0 | 0 | 8 | 0 | 16 | 64 | 0x7f8cb5680ec0 | 0 | 65536 | 32768 | 0 | 0 | 0 | 16384 | 16384 | 0.0 | 0.0 | 0.0 | 524288.0 | 0.0 | 0.0 | 0.0 | 20724 | 0 | 2747 | 38187 | 0 | 69831.0 | 131072.0 | 0.0 | 45541.0 | 64 | 0x7f4dc6f04ec0 | 4096 | 0 | 311 | 0 | 4096 | 0 | 615 | 0 | 4096 | 0 | 1391 | 0 | 4100 | 0 | 43 | 0 | 4096 | 0 | 275 | 0 | 4096 | 0 | 2396 | 0 | 4096 | 0 | 16 | 0 | 4096 | 0 | 410 | 0 | 4096 | 0 | 1204 | 0 | 4097 | 0 | 230 | 0 | 4096 | 0 | 597 | 0 | 4096 | 0 | 934 | 0 | 4096 | 0 | 100 | 0 | 4096 | 0 | 357 | 0 | 4096 | 0 | 0 | 0 | 4097 | 0 | 809 | 0 | 4097 | 0 | 31 | 0 | 4096 | 0 | 449 | 0 | 4100 | 0 | 6 | 0 | 4096 | 0 | 774 | 0 | 4096 | 0 | 875 | 0 | 4096 | 0 | 255 | 0 | 4096 | 0 | 899 | 0 | 4096 | 0 | 1262 | 0 | 4096 | 0 | 323 | 0 | 4096 | 0 | 112 | 0 | 4096 | 0 | 1126 | 0 | 4096 | 0 | 26 | 0 | 4096 | 0 | 304 | 0 | 4097 | 0 | 1390 | 0 | 4096 | 0 | 232 | 0 | 4096 | 0 | 801 | 0 | 64 | 0x7f12d755cec0 | 32768 | 32768 | 0 | 64 | 0x7fc427340ec0 | 0 | 189365 | 0 | 0 | 65536 | 63800 | 56 | 1680 | 64 | 0x7f0ede0a8ec0 | 18947510 | 17743741 | 859705 | 344064 | 2733105 | 0 | 0 | 163840 | 832.0 | 515146.0 | 0.0 | 524288.0 | 763947.0 | 32768.0 | 915724 | 0 | 0 | 13414 | 91226.0 | 91226.0 | 0.0 | 91226.0 | 64 | 0x7fd053b44ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 56 | 131072.0 | 131072.0 | 0.0 | 2059084.0 | 64 | 0x7ff1c88bcec0 | 131072 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.0 | 0.0 | 0.0 | 0.0 | 16384 | 0 | 121626219.0 | 58024359.0 | 0.0 | 64 | 0x7f27f1d84ec0 | 114688 | 0 | 32768 | 32768 | 16384 | 16384 | 65536 | 49152 | 58310809.0 | 202035406.0 | 51471400.0 | 131072.0 | 0.0 | 463313.0 | 0 | 0 | 24953 | 7663.0 | 131082.0 | 0.0 | 18.0 | 64 | 0x7f02bc090ec0 | 0 | 0 | 0 | 56 | 0 | 65536 | 65536 | 0 | 64 | 0x7f71fb6c4ec0 | 580 | 0 | 0 | 2384547 | 573 | 0 | 0 | 2076195 | 0 | 0 | 0 | 1707563 | 257 | 0 | 0 | 2027051 | 0 | 0 | 0 | 1778158 | 175 | 0 | 0 | 2022828 | 129 | 0 | 0 | 1861580 | 0 | 0 | 0 | 1651189 | 76 | 0 | 0 | 1688029 | 0 | 0 | 0 | 1818496 | 766 | 0 | 0 | 2405585 | 227 | 0 | 0 | 1964580 | 125 | 0 | 0 | 1555538 | 0 | 0 | 0 | 1940908 | 194 | 0 | 0 | 1980412 | 0 | 0 | 0 | 1704595 | 0 | 0 | 0 | 1626585 | 0 | 0 | 0 | 1753379 | 583 | 0 | 0 | 2180781 | 123 | 0 | 0 | 1770314 | 0 | 0 | 0 | 1794918 | 191 | 0 | 0 | 2197482 | 0 | 0 | 0 | 1513569 | 0 | 0 | 0 | 1936410 | 0 | 0 | 0 | 1748736 | 277 | 0 | 0 | 1856561 | 0 | 0 | 0 | 1361974 | 568 | 0 | 0 | 2334526 | 1027 | 0 | 0 | 2735105 | 0 | 0 | 0 | 1756245 | 0 | 0 | 0 | 1697920 | 0 | 0 | 0 | 2054955 | 64 | 0x7f5c86b64ec0 | 10485760 | 65536 | 0 | 0 | 0 | 16384 | 0 | 0 | 131072.0 | 0.0 | 0.0 | 0.0 | 32768.0 | 16384.0 | 0 | 0 | 131081.0 | 89139.0 | 45580.0 | 0.0 | 64 | 0x7fe59bab8ec0 | 6285 | 0 | 4096 | 6280 | 0 | 4096 | 6270 | 0 | 4096 | 6284 | 0 | 4096 | 6260 | 0 | 4096 | 6268 | 0 | 4096 | 6292 | 0 | 4096 | 6318 | 0 | 4096 | 6326 | 0 | 4096 | 6288 | 0 | 4096 | 6285 | 0 | 4096 | 6275 | 0 | 4096 | 6291 | 0 | 4096 | 6268 | 0 | 4096 | 6271 | 0 | 4096 | 6290 | 0 | 4096 | 6293 | 0 | 4096 | 6329 | 0 | 4096 | 6279 | 0 | 4096 | 6305 | 0 | 4096 | 6270 | 0 | 4096 | 6301 | 0 | 4096 | 6313 | 0 | 4096 | 6258 | 0 | 4096 | 6263 | 0 | 4096 | 6297 | 0 | 4096 | 6334 | 0 | 4096 | 6284 | 0 | 4096 | 6306 | 0 | 4096 | 6271 | 0 | 4096 | 6305 | 0 | 4096 | 6313 | 0 | 4096 | 64 | 0x7f00e0898ec0 | 2158 | 4096 | 2158 | 6254 | 2170 | 4096 | 2170 | 6266 | 2158 | 4096 | 2158 | 6254 | 2157 | 4097 | 2158 | 6254 | 2176 | 4096 | 2176 | 6272 | 2182 | 4096 | 2182 | 6278 | 2170 | 4096 | 2170 | 6266 | 2152 | 4097 | 2153 | 6249 | 2154 | 4096 | 2154 | 6250 | 2157 | 4096 | 2157 | 6253 | 2173 | 4096 | 2173 | 6269 | 2158 | 4096 | 2158 | 6254 | 2162 | 4096 | 2162 | 6258 | 2185 | 4096 | 2185 | 6281 | 2180 | 4096 | 2180 | 6276 | 2163 | 4096 | 2163 | 6259 | 2150 | 4096 | 2150 | 6246 | 2174 | 4096 | 2174 | 6270 | 2158 | 4097 | 2159 | 6255 | 2154 | 4100 | 2158 | 6254 | 2168 | 4096 | 2168 | 6264 | 2173 | 4096 | 2173 | 6269 | 2174 | 4096 | 2174 | 6270 | 2157 | 4096 | 2157 | 6253 | 2165 | 4096 | 2165 | 6261 | 2206 | 4097 | 2207 | 6303 | 2177 | 4096 | 2177 | 6273 | 2158 | 4096 | 2158 | 6254 | 2158 | 4097 | 2159 | 6255 | 2167 | 4098 | 2169 | 6265 | 2172 | 4096 | 2172 | 6268 | 2181 | 4096 | 2181 | 6277 | 64 | 0x7f34907d8ec0 | 333192 | 218989 | 16384 | 0 | 16384 | 16384 | 32768 | 49152 | 41648 | 41648 | 3124107.0 | 2462013.0 | 4550.0 | 384500.0 | 1781440.0 | 0.0 | 2450479.0 | 2141151.0 | 333184 | 228267 | 41648 | 0 | 41648 | 0 | 1332736.0 | 776559.0 | 0.0 | 0.0 | 64 | 0x7f9df37d0ec0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 0 | 41435 | 0 | 0 | 64 | 0x7fb93c8acec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 114688 | 2097152.0 | 2097152.0 | 1048576.0 | 1048576.0 | 0.0 | 0.0 | 0.0 | 16384.0 | 30738 | 27293 | 9514 | 2578 | 0 | 39521 | 200737.0 | 0.0 | 69654.0 | 131083.0 | 64 | 0x7f6090dc4ec0 | 0 | 393216 | 163840 | 0 | 0 | 0 | 0 | 0 | 30390 | 0.0 | 0.0 | 0.0 | 32768.0 | 0.0 | 0.0 | 242.0 | 32768.0 | 4096 | 16384 | 302 | 41321 | 1977 | 0 | 56.0 | 11.0 | 0.0 | 200900.0 | 64 | 0x7f0809060ec0 | 0 | 3296459 | 2832 | 2832 | 0 | 3372524 | 2860 | 2860 | 0 | 4222254 | 2848 | 2848 | 0 | 3878328 | 2856 | 2856 | 0 | 3774522 | 2880 | 2880 | 0 | 3831094 | 2844 | 2844 | 0 | 3260405 | 2876 | 2876 | 0 | 4057262 | 2830 | 2830 | 0 | 4273330 | 2836 | 2836 | 0 | 2725887 | 2832 | 2832 | 0 | 3234063 | 2860 | 2860 | 0 | 3333475 | 2852 | 2852 | 0 | 3604070 | 2852 | 2852 | 0 | 3326805 | 2876 | 2876 | 0 | 3142407 | 2840 | 2840 | 0 | 3714948 | 2876 | 2876 | 0 | 2930790 | 2804 | 2804 | 0 | 3635042 | 2868 | 2868 | 0 | 3668097 | 2840 | 2840 | 0 | 5045459 | 2848 | 2848 | 0 | 4655237 | 2812 | 2812 | 0 | 3073880 | 2868 | 2868 | 0 | 2615458 | 2808 | 2808 | 0 | 4182335 | 2816 | 2816 | 0 | 3381199 | 2816 | 2816 | 0 | 3942930 | 2810 | 2810 | 0 | 4447030 | 2868 | 2868 | 0 | 4492459 | 2842 | 2842 | 0 | 3600791 | 2852 | 2852 | 0 | 3522880 | 2808 | 2808 | 0 | 3130714 | 2868 | 2868 | 0 | 4177317 | 2808 | 2808 | 64 | 0x7fc4fdbbcec0 | 0 | 0 | 1048576 | 0 | 0 | 0 | 0 | 0 | 0.0 | 0.0 | 0.0 | 0.0 | 16384.0 | 0.0 | 0 | 32768 | 65552.0 | 0.0 | 0.0 | 0.0 | 200787787778292 | 200787787794132 |