zichguan-amd 0c698557a0 rocr: check _SC_LEVEL1_DCACHE_LINESIZE before use ...

Support musl
Fixes ROCm/ROCR-Runtime#318

Signed-off-by: zichguan-amd <zichuan.guan@amd.com>


[ROCm/ROCR-Runtime commit: 7946ddb647]

2025-07-14 14:44:31 -04:00

..

rocr-runtime

rocr: check _SC_LEVEL1_DCACHE_LINESIZE before use

2025-07-14 14:44:31 -04:00