0da70b03de
SWDEV-120180 - [amdgpu-pro] OpenCL support for SSG - Add initial support of DGMA memory under ROCr backend. - The implementation requires amdgpu-pro stack initialization and memory allocation. - An interop with HSA device is created for ROCr access Affected files ... ... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/Makefile#10 edit ... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/build/Makefile.api#153 edit ... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/cl_lqdflash_amd.cpp#18 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/device.hpp#285 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpusettings.cpp#351 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/build/Makefile.oclrocm#16 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/pro/lnxheaders.h#1 add ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/pro/prodevice.cpp#1 add ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/pro/prodevice.hpp#1 add ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/pro/prodriver.hpp#1 add ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocdevice.cpp#51 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocdevice.hpp#21 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocmemory.cpp#19 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocsettings.cpp#18 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocvirtual.cpp#38 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocvirtual.hpp#11 edit ... //depot/stg/opencl/drivers/opencl/runtime/platform/memory.hpp#101 edit ... //depot/stg/opencl/drivers/opencl/runtime/runtimedefs#41 edit
1390 řádky
42 KiB
C++
1390 řádky
42 KiB
C++
//
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// Copyright (c) 2008 Advanced Micro Devices, Inc. All rights reserved.
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//
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#ifndef WITHOUT_HSA_BACKEND
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#include "platform/program.hpp"
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#include "platform/kernel.hpp"
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#include "os/os.hpp"
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#include "utils/debug.hpp"
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#include "utils/flags.hpp"
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#include "utils/versions.hpp"
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#include "thread/monitor.hpp"
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#include "CL/cl_ext.h"
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#include "amdocl/cl_common.hpp"
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#include "device/rocm/rocdevice.hpp"
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#include "device/rocm/rocblit.hpp"
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#include "device/rocm/rocvirtual.hpp"
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#include "device/rocm/rocprogram.hpp"
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#if defined(WITH_LIGHTNING_COMPILER)
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#include "driver/AmdCompiler.h"
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#else // !defined(WITH_LIGHTNING_COMPILER)
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#include "device/rocm/roccompilerlib.hpp"
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#endif // !defined(WITH_LIGHTNING_COMPILER)
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#include "device/rocm/rocmemory.hpp"
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#include "device/rocm/rocglinterop.hpp"
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#include "pro/prodriver.hpp"
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#include <cstring>
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#include <fstream>
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#include <sstream>
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#include <iostream>
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#include <vector>
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#include <algorithm>
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#endif // WITHOUT_HSA_BACKEND
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#define OPENCL_VERSION_STR XSTR(OPENCL_MAJOR) "." XSTR(OPENCL_MINOR)
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#ifndef WITHOUT_HSA_BACKEND
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namespace device {
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extern const char* BlitSourceCode;
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}
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namespace roc {
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amd::Device::Compiler* NullDevice::compilerHandle_;
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bool roc::Device::isHsaInitialized_ = false;
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hsa_agent_t roc::Device::cpu_agent_ = {0};
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std::vector<hsa_agent_t> roc::Device::gpu_agents_;
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const bool roc::Device::offlineDevice_ = false;
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const bool roc::NullDevice::offlineDevice_ = true;
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static HsaDeviceId getHsaDeviceId(hsa_agent_t device, uint32_t& pci_id) {
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if (HSA_STATUS_SUCCESS !=
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hsa_agent_get_info(device, (hsa_agent_info_t)HSA_AMD_AGENT_INFO_CHIP_ID, &pci_id)) {
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return HSA_INVALID_DEVICE_ID;
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}
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char agent_name[64] = {0};
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if (HSA_STATUS_SUCCESS != hsa_agent_get_info(device, HSA_AGENT_INFO_NAME, agent_name)) {
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return HSA_INVALID_DEVICE_ID;
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}
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if (strncmp(agent_name, "gfx", 3) != 0) {
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return HSA_INVALID_DEVICE_ID;
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}
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uint gfxipVersion = atoi(&agent_name[3]);
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if (gfxipVersion < 900 && GPU_VEGA10_ONLY) {
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return HSA_INVALID_DEVICE_ID;
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}
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switch (gfxipVersion) {
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case 701:
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return HSA_HAWAII_ID;
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case 801:
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return HSA_CARRIZO_ID;
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case 802:
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return HSA_TONGA_ID;
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case 803:
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return HSA_FIJI_ID;
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case 900:
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return HSA_VEGA10_ID;
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default:
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return HSA_INVALID_DEVICE_ID;
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}
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}
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bool NullDevice::create(const AMDDeviceInfo& deviceInfo) {
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online_ = false;
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deviceInfo_ = deviceInfo;
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// Mark the device as GPU type
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info_.type_ = CL_DEVICE_TYPE_GPU;
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info_.vendorId_ = 0x1002;
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settings_ = new Settings();
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roc::Settings* hsaSettings = static_cast<roc::Settings*>(settings_);
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if ((hsaSettings == nullptr) || !hsaSettings->create(false, deviceInfo_.gfxipVersion_)) {
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LogError("Error creating settings for nullptr HSA device");
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return false;
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}
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// Report the device name
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::strcpy(info_.name_, "AMD HSA Device");
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info_.extensions_ = getExtensionString();
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info_.maxWorkGroupSize_ = hsaSettings->maxWorkGroupSize_;
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::strcpy(info_.vendor_, "Advanced Micro Devices, Inc.");
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info_.oclcVersion_ = "OpenCL C " IF(IS_LIGHTNING, OPENCL_VERSION_STR, "1.2") " ";
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strcpy(info_.driverVersion_, "1.0 Provisional (hsa)");
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info_.version_ = "OpenCL " OPENCL_VERSION_STR " ";
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return true;
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}
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Device::Device(hsa_agent_t bkendDevice)
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: mapCacheOps_(nullptr)
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, mapCache_(nullptr)
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, _bkendDevice(bkendDevice)
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, gpuvm_segment_max_alloc_(0)
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, alloc_granularity_(0)
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, context_(nullptr)
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, xferQueue_(nullptr)
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, xferRead_(nullptr)
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, xferWrite_(nullptr)
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, pro_device_(nullptr)
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, pro_ena_(false)
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, numOfVgpus_(0) {
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group_segment_.handle = 0;
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system_segment_.handle = 0;
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system_coarse_segment_.handle = 0;
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gpuvm_segment_.handle = 0;
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}
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Device::~Device() {
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#ifdef WITH_AMDGPU_PRO
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delete pro_device_;
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#endif
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// Release cached map targets
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for (uint i = 0; mapCache_ != nullptr && i < mapCache_->size(); ++i) {
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if ((*mapCache_)[i] != nullptr) {
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(*mapCache_)[i]->release();
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}
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}
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delete mapCache_;
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delete mapCacheOps_;
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// Destroy temporary buffers for read/write
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delete xferRead_;
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delete xferWrite_;
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// Destroy transfer queue
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if (xferQueue_ && xferQueue_->terminate()) {
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delete xferQueue_;
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xferQueue_ = nullptr;
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}
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if (blitProgram_) {
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delete blitProgram_;
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blitProgram_ = nullptr;
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}
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if (context_ != nullptr) {
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context_->release();
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}
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if (info_.extensions_) {
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delete[] info_.extensions_;
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info_.extensions_ = nullptr;
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}
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if (settings_) {
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delete settings_;
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settings_ = nullptr;
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}
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}
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bool NullDevice::initCompiler(bool isOffline) {
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#if !defined(WITH_LIGHTNING_COMPILER)
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// Initializes g_complibModule and g_complibApi if they were not initialized
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if (g_complibModule == nullptr) {
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if (!LoadCompLib(isOffline)) {
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if (!isOffline) {
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LogError("Error - could not find the compiler library");
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}
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return false;
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}
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}
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// Initialize the compiler handle if has already not been initialized
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// This is destroyed in Device::teardown
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acl_error error;
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if (!compilerHandle_) {
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compilerHandle_ = g_complibApi._aclCompilerInit(nullptr, &error);
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if (error != ACL_SUCCESS) {
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LogError("Error initializing the compiler handle");
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return false;
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}
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}
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#endif // !defined(WITH_LIGHTNING_COMPILER)
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return true;
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}
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bool NullDevice::destroyCompiler() {
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#if defined(WITH_LIGHTNING_COMPILER)
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delete compilerHandle_;
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compilerHandle_ = nullptr;
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#else // !defined(WITH_LIGHTNING_COMPILER)
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if (compilerHandle_ != nullptr) {
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acl_error error = g_complibApi._aclCompilerFini(compilerHandle_);
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if (error != ACL_SUCCESS) {
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LogError("Error closing the compiler");
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return false;
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}
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}
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if (g_complibModule != nullptr) {
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UnloadCompLib();
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}
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#endif // !defined(WITH_LIGHTNING_COMPILER)
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return true;
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}
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void NullDevice::tearDown() { destroyCompiler(); }
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bool NullDevice::init() {
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// Initialize the compiler
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if (!initCompiler(offlineDevice_)) {
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return false;
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}
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// Return without initializing offline device list
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return true;
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#if !defined(WITH_LIGHTNING_COMPILER)
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// If there is an HSA enabled device online then skip any offline device
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std::vector<Device*> devices;
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devices = getDevices(CL_DEVICE_TYPE_GPU, false);
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// Load the offline devices
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// Iterate through the set of available offline devices
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for (uint id = 0; id < sizeof(DeviceInfo) / sizeof(AMDDeviceInfo); id++) {
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bool isOnline = false;
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// Check if the particular device is online
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for (unsigned int i = 0; i < devices.size(); i++) {
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if (static_cast<NullDevice*>(devices[i])->deviceInfo_.hsaDeviceId_ ==
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DeviceInfo[id].hsaDeviceId_) {
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isOnline = true;
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}
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}
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if (isOnline) {
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continue;
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}
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NullDevice* nullDevice = new NullDevice();
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if (!nullDevice->create(DeviceInfo[id])) {
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LogError("Error creating new instance of Device.");
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delete nullDevice;
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return false;
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}
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nullDevice->registerDevice();
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}
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#endif // !defined(WITH_LIGHTNING_COMPILER)
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return true;
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}
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NullDevice::~NullDevice() {
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if (info_.extensions_) {
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delete[] info_.extensions_;
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info_.extensions_ = nullptr;
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}
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if (settings_) {
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delete settings_;
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settings_ = nullptr;
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}
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}
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hsa_status_t Device::iterateAgentCallback(hsa_agent_t agent, void* data) {
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hsa_device_type_t dev_type = HSA_DEVICE_TYPE_CPU;
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hsa_status_t stat = hsa_agent_get_info(agent, HSA_AGENT_INFO_DEVICE, &dev_type);
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if (stat != HSA_STATUS_SUCCESS) {
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return stat;
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}
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if (dev_type == HSA_DEVICE_TYPE_CPU) {
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Device::cpu_agent_ = agent;
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} else if (dev_type == HSA_DEVICE_TYPE_GPU) {
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gpu_agents_.push_back(agent);
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}
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return HSA_STATUS_SUCCESS;
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}
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hsa_ven_amd_loader_1_00_pfn_t Device::amd_loader_ext_table = {nullptr};
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hsa_status_t Device::loaderQueryHostAddress(const void* device, const void** host) {
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return amd_loader_ext_table.hsa_ven_amd_loader_query_host_address
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? amd_loader_ext_table.hsa_ven_amd_loader_query_host_address(device, host)
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: HSA_STATUS_ERROR;
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}
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Device::XferBuffers::~XferBuffers() {
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// Destroy temporary buffer for reads
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for (const auto& buf : freeBuffers_) {
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delete buf;
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}
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freeBuffers_.clear();
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}
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bool Device::XferBuffers::create() {
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Memory* xferBuf = nullptr;
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bool result = false;
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// Create a buffer object
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xferBuf = new Buffer(dev(), bufSize_);
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// Try to allocate memory for the transfer buffer
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if ((nullptr == xferBuf) || !xferBuf->create()) {
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delete xferBuf;
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xferBuf = nullptr;
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LogError("Couldn't allocate a transfer buffer!");
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} else {
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result = true;
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freeBuffers_.push_back(xferBuf);
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}
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return result;
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}
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Memory& Device::XferBuffers::acquire() {
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Memory* xferBuf = nullptr;
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size_t listSize;
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// Lock the operations with the staged buffer list
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amd::ScopedLock l(lock_);
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listSize = freeBuffers_.size();
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// If the list is empty, then attempt to allocate a staged buffer
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if (listSize == 0) {
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// Allocate memory
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xferBuf = new Buffer(dev(), bufSize_);
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// Allocate memory for the transfer buffer
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if ((nullptr == xferBuf) || !xferBuf->create()) {
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delete xferBuf;
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xferBuf = nullptr;
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LogError("Couldn't allocate a transfer buffer!");
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} else {
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++acquiredCnt_;
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}
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}
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if (xferBuf == nullptr) {
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xferBuf = *(freeBuffers_.begin());
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freeBuffers_.erase(freeBuffers_.begin());
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++acquiredCnt_;
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}
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return *xferBuf;
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}
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void Device::XferBuffers::release(VirtualGPU& gpu, Memory& buffer) {
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// Make sure buffer isn't busy on the current VirtualGPU, because
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// the next aquire can come from different queue
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// buffer.wait(gpu);
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// Lock the operations with the staged buffer list
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amd::ScopedLock l(lock_);
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freeBuffers_.push_back(&buffer);
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--acquiredCnt_;
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}
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bool Device::init() {
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#if defined(__linux__)
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if (amd::Os::getEnvironment("HSA_ENABLE_SDMA").empty()) {
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::setenv("HSA_ENABLE_SDMA", "0", false);
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}
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#endif // defined (__linux__)
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LogInfo("Initializing HSA stack.");
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// Initialize the compiler
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if (!initCompiler(offlineDevice_)) {
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return false;
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}
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if (HSA_STATUS_SUCCESS != hsa_init()) {
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LogError("hsa_init failed.");
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return false;
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}
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hsa_system_get_major_extension_table(HSA_EXTENSION_AMD_LOADER, 1, sizeof(amd_loader_ext_table),
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&amd_loader_ext_table);
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if (HSA_STATUS_SUCCESS != hsa_iterate_agents(iterateAgentCallback, nullptr)) {
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return false;
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}
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std::vector<bool> selectedDevices;
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selectedDevices.resize(gpu_agents_.size(), true);
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if (!flagIsDefault(GPU_DEVICE_ORDINAL)) {
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std::fill(selectedDevices.begin(), selectedDevices.end(), false);
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std::string ordinals(GPU_DEVICE_ORDINAL);
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size_t end, pos = 0;
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do {
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end = ordinals.find_first_of(',', pos);
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size_t index = atoi(ordinals.substr(pos, end - pos).c_str());
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selectedDevices.resize(index + 1);
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selectedDevices[index] = true;
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pos = end + 1;
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} while (end != std::string::npos);
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}
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size_t ordinal = 0;
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for (auto agent : gpu_agents_) {
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std::unique_ptr<Device> roc_device(new Device(agent));
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if (!roc_device) {
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LogError("Error creating new instance of Device on then heap.");
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return HSA_STATUS_ERROR_OUT_OF_RESOURCES;
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}
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uint32_t pci_id;
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HsaDeviceId deviceId = getHsaDeviceId(agent, pci_id);
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if (deviceId == HSA_INVALID_DEVICE_ID) {
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LogPrintfError("Invalid HSA device %x", pci_id);
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continue;
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}
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// Find device id in the table
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uint id = HSA_INVALID_DEVICE_ID;
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for (uint i = 0; i < sizeof(DeviceInfo) / sizeof(AMDDeviceInfo); ++i) {
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if (DeviceInfo[i].hsaDeviceId_ == deviceId) {
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id = i;
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break;
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}
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}
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// If the AmdDeviceInfo for the HsaDevice Id could not be found return false
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if (id == HSA_INVALID_DEVICE_ID) {
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LogPrintfWarning("Could not find a DeviceInfo entry for %d", deviceId);
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continue;
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}
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roc_device->deviceInfo_ = DeviceInfo[id];
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roc_device->deviceInfo_.pciDeviceId_ = pci_id;
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// Query the agent's ISA name to fill deviceInfo.gfxipVersion_. We can't
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// have a static mapping as some marketing names cover multiple gfxip.
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hsa_isa_t isa = {0};
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if (hsa_agent_get_info(agent, HSA_AGENT_INFO_ISA, &isa) != HSA_STATUS_SUCCESS) {
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continue;
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}
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uint32_t isaNameLength = 0;
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if (hsa_isa_get_info_alt(isa, HSA_ISA_INFO_NAME_LENGTH, &isaNameLength) != HSA_STATUS_SUCCESS) {
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continue;
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}
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char* isaName = (char*)alloca((size_t)isaNameLength + 1);
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if (hsa_isa_get_info_alt(isa, HSA_ISA_INFO_NAME, isaName) != HSA_STATUS_SUCCESS) {
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continue;
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}
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isaName[isaNameLength] = '\0';
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std::string str(isaName);
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std::vector<std::string> tokens;
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size_t end, pos = 0;
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do {
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end = str.find_first_of(':', pos);
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tokens.push_back(str.substr(pos, end - pos));
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pos = end + 1;
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} while (end != std::string::npos);
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if (tokens.size() != 5 || tokens[0] != "AMD" || tokens[1] != "AMDGPU") {
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LogError("Not an AMD:AMDGPU ISA name");
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continue;
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}
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uint major = atoi(tokens[2].c_str());
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uint minor = atoi(tokens[3].c_str());
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uint stepping = atoi(tokens[4].c_str());
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if (minor >= 10 && stepping >= 10) {
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LogError("Invalid ISA string");
|
|
continue;
|
|
}
|
|
|
|
roc_device->deviceInfo_.gfxipVersion_ = major * 100 + minor * 10 + stepping;
|
|
|
|
if (!roc_device->create()) {
|
|
LogError("Error creating new instance of Device.");
|
|
continue;
|
|
}
|
|
|
|
// Setup System Memory to be Non-Coherent per user
|
|
// request via environment variable. By default the
|
|
// System Memory is setup to be Coherent
|
|
if (roc_device->settings().enableNCMode_) {
|
|
hsa_status_t err = hsa_amd_coherency_set_type(agent, HSA_AMD_COHERENCY_TYPE_NONCOHERENT);
|
|
if (err != HSA_STATUS_SUCCESS) {
|
|
LogError("Unable to set NC memory policy!");
|
|
continue;
|
|
}
|
|
}
|
|
|
|
if (selectedDevices[ordinal++] &&
|
|
(flagIsDefault(GPU_DEVICE_NAME) || GPU_DEVICE_NAME == 0 || GPU_DEVICE_NAME[0] == '\0' ||
|
|
!strcmp(GPU_DEVICE_NAME, roc_device->info_.name_))) {
|
|
roc_device.release()->registerDevice();
|
|
}
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
void Device::tearDown() {
|
|
NullDevice::tearDown();
|
|
hsa_shut_down();
|
|
}
|
|
|
|
bool Device::create() {
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_agent_get_info(_bkendDevice, HSA_AGENT_INFO_PROFILE, &agent_profile_)) {
|
|
return false;
|
|
}
|
|
|
|
// Create HSA settings
|
|
settings_ = new Settings();
|
|
roc::Settings* hsaSettings = static_cast<roc::Settings*>(settings_);
|
|
if ((hsaSettings == nullptr) ||
|
|
!hsaSettings->create((agent_profile_ == HSA_PROFILE_FULL), deviceInfo_.gfxipVersion_)) {
|
|
return false;
|
|
}
|
|
|
|
if (!amd::Device::create()) {
|
|
return false;
|
|
}
|
|
|
|
uint32_t hsa_bdf_id = 0;
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_agent_get_info(_bkendDevice, (hsa_agent_info_t)HSA_AMD_AGENT_INFO_BDFID, &hsa_bdf_id)) {
|
|
return false;
|
|
}
|
|
|
|
info_.deviceTopology_.pcie.type = CL_DEVICE_TOPOLOGY_TYPE_PCIE_AMD;
|
|
info_.deviceTopology_.pcie.bus = (hsa_bdf_id & (0xFF << 8)) >> 8;
|
|
info_.deviceTopology_.pcie.device = (hsa_bdf_id & (0x1F << 3)) >> 3;
|
|
info_.deviceTopology_.pcie.function = (hsa_bdf_id & 0x07);
|
|
|
|
#ifdef WITH_AMDGPU_PRO
|
|
// Create amdgpu-pro device interface for SSG support
|
|
pro_device_ = IProDevice::Init(
|
|
info_.deviceTopology_.pcie.bus,
|
|
info_.deviceTopology_.pcie.device,
|
|
info_.deviceTopology_.pcie.function);
|
|
if (pro_device_ != nullptr) {
|
|
pro_ena_ = true;
|
|
settings_->enableExtension(ClAMDLiquidFlash);
|
|
}
|
|
#endif
|
|
|
|
if (populateOCLDeviceConstants() == false) {
|
|
return false;
|
|
}
|
|
|
|
#if defined(WITH_LIGHTNING_COMPILER)
|
|
// create compilation object with cache support
|
|
int gfxipMajor = deviceInfo_.gfxipVersion_ / 100;
|
|
int gfxipMinor = deviceInfo_.gfxipVersion_ / 10 % 10;
|
|
int gfxipStepping = deviceInfo_.gfxipVersion_ % 10;
|
|
|
|
// Use compute capability as target (AMD:AMDGPU:major:minor:stepping)
|
|
// with dash as delimiter to be compatible with Windows directory name
|
|
std::ostringstream cacheTarget;
|
|
cacheTarget << "AMD-AMDGPU-" << gfxipMajor << "-" << gfxipMinor << "-" << gfxipStepping;
|
|
|
|
amd::CacheCompilation* compObj = new amd::CacheCompilation(
|
|
cacheTarget.str(), "_rocm", OCL_CODE_CACHE_ENABLE, OCL_CODE_CACHE_RESET);
|
|
if (!compObj) {
|
|
LogError("Unable to create cache compilation object!");
|
|
return false;
|
|
}
|
|
|
|
cacheCompilation_.reset(compObj);
|
|
#endif
|
|
|
|
amd::Context::Info info = {0};
|
|
std::vector<amd::Device*> devices;
|
|
devices.push_back(this);
|
|
|
|
// Create a dummy context
|
|
context_ = new amd::Context(devices, info);
|
|
if (context_ == nullptr) {
|
|
return false;
|
|
}
|
|
|
|
blitProgram_ = new BlitProgram(context_);
|
|
// Create blit programs
|
|
if (blitProgram_ == nullptr || !blitProgram_->create(this)) {
|
|
delete blitProgram_;
|
|
blitProgram_ = nullptr;
|
|
LogError("Couldn't create blit kernels!");
|
|
return false;
|
|
}
|
|
|
|
mapCacheOps_ = new amd::Monitor("Map Cache Lock", true);
|
|
if (nullptr == mapCacheOps_) {
|
|
return false;
|
|
}
|
|
|
|
mapCache_ = new std::vector<amd::Memory*>();
|
|
if (mapCache_ == nullptr) {
|
|
return false;
|
|
}
|
|
// Use just 1 entry by default for the map cache
|
|
mapCache_->push_back(nullptr);
|
|
|
|
if (settings().stagedXferSize_ != 0) {
|
|
// Initialize staged write buffers
|
|
if (settings().stagedXferWrite_) {
|
|
xferWrite_ = new XferBuffers(*this, amd::alignUp(settings().stagedXferSize_, 4 * Ki));
|
|
if ((xferWrite_ == nullptr) || !xferWrite_->create()) {
|
|
LogError("Couldn't allocate transfer buffer objects for read");
|
|
return false;
|
|
}
|
|
}
|
|
|
|
// Initialize staged read buffers
|
|
if (settings().stagedXferRead_) {
|
|
xferRead_ = new XferBuffers(*this, amd::alignUp(settings().stagedXferSize_, 4 * Ki));
|
|
if ((xferRead_ == nullptr) || !xferRead_->create()) {
|
|
LogError("Couldn't allocate transfer buffer objects for write");
|
|
return false;
|
|
}
|
|
}
|
|
}
|
|
|
|
xferQueue();
|
|
|
|
return true;
|
|
}
|
|
|
|
device::Program* NullDevice::createProgram(amd::option::Options* options) {
|
|
return new roc::HSAILProgram(*this);
|
|
}
|
|
|
|
device::Program* Device::createProgram(amd::option::Options* options) {
|
|
return new roc::HSAILProgram(*this);
|
|
}
|
|
|
|
hsa_status_t Device::iterateGpuMemoryPoolCallback(hsa_amd_memory_pool_t pool, void* data) {
|
|
if (data == nullptr) {
|
|
return HSA_STATUS_ERROR_INVALID_ARGUMENT;
|
|
}
|
|
|
|
hsa_region_segment_t segment_type = (hsa_region_segment_t)0;
|
|
hsa_status_t stat =
|
|
hsa_amd_memory_pool_get_info(pool, HSA_AMD_MEMORY_POOL_INFO_SEGMENT, &segment_type);
|
|
if (stat != HSA_STATUS_SUCCESS) {
|
|
return stat;
|
|
}
|
|
|
|
// TODO: system and device local segment
|
|
Device* dev = reinterpret_cast<Device*>(data);
|
|
switch (segment_type) {
|
|
case HSA_REGION_SEGMENT_GLOBAL: {
|
|
if (dev->settings().enableLocalMemory_) {
|
|
dev->gpuvm_segment_ = pool;
|
|
}
|
|
break;
|
|
}
|
|
case HSA_REGION_SEGMENT_GROUP:
|
|
dev->group_segment_ = pool;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
return HSA_STATUS_SUCCESS;
|
|
}
|
|
|
|
hsa_status_t Device::iterateCpuMemoryPoolCallback(hsa_amd_memory_pool_t pool, void* data) {
|
|
if (data == nullptr) {
|
|
return HSA_STATUS_ERROR_INVALID_ARGUMENT;
|
|
}
|
|
|
|
hsa_region_segment_t segment_type = (hsa_region_segment_t)0;
|
|
hsa_status_t stat =
|
|
hsa_amd_memory_pool_get_info(pool, HSA_AMD_MEMORY_POOL_INFO_SEGMENT, &segment_type);
|
|
if (stat != HSA_STATUS_SUCCESS) {
|
|
return stat;
|
|
}
|
|
|
|
Device* dev = reinterpret_cast<Device*>(data);
|
|
switch (segment_type) {
|
|
case HSA_REGION_SEGMENT_GLOBAL: {
|
|
uint32_t global_flag = 0;
|
|
hsa_status_t stat =
|
|
hsa_amd_memory_pool_get_info(pool, HSA_AMD_MEMORY_POOL_INFO_GLOBAL_FLAGS, &global_flag);
|
|
if (stat != HSA_STATUS_SUCCESS) {
|
|
return stat;
|
|
}
|
|
|
|
if ((global_flag & HSA_REGION_GLOBAL_FLAG_FINE_GRAINED) != 0) {
|
|
dev->system_segment_ = pool;
|
|
} else {
|
|
dev->system_coarse_segment_ = pool;
|
|
}
|
|
break;
|
|
}
|
|
default:
|
|
break;
|
|
}
|
|
|
|
return HSA_STATUS_SUCCESS;
|
|
}
|
|
|
|
bool Device::populateOCLDeviceConstants() {
|
|
info_.available_ = true;
|
|
|
|
roc::Settings* hsa_settings = static_cast<roc::Settings*>(settings_);
|
|
|
|
int gfxipMajor = deviceInfo_.gfxipVersion_ / 100;
|
|
int gfxipMinor = deviceInfo_.gfxipVersion_ / 10 % 10;
|
|
int gfxipStepping = deviceInfo_.gfxipVersion_ % 10;
|
|
|
|
std::ostringstream oss;
|
|
oss << "gfx" << gfxipMajor << gfxipMinor << gfxipStepping;
|
|
::strcpy(info_.name_, oss.str().c_str());
|
|
|
|
char device_name[64] = {0};
|
|
if (HSA_STATUS_SUCCESS == hsa_agent_get_info(_bkendDevice,
|
|
(hsa_agent_info_t)HSA_AMD_AGENT_INFO_PRODUCT_NAME,
|
|
device_name)) {
|
|
::strcpy(info_.boardName_, device_name);
|
|
}
|
|
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_agent_get_info(_bkendDevice, (hsa_agent_info_t)HSA_AMD_AGENT_INFO_COMPUTE_UNIT_COUNT,
|
|
&info_.maxComputeUnits_)) {
|
|
return false;
|
|
}
|
|
assert(info_.maxComputeUnits_ > 0);
|
|
|
|
if (HSA_STATUS_SUCCESS != hsa_agent_get_info(_bkendDevice,
|
|
(hsa_agent_info_t)HSA_AMD_AGENT_INFO_CACHELINE_SIZE,
|
|
&info_.globalMemCacheLineSize_)) {
|
|
return false;
|
|
}
|
|
assert(info_.globalMemCacheLineSize_ > 0);
|
|
|
|
uint32_t cachesize[4] = {0};
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_agent_get_info(_bkendDevice, HSA_AGENT_INFO_CACHE_SIZE, cachesize)) {
|
|
return false;
|
|
}
|
|
assert(cachesize[0] > 0);
|
|
info_.globalMemCacheSize_ = cachesize[0];
|
|
|
|
info_.globalMemCacheType_ = CL_READ_WRITE_CACHE;
|
|
|
|
info_.type_ = CL_DEVICE_TYPE_GPU;
|
|
|
|
info_.extensions_ = getExtensionString();
|
|
info_.nativeVectorWidthDouble_ = info_.preferredVectorWidthDouble_ =
|
|
(settings().doublePrecision_) ? 1 : 0;
|
|
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_agent_get_info(_bkendDevice, (hsa_agent_info_t)HSA_AMD_AGENT_INFO_MAX_CLOCK_FREQUENCY,
|
|
&info_.maxClockFrequency_)) {
|
|
return false;
|
|
}
|
|
assert(info_.maxClockFrequency_ > 0);
|
|
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_amd_agent_iterate_memory_pools(cpu_agent_, Device::iterateCpuMemoryPoolCallback, this)) {
|
|
return false;
|
|
}
|
|
|
|
assert(system_segment_.handle != 0);
|
|
|
|
if (HSA_STATUS_SUCCESS != hsa_amd_agent_iterate_memory_pools(
|
|
_bkendDevice, Device::iterateGpuMemoryPoolCallback, this)) {
|
|
return false;
|
|
}
|
|
|
|
assert(group_segment_.handle != 0);
|
|
|
|
size_t group_segment_size = 0;
|
|
if (HSA_STATUS_SUCCESS != hsa_amd_memory_pool_get_info(group_segment_,
|
|
HSA_AMD_MEMORY_POOL_INFO_SIZE,
|
|
&group_segment_size)) {
|
|
return false;
|
|
}
|
|
assert(group_segment_size > 0);
|
|
|
|
info_.localMemSizePerCU_ = group_segment_size;
|
|
info_.localMemSize_ = group_segment_size;
|
|
|
|
info_.maxWorkItemDimensions_ = 3;
|
|
|
|
if (settings().enableLocalMemory_ && gpuvm_segment_.handle != 0) {
|
|
size_t global_segment_size = 0;
|
|
if (HSA_STATUS_SUCCESS != hsa_amd_memory_pool_get_info(gpuvm_segment_,
|
|
HSA_AMD_MEMORY_POOL_INFO_SIZE,
|
|
&global_segment_size)) {
|
|
return false;
|
|
}
|
|
|
|
assert(global_segment_size > 0);
|
|
info_.globalMemSize_ = static_cast<cl_ulong>(global_segment_size);
|
|
|
|
gpuvm_segment_max_alloc_ =
|
|
cl_ulong(info_.globalMemSize_ * std::min(GPU_SINGLE_ALLOC_PERCENT, 100u) / 100u);
|
|
assert(gpuvm_segment_max_alloc_ > 0);
|
|
|
|
info_.maxMemAllocSize_ = static_cast<cl_ulong>(gpuvm_segment_max_alloc_);
|
|
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_amd_memory_pool_get_info(gpuvm_segment_, HSA_AMD_MEMORY_POOL_INFO_RUNTIME_ALLOC_GRANULE,
|
|
&alloc_granularity_)) {
|
|
return false;
|
|
}
|
|
|
|
assert(alloc_granularity_ > 0);
|
|
} else {
|
|
static const cl_ulong kDefaultGlobalMemSize = cl_ulong(1 * Gi);
|
|
info_.globalMemSize_ = kDefaultGlobalMemSize;
|
|
info_.maxMemAllocSize_ = info_.globalMemSize_ / 4;
|
|
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_amd_memory_pool_get_info(
|
|
system_segment_, HSA_AMD_MEMORY_POOL_INFO_RUNTIME_ALLOC_GRANULE, &alloc_granularity_)) {
|
|
return false;
|
|
}
|
|
}
|
|
|
|
// Make sure the max allocation size is not larger than the available
|
|
// memory size.
|
|
info_.maxMemAllocSize_ = std::min(info_.maxMemAllocSize_, info_.globalMemSize_);
|
|
|
|
/*make sure we don't run anything over 8 params for now*/
|
|
info_.maxParameterSize_ = 1024; // [TODO]: CAL stack values: 1024*
|
|
// constant
|
|
|
|
uint32_t max_work_group_size = 0;
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_agent_get_info(_bkendDevice, HSA_AGENT_INFO_WORKGROUP_MAX_SIZE, &max_work_group_size)) {
|
|
return false;
|
|
}
|
|
assert(max_work_group_size > 0);
|
|
max_work_group_size =
|
|
std::min(max_work_group_size, static_cast<uint32_t>(settings().maxWorkGroupSize_));
|
|
info_.maxWorkGroupSize_ = max_work_group_size;
|
|
|
|
uint16_t max_workgroup_size[3] = {0, 0, 0};
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_agent_get_info(_bkendDevice, HSA_AGENT_INFO_WORKGROUP_MAX_DIM, &max_workgroup_size)) {
|
|
return false;
|
|
}
|
|
assert(max_workgroup_size[0] != 0 && max_workgroup_size[1] != 0 && max_workgroup_size[2] != 0);
|
|
|
|
uint16_t max_work_item_size = static_cast<uint16_t>(max_work_group_size);
|
|
info_.maxWorkItemSizes_[0] = std::min(max_workgroup_size[0], max_work_item_size);
|
|
info_.maxWorkItemSizes_[1] = std::min(max_workgroup_size[1], max_work_item_size);
|
|
info_.maxWorkItemSizes_[2] = std::min(max_workgroup_size[2], max_work_item_size);
|
|
|
|
info_.nativeVectorWidthChar_ = info_.preferredVectorWidthChar_ = 4;
|
|
info_.nativeVectorWidthShort_ = info_.preferredVectorWidthShort_ = 2;
|
|
info_.nativeVectorWidthInt_ = info_.preferredVectorWidthInt_ = 1;
|
|
info_.nativeVectorWidthLong_ = info_.preferredVectorWidthLong_ = 1;
|
|
info_.nativeVectorWidthFloat_ = info_.preferredVectorWidthFloat_ = 1;
|
|
|
|
if (agent_profile_ == HSA_PROFILE_FULL) { // full-profile = participating in coherent memory,
|
|
// base-profile = NUMA based non-coherent memory
|
|
info_.hostUnifiedMemory_ = CL_TRUE;
|
|
}
|
|
info_.memBaseAddrAlign_ =
|
|
8 * (flagIsDefault(MEMOBJ_BASE_ADDR_ALIGN) ? sizeof(cl_long16) : MEMOBJ_BASE_ADDR_ALIGN);
|
|
info_.minDataTypeAlignSize_ = sizeof(cl_long16);
|
|
|
|
info_.maxConstantArgs_ = 8;
|
|
info_.maxConstantBufferSize_ = info_.maxMemAllocSize_;
|
|
info_.localMemType_ = CL_LOCAL;
|
|
info_.errorCorrectionSupport_ = false;
|
|
info_.profilingTimerResolution_ = 1;
|
|
info_.littleEndian_ = true;
|
|
info_.compilerAvailable_ = true;
|
|
info_.executionCapabilities_ = CL_EXEC_KERNEL;
|
|
info_.queueProperties_ = CL_QUEUE_PROFILING_ENABLE;
|
|
info_.platform_ = AMD_PLATFORM;
|
|
info_.profile_ = "FULL_PROFILE";
|
|
strcpy(info_.vendor_, "Advanced Micro Devices, Inc.");
|
|
|
|
info_.addressBits_ = LP64_SWITCH(32, 64);
|
|
info_.maxSamplers_ = 16;
|
|
info_.bufferFromImageSupport_ = CL_FALSE;
|
|
info_.oclcVersion_ = "OpenCL C " IF(IS_LIGHTNING, OPENCL_VERSION_STR, "1.2") " ";
|
|
|
|
uint16_t major, minor;
|
|
if (hsa_agent_get_info(_bkendDevice, HSA_AGENT_INFO_VERSION_MAJOR, &major) !=
|
|
HSA_STATUS_SUCCESS ||
|
|
hsa_agent_get_info(_bkendDevice, HSA_AGENT_INFO_VERSION_MINOR, &minor) !=
|
|
HSA_STATUS_SUCCESS) {
|
|
return false;
|
|
}
|
|
std::stringstream ss;
|
|
ss << major << "." << minor << " (HSA," IF(IS_LIGHTNING, "LC", "HSAIL") ")";
|
|
|
|
strcpy(info_.driverVersion_, ss.str().c_str());
|
|
info_.version_ = "OpenCL " /*OPENCL_VERSION_STR*/"1.2" " ";
|
|
|
|
info_.builtInKernels_ = "";
|
|
info_.linkerAvailable_ = true;
|
|
info_.preferredInteropUserSync_ = true;
|
|
info_.printfBufferSize_ = PrintfDbg::WorkitemDebugSize * info().maxWorkGroupSize_;
|
|
info_.vendorId_ = 0x1002; // AMD's PCIe vendor id
|
|
|
|
info_.maxGlobalVariableSize_ = static_cast<size_t>(info_.maxMemAllocSize_);
|
|
info_.globalVariablePreferredTotalSize_ = static_cast<size_t>(info_.globalMemSize_);
|
|
|
|
// Populate the single config setting.
|
|
info_.singleFPConfig_ =
|
|
CL_FP_ROUND_TO_NEAREST | CL_FP_ROUND_TO_ZERO | CL_FP_ROUND_TO_INF | CL_FP_INF_NAN | CL_FP_FMA;
|
|
|
|
if (hsa_settings->doublePrecision_) {
|
|
info_.doubleFPConfig_ = info_.singleFPConfig_ | CL_FP_DENORM;
|
|
info_.singleFPConfig_ |= CL_FP_CORRECTLY_ROUNDED_DIVIDE_SQRT;
|
|
}
|
|
|
|
if (hsa_settings->singleFpDenorm_) {
|
|
info_.singleFPConfig_ |= CL_FP_DENORM;
|
|
}
|
|
|
|
info_.preferredPlatformAtomicAlignment_ = 0;
|
|
info_.preferredGlobalAtomicAlignment_ = 0;
|
|
info_.preferredLocalAtomicAlignment_ = 0;
|
|
|
|
uint8_t hsa_extensions[128];
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_agent_get_info(_bkendDevice, HSA_AGENT_INFO_EXTENSIONS, hsa_extensions)) {
|
|
return false;
|
|
}
|
|
|
|
assert(HSA_EXTENSION_IMAGES < 8);
|
|
const bool image_is_supported = ((hsa_extensions[0] & (1 << HSA_EXTENSION_IMAGES)) != 0);
|
|
if (image_is_supported) {
|
|
// Images
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_agent_get_info(_bkendDevice,
|
|
static_cast<hsa_agent_info_t>(HSA_EXT_AGENT_INFO_MAX_SAMPLER_HANDLERS),
|
|
&info_.maxSamplers_)) {
|
|
return false;
|
|
}
|
|
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_agent_get_info(_bkendDevice,
|
|
static_cast<hsa_agent_info_t>(HSA_EXT_AGENT_INFO_MAX_IMAGE_RD_HANDLES),
|
|
&info_.maxReadImageArgs_)) {
|
|
return false;
|
|
}
|
|
|
|
// TODO: no attribute for write image.
|
|
info_.maxWriteImageArgs_ = 8;
|
|
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_agent_get_info(_bkendDevice,
|
|
static_cast<hsa_agent_info_t>(HSA_EXT_AGENT_INFO_MAX_IMAGE_RORW_HANDLES),
|
|
&info_.maxReadWriteImageArgs_)) {
|
|
return false;
|
|
}
|
|
|
|
uint32_t image_max_dim[3];
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_agent_get_info(_bkendDevice,
|
|
static_cast<hsa_agent_info_t>(HSA_EXT_AGENT_INFO_IMAGE_2D_MAX_ELEMENTS),
|
|
&image_max_dim)) {
|
|
return false;
|
|
}
|
|
|
|
info_.image2DMaxWidth_ = image_max_dim[0];
|
|
info_.image2DMaxHeight_ = image_max_dim[1];
|
|
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_agent_get_info(_bkendDevice,
|
|
static_cast<hsa_agent_info_t>(HSA_EXT_AGENT_INFO_IMAGE_3D_MAX_ELEMENTS),
|
|
&image_max_dim)) {
|
|
return false;
|
|
}
|
|
|
|
info_.image3DMaxWidth_ = image_max_dim[0];
|
|
info_.image3DMaxHeight_ = image_max_dim[1];
|
|
info_.image3DMaxDepth_ = image_max_dim[2];
|
|
|
|
uint32_t max_array_size = 0;
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_agent_get_info(_bkendDevice,
|
|
static_cast<hsa_agent_info_t>(HSA_EXT_AGENT_INFO_IMAGE_ARRAY_MAX_LAYERS),
|
|
&max_array_size)) {
|
|
return false;
|
|
}
|
|
|
|
info_.imageMaxArraySize_ = max_array_size;
|
|
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_agent_get_info(_bkendDevice,
|
|
static_cast<hsa_agent_info_t>(HSA_EXT_AGENT_INFO_IMAGE_1DB_MAX_ELEMENTS),
|
|
&image_max_dim)) {
|
|
return false;
|
|
}
|
|
info_.imageMaxBufferSize_ = image_max_dim[0];
|
|
|
|
info_.imagePitchAlignment_ = 256;
|
|
|
|
info_.imageBaseAddressAlignment_ = 256;
|
|
|
|
info_.bufferFromImageSupport_ = CL_FALSE;
|
|
|
|
info_.imageSupport_ = (info_.maxReadWriteImageArgs_ > 0) ? CL_TRUE : CL_FALSE;
|
|
}
|
|
|
|
// Enable SVM Capabilities of Hsa device. Ensure
|
|
// user has not setup memory to be non-coherent
|
|
info_.svmCapabilities_ = 0;
|
|
if (hsa_settings->enableNCMode_ == false) {
|
|
info_.svmCapabilities_ = CL_DEVICE_SVM_COARSE_GRAIN_BUFFER;
|
|
info_.svmCapabilities_ |= CL_DEVICE_SVM_FINE_GRAIN_BUFFER;
|
|
// Report fine-grain system only on full profile
|
|
if (agent_profile_ == HSA_PROFILE_FULL) {
|
|
info_.svmCapabilities_ |= CL_DEVICE_SVM_FINE_GRAIN_SYSTEM;
|
|
}
|
|
#if !defined(WITH_LIGHTNING_COMPILER)
|
|
// Report atomics capability based on GFX IP, control on Hawaii
|
|
// and Vega10.
|
|
if (info_.hostUnifiedMemory_ ||
|
|
((deviceInfo_.gfxipVersion_ >= 800) && (deviceInfo_.gfxipVersion_ < 900))) {
|
|
info_.svmCapabilities_ |= CL_DEVICE_SVM_ATOMICS;
|
|
}
|
|
#endif // !defined(WITH_LIGHTNING_COMPILER)
|
|
}
|
|
|
|
if (HSA_STATUS_SUCCESS !=
|
|
hsa_agent_get_info(_bkendDevice, HSA_AGENT_INFO_WAVEFRONT_SIZE, &info_.wavefrontWidth_)) {
|
|
return false;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
device::VirtualDevice* Device::createVirtualDevice(amd::CommandQueue* queue) {
|
|
bool profiling = (queue != nullptr) && queue->properties().test(CL_QUEUE_PROFILING_ENABLE);
|
|
|
|
// Initialization of heap and other resources occur during the command
|
|
// queue creation time.
|
|
VirtualGPU* virtualDevice = new VirtualGPU(*this);
|
|
|
|
if (!virtualDevice->create(profiling)) {
|
|
delete virtualDevice;
|
|
return nullptr;
|
|
}
|
|
|
|
if (profiling) {
|
|
hsa_amd_profiling_set_profiler_enabled(virtualDevice->gpu_queue(), 1);
|
|
}
|
|
|
|
return virtualDevice;
|
|
}
|
|
|
|
bool Device::globalFreeMemory(size_t* freeMemory) const { return false; }
|
|
|
|
bool Device::bindExternalDevice(uint flags, void* const gfxDevice[], void* gfxContext,
|
|
bool validateOnly) {
|
|
#if defined(_WIN32)
|
|
return false;
|
|
#else
|
|
if ((flags & amd::Context::GLDeviceKhr) == 0) return false;
|
|
|
|
MesaInterop::MESA_INTEROP_KIND kind = MesaInterop::MESA_INTEROP_NONE;
|
|
MesaInterop::DisplayHandle display;
|
|
MesaInterop::ContextHandle context;
|
|
|
|
if ((flags & amd::Context::EGLDeviceKhr) != 0) {
|
|
kind = MesaInterop::MESA_INTEROP_EGL;
|
|
display.eglDisplay = reinterpret_cast<EGLDisplay>(gfxDevice[amd::Context::GLDeviceKhrIdx]);
|
|
context.eglContext = reinterpret_cast<EGLContext>(gfxContext);
|
|
} else {
|
|
kind = MesaInterop::MESA_INTEROP_GLX;
|
|
display.glxDisplay = reinterpret_cast<Display*>(gfxDevice[amd::Context::GLDeviceKhrIdx]);
|
|
context.glxContext = reinterpret_cast<GLXContext>(gfxContext);
|
|
}
|
|
|
|
mesa_glinterop_device_info info;
|
|
info.size = sizeof(mesa_glinterop_device_info);
|
|
MesaInterop temp;
|
|
if (!temp.Bind(kind, display, context)) {
|
|
assert(false && "Failed mesa interop bind.");
|
|
return false;
|
|
}
|
|
|
|
if (!temp.GetInfo(info)) {
|
|
assert(false && "Failed to get mesa interop device info.");
|
|
return false;
|
|
}
|
|
|
|
bool match = true;
|
|
match &= info_.deviceTopology_.pcie.bus == info.pci_bus;
|
|
match &= info_.deviceTopology_.pcie.device == info.pci_device;
|
|
match &= info_.deviceTopology_.pcie.function == info.pci_function;
|
|
match &= info_.vendorId_ == info.vendor_id;
|
|
match &= deviceInfo_.pciDeviceId_ == info.device_id;
|
|
|
|
if (!validateOnly) mesa_ = temp;
|
|
|
|
return match;
|
|
#endif
|
|
}
|
|
|
|
bool Device::unbindExternalDevice(uint flags, void* const gfxDevice[], void* gfxContext,
|
|
bool validateOnly) {
|
|
#if defined(_WIN32)
|
|
return false;
|
|
#else
|
|
if ((flags & amd::Context::GLDeviceKhr) == 0) return false;
|
|
if (!validateOnly) mesa_.Unbind();
|
|
return true;
|
|
#endif
|
|
}
|
|
|
|
amd::Memory* Device::findMapTarget(size_t size) const {
|
|
// Must be serialised for access
|
|
amd::ScopedLock lk(*mapCacheOps_);
|
|
|
|
amd::Memory* map = nullptr;
|
|
size_t minSize = 0;
|
|
size_t maxSize = 0;
|
|
uint mapId = mapCache_->size();
|
|
uint releaseId = mapCache_->size();
|
|
|
|
// Find if the list has a map target of appropriate size
|
|
for (uint i = 0; i < mapCache_->size(); i++) {
|
|
if ((*mapCache_)[i] != nullptr) {
|
|
// Requested size is smaller than the entry size
|
|
if (size < (*mapCache_)[i]->getSize()) {
|
|
if ((minSize == 0) || (minSize > (*mapCache_)[i]->getSize())) {
|
|
minSize = (*mapCache_)[i]->getSize();
|
|
mapId = i;
|
|
}
|
|
}
|
|
// Requeted size matches the entry size
|
|
else if (size == (*mapCache_)[i]->getSize()) {
|
|
mapId = i;
|
|
break;
|
|
} else {
|
|
// Find the biggest map target in the list
|
|
if (maxSize < (*mapCache_)[i]->getSize()) {
|
|
maxSize = (*mapCache_)[i]->getSize();
|
|
releaseId = i;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
// Check if we found any map target
|
|
if (mapId < mapCache_->size()) {
|
|
map = (*mapCache_)[mapId];
|
|
(*mapCache_)[mapId] = nullptr;
|
|
}
|
|
// If cache is full, then release the biggest map target
|
|
else if (releaseId < mapCache_->size()) {
|
|
(*mapCache_)[releaseId]->release();
|
|
(*mapCache_)[releaseId] = nullptr;
|
|
}
|
|
|
|
return map;
|
|
}
|
|
|
|
bool Device::addMapTarget(amd::Memory* memory) const {
|
|
// Must be serialised for access
|
|
amd::ScopedLock lk(*mapCacheOps_);
|
|
|
|
// the svm memory shouldn't be cached
|
|
if (!memory->canBeCached()) {
|
|
return false;
|
|
}
|
|
// Find if the list has a map target of appropriate size
|
|
for (uint i = 0; i < mapCache_->size(); ++i) {
|
|
if ((*mapCache_)[i] == nullptr) {
|
|
(*mapCache_)[i] = memory;
|
|
return true;
|
|
}
|
|
}
|
|
|
|
// Add a new entry
|
|
mapCache_->push_back(memory);
|
|
|
|
return true;
|
|
}
|
|
|
|
Memory* Device::getRocMemory(amd::Memory* mem) const {
|
|
return static_cast<roc::Memory*>(mem->getDeviceMemory(*this));
|
|
}
|
|
|
|
|
|
device::Memory* Device::createMemory(amd::Memory& owner) const {
|
|
roc::Memory* memory = nullptr;
|
|
if (owner.asBuffer()) {
|
|
memory = new roc::Buffer(*this, owner);
|
|
} else if (owner.asImage()) {
|
|
memory = new roc::Image(*this, owner);
|
|
} else {
|
|
LogError("Unknown memory type");
|
|
}
|
|
|
|
if (memory == nullptr) {
|
|
return nullptr;
|
|
}
|
|
|
|
bool result = memory->create();
|
|
|
|
if (!result) {
|
|
LogError("Failed creating memory");
|
|
delete memory;
|
|
return nullptr;
|
|
}
|
|
|
|
// Transfer data only if OCL context has one device.
|
|
// Cache coherency layer will update data for multiple devices
|
|
if (!memory->isHostMemDirectAccess() && owner.asImage() && (owner.parent() == nullptr) &&
|
|
(owner.getMemFlags() & CL_MEM_COPY_HOST_PTR) && (owner.getContext().devices().size() == 1)) {
|
|
// To avoid recurssive call to Device::createMemory, we perform
|
|
// data transfer to the view of the image.
|
|
amd::Image* imageView = owner.asImage()->createView(
|
|
owner.getContext(), owner.asImage()->getImageFormat(), xferQueue());
|
|
|
|
if (imageView == nullptr) {
|
|
LogError("[OCL] Fail to allocate view of image object");
|
|
return nullptr;
|
|
}
|
|
|
|
Image* devImageView = new roc::Image(static_cast<const Device&>(*this), *imageView);
|
|
if (devImageView == nullptr) {
|
|
LogError("[OCL] Fail to allocate device mem object for the view");
|
|
imageView->release();
|
|
return nullptr;
|
|
}
|
|
|
|
if (devImageView != nullptr && !devImageView->createView(static_cast<roc::Image&>(*memory))) {
|
|
LogError("[OCL] Fail to create device mem object for the view");
|
|
delete devImageView;
|
|
imageView->release();
|
|
return nullptr;
|
|
}
|
|
|
|
imageView->replaceDeviceMemory(this, devImageView);
|
|
|
|
result = xferMgr().writeImage(owner.getHostMem(), *devImageView, amd::Coord3D(0, 0, 0),
|
|
imageView->getRegion(), 0, 0, true);
|
|
|
|
// Release host memory, since runtime copied data
|
|
owner.setHostMem(nullptr);
|
|
|
|
imageView->release();
|
|
}
|
|
|
|
// Prepin sysmem buffer for possible data synchronization between CPU and GPU
|
|
if (!memory->isHostMemDirectAccess() && (owner.getHostMem() != nullptr)) {
|
|
memory->pinSystemMemory(owner.getHostMem(), owner.getSize());
|
|
}
|
|
|
|
if (!result) {
|
|
delete memory;
|
|
return nullptr;
|
|
}
|
|
|
|
return memory;
|
|
}
|
|
|
|
void* Device::hostAlloc(size_t size, size_t alignment, bool atomics) const {
|
|
void* ptr = nullptr;
|
|
const hsa_amd_memory_pool_t segment = (!atomics)
|
|
? (system_coarse_segment_.handle != 0) ? system_coarse_segment_ : system_segment_
|
|
: system_segment_;
|
|
assert(segment.handle != 0);
|
|
hsa_status_t stat = hsa_amd_memory_pool_allocate(segment, size, 0, &ptr);
|
|
if (stat != HSA_STATUS_SUCCESS) {
|
|
LogError("Fail allocation host memory");
|
|
return nullptr;
|
|
}
|
|
|
|
stat = hsa_amd_agents_allow_access(gpu_agents_.size(), &gpu_agents_[0], nullptr, ptr);
|
|
if (stat != HSA_STATUS_SUCCESS) {
|
|
LogError("Fail hsa_amd_agents_allow_access");
|
|
return nullptr;
|
|
}
|
|
|
|
return ptr;
|
|
}
|
|
|
|
void Device::hostFree(void* ptr, size_t size) const { memFree(ptr, size); }
|
|
|
|
void* Device::deviceLocalAlloc(size_t size) const {
|
|
if (gpuvm_segment_.handle == 0 || gpuvm_segment_max_alloc_ == 0) {
|
|
return nullptr;
|
|
}
|
|
|
|
void* ptr = nullptr;
|
|
hsa_status_t stat = hsa_amd_memory_pool_allocate(gpuvm_segment_, size, 0, &ptr);
|
|
if (stat != HSA_STATUS_SUCCESS) {
|
|
LogError("Fail allocation local memory");
|
|
return nullptr;
|
|
}
|
|
|
|
stat = hsa_memory_assign_agent(ptr, _bkendDevice, HSA_ACCESS_PERMISSION_RW);
|
|
if (stat != HSA_STATUS_SUCCESS) {
|
|
LogError("Fail assigning local memory to agent");
|
|
memFree(ptr, size);
|
|
return nullptr;
|
|
}
|
|
|
|
return ptr;
|
|
}
|
|
|
|
void Device::memFree(void* ptr, size_t size) const {
|
|
hsa_status_t stat = hsa_amd_memory_pool_free(ptr);
|
|
if (stat != HSA_STATUS_SUCCESS) {
|
|
LogError("Fail freeing local memory");
|
|
}
|
|
}
|
|
|
|
void* Device::svmAlloc(amd::Context& context, size_t size, size_t alignment, cl_svm_mem_flags flags,
|
|
void* svmPtr) const {
|
|
amd::Memory* mem = nullptr;
|
|
if (nullptr == svmPtr) {
|
|
bool atomics = (flags & CL_MEM_SVM_ATOMICS) != 0;
|
|
void* ptr = hostAlloc(size, alignment, atomics);
|
|
|
|
if (ptr != nullptr) {
|
|
// Copy paste from ORCA code.
|
|
// create a hidden buffer, which will allocated on the device later
|
|
mem = new (context) amd::Buffer(context, CL_MEM_USE_HOST_PTR, size, ptr);
|
|
if (mem == nullptr) {
|
|
LogError("failed to create a svm mem object!");
|
|
return nullptr;
|
|
}
|
|
|
|
if (!mem->create(ptr)) {
|
|
LogError("failed to create a svm hidden buffer!");
|
|
mem->release();
|
|
return nullptr;
|
|
}
|
|
|
|
// add the information to context so that we can use it later.
|
|
amd::SvmManager::AddSvmBuffer(ptr, mem);
|
|
|
|
return ptr;
|
|
} else {
|
|
return nullptr;
|
|
}
|
|
} else {
|
|
// Copy paste from ORCA code.
|
|
// Find the existing amd::mem object
|
|
mem = amd::SvmManager::FindSvmBuffer(svmPtr);
|
|
|
|
if (nullptr == mem) {
|
|
return nullptr;
|
|
}
|
|
|
|
return svmPtr;
|
|
}
|
|
}
|
|
|
|
void Device::svmFree(void* ptr) const {
|
|
amd::Memory* svmMem = nullptr;
|
|
svmMem = amd::SvmManager::FindSvmBuffer(ptr);
|
|
if (nullptr != svmMem) {
|
|
svmMem->release();
|
|
amd::SvmManager::RemoveSvmBuffer(ptr);
|
|
hostFree(ptr);
|
|
}
|
|
}
|
|
|
|
VirtualGPU* Device::xferQueue() const {
|
|
if (!xferQueue_) {
|
|
// Create virtual device for internal memory transfer
|
|
Device* thisDevice = const_cast<Device*>(this);
|
|
thisDevice->xferQueue_ = reinterpret_cast<VirtualGPU*>(thisDevice->createVirtualDevice());
|
|
if (!xferQueue_) {
|
|
LogError("Couldn't create the device transfer manager!");
|
|
}
|
|
}
|
|
xferQueue_->enableSyncBlit();
|
|
return xferQueue_;
|
|
}
|
|
}
|
|
#endif // WITHOUT_HSA_BACKEND
|