Sean Keely 0ed7eac560 Correct size of SVM node array. ...

Was size of the map.  Needs to be size of the node id range.

Change-Id: I92501ea7adca5c30dbb0fdabd2c421dea58f8d6f


[ROCm/ROCR-Runtime commit: c9eb85e205]

2021-11-10 21:23:42 -06:00

..

amd_aql_queue.cpp

Skip inital CU mask setup unless HSA_CU_MASK is defined for the GPU.

2021-10-12 20:31:56 -05:00

amd_blit_kernel.cpp

Place GPU local resources in nearest NUMA node.

2021-09-14 17:49:24 -04:00

amd_blit_sdma.cpp

Include event_id in SDMA interrupt payload.

2021-11-10 20:57:11 -06:00

amd_cpu_agent.cpp

Correct merge error.

2021-05-06 18:40:56 -05:00

amd_filter_device.cpp

Add rocr namespace to core header and impl files

2020-06-19 22:34:21 -04:00

amd_gpu_agent.cpp

Workaround gfx90a SDMA0 quirk.

2021-09-30 05:53:49 -04:00

amd_hsa_loader.cpp

Code object reader improvements

2020-06-25 12:18:50 -04:00

amd_loader_context.cpp

Implement Target ID Proposal

2020-11-10 13:42:35 -05:00

amd_memory_region.cpp

Allocate any size vram request through the fragment allocator.

2021-06-10 19:30:54 -05:00

amd_topology.cpp

Remove io_link workarounds.

2021-10-11 19:15:07 -05:00

cache.cpp

Add rocr namespace to core header and impl files

2020-06-19 22:34:21 -04:00

default_signal.cpp

Limit reporting of GPU_ONLY signal waits from host.

2021-06-03 15:26:40 -05:00

host_queue.cpp

Update ROCr implementation of Queue ID

2020-06-26 13:25:00 -05:00

hsa_api_trace.cpp

Add HSA_CU_MASK

2021-07-29 02:23:34 -05:00

hsa_ext_amd.cpp

Allow passing zero bits into hsa_amd_queue_cu_set_mask.

2021-08-27 20:05:24 -04:00

hsa_ext_interface.cpp

Add rocr namespace to core header and impl files

2020-06-19 22:34:21 -04:00

hsa_ven_amd_loader.cpp

Expose iterator for executables

2021-04-16 20:51:48 -04:00

hsa.cpp

Correct hsa_status_string strings.

2021-07-30 16:30:31 -04:00

intercept_queue.cpp

Initialize intercept queue packets properly.

2020-10-08 15:33:43 -05:00

interrupt_signal.cpp

Add rocr namespace to core header and impl files

2020-06-19 22:34:21 -04:00

ipc_signal.cpp

Add rocr namespace to core header and impl files

2020-06-19 22:34:21 -04:00

isa.cpp

Add gfx1013 support

2021-09-15 01:10:20 -04:00

queue.cpp

Register the default queue error handler for all internal queues.

2021-08-27 20:11:58 -04:00

runtime.cpp

Correct size of SVM node array.

2021-11-10 21:23:42 -06:00

signal.cpp

Add rocr namespace to core header and impl files

2020-06-19 22:34:21 -04:00