Oak Zeng
80206af91e
Change-Id: I7122caea3ef2254b50bde25ec545116685452116 Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
323 lines
14 KiB
C++
Executable File
323 lines
14 KiB
C++
Executable File
////////////////////////////////////////////////////////////////////////////////
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//
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// The University of Illinois/NCSA
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// Open Source License (NCSA)
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//
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// Copyright (c) 2014-2020, Advanced Micro Devices, Inc. All rights reserved.
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//
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// Developed by:
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//
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// AMD Research and AMD HSA Software Development
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//
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// Advanced Micro Devices, Inc.
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//
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// www.amd.com
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to
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// deal with the Software without restriction, including without limitation
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// the rights to use, copy, modify, merge, publish, distribute, sublicense,
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// and/or sell copies of the Software, and to permit persons to whom the
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// Software is furnished to do so, subject to the following conditions:
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//
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// - Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimers.
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// - Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimers in
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// the documentation and/or other materials provided with the distribution.
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// - Neither the names of Advanced Micro Devices, Inc,
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// nor the names of its contributors may be used to endorse or promote
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// products derived from this Software without specific prior written
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// permission.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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// THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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// OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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// DEALINGS WITH THE SOFTWARE.
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//
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////////////////////////////////////////////////////////////////////////////////
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#include "core/inc/isa.h"
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#include <algorithm>
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#include <cstring>
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#include <iostream>
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#include <sstream>
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#include <utility>
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namespace rocr {
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namespace core {
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bool Wavefront::GetInfo(
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const hsa_wavefront_info_t &attribute,
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void *value) const {
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if (!value) {
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return false;
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}
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switch (attribute) {
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case HSA_WAVEFRONT_INFO_SIZE: {
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*((uint32_t*)value) = 64;
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return true;
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}
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default: {
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return false;
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}
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}
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}
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/* static */
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bool Isa::IsCompatible(const Isa &code_object_isa,
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const Isa &agent_isa) {
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if (code_object_isa.GetVersion() != agent_isa.GetVersion())
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return false;
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assert(code_object_isa.IsSrameccSupported() == agent_isa.IsSrameccSupported() && agent_isa.GetSramecc() != IsaFeature::Any);
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if ((code_object_isa.GetSramecc() == IsaFeature::Enabled ||
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code_object_isa.GetSramecc() == IsaFeature::Disabled) &&
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code_object_isa.GetSramecc() != agent_isa.GetSramecc())
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return false;
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assert(code_object_isa.IsXnackSupported() == agent_isa.IsXnackSupported() && agent_isa.GetXnack() != IsaFeature::Any);
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if ((code_object_isa.GetXnack() == IsaFeature::Enabled ||
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code_object_isa.GetXnack() == IsaFeature::Disabled) &&
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code_object_isa.GetXnack() != agent_isa.GetXnack())
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return false;
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return true;
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}
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std::string Isa::GetProcessorName() const {
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std::string processor(targetid_);
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return processor.substr(0, processor.find(':'));
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}
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std::string Isa::GetIsaName() const {
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constexpr char hsa_isa_name_prefix[] = "amdgcn-amd-amdhsa--";
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return std::string(hsa_isa_name_prefix) + targetid_;
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}
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bool Isa::GetInfo(const hsa_isa_info_t &attribute, void *value) const {
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if (!value) {
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return false;
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}
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switch (attribute) {
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case HSA_ISA_INFO_NAME_LENGTH: {
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std::string isa_name = GetIsaName();
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*((uint32_t*)value) = static_cast<uint32_t>(isa_name.size() + 1);
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return true;
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}
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case HSA_ISA_INFO_NAME: {
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std::string isa_name = GetIsaName();
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memset(value, 0x0, isa_name.size() + 1);
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memcpy(value, isa_name.c_str(), isa_name.size());
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return true;
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}
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// deprecated.
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case HSA_ISA_INFO_CALL_CONVENTION_COUNT: {
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*((uint32_t*)value) = 1;
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return true;
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}
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// deprecated.
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case HSA_ISA_INFO_CALL_CONVENTION_INFO_WAVEFRONT_SIZE: {
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*((uint32_t*)value) = 64;
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return true;
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}
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// deprecated.
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case HSA_ISA_INFO_CALL_CONVENTION_INFO_WAVEFRONTS_PER_COMPUTE_UNIT: {
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*((uint32_t*)value) = 40;
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return true;
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}
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case HSA_ISA_INFO_MACHINE_MODELS: {
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const bool machine_models[2] = {false, true};
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memcpy(value, machine_models, sizeof(machine_models));
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return true;
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}
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case HSA_ISA_INFO_PROFILES: {
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bool profiles[2] = {true, false};
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if (this->GetVersion() == Version(7, 0, 0) ||
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this->GetVersion() == Version(8, 0, 1)) {
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profiles[1] = true;
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}
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memcpy(value, profiles, sizeof(profiles));
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return true;
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}
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case HSA_ISA_INFO_DEFAULT_FLOAT_ROUNDING_MODES: {
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const bool rounding_modes[3] = {false, false, true};
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memcpy(value, rounding_modes, sizeof(rounding_modes));
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return true;
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}
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case HSA_ISA_INFO_BASE_PROFILE_DEFAULT_FLOAT_ROUNDING_MODES: {
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const bool rounding_modes[3] = {false, false, true};
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memcpy(value, rounding_modes, sizeof(rounding_modes));
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return true;
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}
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case HSA_ISA_INFO_FAST_F16_OPERATION: {
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if (this->GetMajorVersion() >= 8) {
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*((bool*)value) = true;
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} else {
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*((bool*)value) = false;
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}
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return true;
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}
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case HSA_ISA_INFO_WORKGROUP_MAX_DIM: {
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const uint16_t workgroup_max_dim[3] = {1024, 1024, 1024};
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memcpy(value, workgroup_max_dim, sizeof(workgroup_max_dim));
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return true;
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}
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case HSA_ISA_INFO_WORKGROUP_MAX_SIZE: {
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*((uint32_t*)value) = 1024;
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return true;
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}
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case HSA_ISA_INFO_GRID_MAX_DIM: {
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const hsa_dim3_t grid_max_dim = {UINT32_MAX, UINT32_MAX, UINT32_MAX};
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memcpy(value, &grid_max_dim, sizeof(grid_max_dim));
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return true;
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}
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case HSA_ISA_INFO_GRID_MAX_SIZE: {
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*((uint64_t*)value) = UINT64_MAX;
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return true;
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}
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case HSA_ISA_INFO_FBARRIER_MAX_SIZE: {
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*((uint32_t*)value) = 32;
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return true;
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}
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default: {
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return false;
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}
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}
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}
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hsa_round_method_t Isa::GetRoundMethod(
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hsa_fp_type_t fp_type,
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hsa_flush_mode_t flush_mode) const {
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return HSA_ROUND_METHOD_SINGLE;
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}
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const Isa *IsaRegistry::GetIsa(const std::string &full_name) {
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auto isareg_iter = supported_isas_.find(full_name);
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return isareg_iter == supported_isas_.end() ? nullptr : &isareg_iter->second;
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}
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const Isa *IsaRegistry::GetIsa(const Isa::Version &version, IsaFeature sramecc, IsaFeature xnack) {
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auto isareg_iter = std::find_if(supported_isas_.begin(), supported_isas_.end(),
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[&](const IsaMap::value_type& isareg) {
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return isareg.second.GetVersion() == version &&
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(isareg.second.GetSramecc() == IsaFeature::Unsupported ||
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isareg.second.GetSramecc() == sramecc) &&
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(isareg.second.GetXnack() == IsaFeature::Unsupported ||
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isareg.second.GetXnack() == xnack);
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});
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return isareg_iter == supported_isas_.end() ? nullptr : &isareg_iter->second;
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}
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const IsaRegistry::IsaMap IsaRegistry::supported_isas_ =
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IsaRegistry::GetSupportedIsas();
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const IsaRegistry::IsaMap IsaRegistry::GetSupportedIsas() {
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// agent, and vendor name length limit excluding terminating nul character.
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constexpr size_t hsa_name_size = 63;
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// FIXME: Use static_assert when C++17 used.
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#define ISAREG_ENTRY_GEN(name, maj, min, stp, sramecc, xnack) \
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assert(std::char_traits<char>::length(name) <= hsa_name_size); \
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Isa amd_amdgpu_##maj##min##stp##_SRAMECC_##sramecc##_XNACK_##xnack; \
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amd_amdgpu_##maj##min##stp##_SRAMECC_##sramecc##_XNACK_##xnack.targetid_ = name; \
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amd_amdgpu_##maj##min##stp##_SRAMECC_##sramecc##_XNACK_##xnack.version_ = Isa::Version(maj, min, stp); \
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amd_amdgpu_##maj##min##stp##_SRAMECC_##sramecc##_XNACK_##xnack.sramecc_ = sramecc; \
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amd_amdgpu_##maj##min##stp##_SRAMECC_##sramecc##_XNACK_##xnack.xnack_ = xnack; \
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supported_isas.insert(std::make_pair( \
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amd_amdgpu_##maj##min##stp##_SRAMECC_##sramecc##_XNACK_##xnack.GetIsaName(), \
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amd_amdgpu_##maj##min##stp##_SRAMECC_##sramecc##_XNACK_##xnack)); \
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IsaMap supported_isas;
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IsaFeature unsupported = IsaFeature::Unsupported;
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IsaFeature any = IsaFeature::Any;
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IsaFeature disabled = IsaFeature::Disabled;
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IsaFeature enabled = IsaFeature::Enabled;
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// Target ID Version SRAMECC XNACK
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ISAREG_ENTRY_GEN("gfx700", 7, 0, 0, unsupported, unsupported)
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ISAREG_ENTRY_GEN("gfx701", 7, 0, 1, unsupported, unsupported)
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ISAREG_ENTRY_GEN("gfx702", 7, 0, 2, unsupported, unsupported)
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ISAREG_ENTRY_GEN("gfx801", 8, 0, 1, unsupported, any)
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ISAREG_ENTRY_GEN("gfx801:xnack-", 8, 0, 1, unsupported, disabled)
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ISAREG_ENTRY_GEN("gfx801:xnack+", 8, 0, 1, unsupported, enabled)
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ISAREG_ENTRY_GEN("gfx802", 8, 0, 2, unsupported, unsupported)
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ISAREG_ENTRY_GEN("gfx803", 8, 0, 3, unsupported, unsupported)
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ISAREG_ENTRY_GEN("gfx805", 8, 0, 5, unsupported, unsupported)
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ISAREG_ENTRY_GEN("gfx810", 8, 1, 0, unsupported, any)
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ISAREG_ENTRY_GEN("gfx810:xnack-", 8, 1, 0, unsupported, disabled)
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ISAREG_ENTRY_GEN("gfx810:xnack+", 8, 1, 0, unsupported, enabled)
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ISAREG_ENTRY_GEN("gfx900", 9, 0, 0, unsupported, any)
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ISAREG_ENTRY_GEN("gfx900:xnack-", 9, 0, 0, unsupported, disabled)
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ISAREG_ENTRY_GEN("gfx900:xnack+", 9, 0, 0, unsupported, enabled)
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ISAREG_ENTRY_GEN("gfx902", 9, 0, 2, unsupported, any)
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ISAREG_ENTRY_GEN("gfx902:xnack-", 9, 0, 2, unsupported, disabled)
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ISAREG_ENTRY_GEN("gfx902:xnack+", 9, 0, 2, unsupported, enabled)
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ISAREG_ENTRY_GEN("gfx904", 9, 0, 4, unsupported, any)
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ISAREG_ENTRY_GEN("gfx904:xnack-", 9, 0, 4, unsupported, disabled)
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ISAREG_ENTRY_GEN("gfx904:xnack+", 9, 0, 4, unsupported, enabled)
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ISAREG_ENTRY_GEN("gfx906", 9, 0, 6, any, any)
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ISAREG_ENTRY_GEN("gfx906:xnack-", 9, 0, 6, any, disabled)
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ISAREG_ENTRY_GEN("gfx906:xnack+", 9, 0, 6, any, enabled)
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ISAREG_ENTRY_GEN("gfx906:sramecc-", 9, 0, 6, disabled, any)
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ISAREG_ENTRY_GEN("gfx906:sramecc+", 9, 0, 6, enabled, any)
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ISAREG_ENTRY_GEN("gfx906:sramecc-:xnack-", 9, 0, 6, disabled, disabled)
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ISAREG_ENTRY_GEN("gfx906:sramecc-:xnack+", 9, 0, 6, disabled, enabled)
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ISAREG_ENTRY_GEN("gfx906:sramecc+:xnack-", 9, 0, 6, enabled, disabled)
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ISAREG_ENTRY_GEN("gfx906:sramecc+:xnack+", 9, 0, 6, enabled, enabled)
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ISAREG_ENTRY_GEN("gfx908", 9, 0, 8, any, any)
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ISAREG_ENTRY_GEN("gfx908:xnack-", 9, 0, 8, any, disabled)
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ISAREG_ENTRY_GEN("gfx908:xnack+", 9, 0, 8, any, enabled)
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ISAREG_ENTRY_GEN("gfx908:sramecc-", 9, 0, 8, disabled, any)
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ISAREG_ENTRY_GEN("gfx908:sramecc+", 9, 0, 8, enabled, any)
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ISAREG_ENTRY_GEN("gfx908:sramecc-:xnack-", 9, 0, 8, disabled, disabled)
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ISAREG_ENTRY_GEN("gfx908:sramecc-:xnack+", 9, 0, 8, disabled, enabled)
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ISAREG_ENTRY_GEN("gfx908:sramecc+:xnack-", 9, 0, 8, enabled, disabled)
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ISAREG_ENTRY_GEN("gfx908:sramecc+:xnack+", 9, 0, 8, enabled, enabled)
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ISAREG_ENTRY_GEN("gfx909", 9, 0, 9, unsupported, any)
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ISAREG_ENTRY_GEN("gfx909:xnack-", 9, 0, 9, unsupported, disabled)
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ISAREG_ENTRY_GEN("gfx909:xnack+", 9, 0, 9, unsupported, enabled)
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ISAREG_ENTRY_GEN("gfx90a", 9, 0, 10, any, any)
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ISAREG_ENTRY_GEN("gfx90a:xnack-", 9, 0, 10, any, disabled)
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ISAREG_ENTRY_GEN("gfx90a:xnack+", 9, 0, 10, any, enabled)
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ISAREG_ENTRY_GEN("gfx90a:sramecc-", 9, 0, 10, disabled, any)
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ISAREG_ENTRY_GEN("gfx90a:sramecc+", 9, 0, 10, enabled, any)
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ISAREG_ENTRY_GEN("gfx90a:sramecc-:xnack-", 9, 0, 10, disabled, disabled)
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ISAREG_ENTRY_GEN("gfx90a:sramecc-:xnack+", 9, 0, 10, disabled, enabled)
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ISAREG_ENTRY_GEN("gfx90a:sramecc+:xnack-", 9, 0, 10, enabled, disabled)
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ISAREG_ENTRY_GEN("gfx90a:sramecc+:xnack+", 9, 0, 10, enabled, enabled)
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ISAREG_ENTRY_GEN("gfx90c", 9, 0, 12, unsupported, any)
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ISAREG_ENTRY_GEN("gfx90c:xnack-", 9, 0, 12, unsupported, disabled)
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ISAREG_ENTRY_GEN("gfx90c:xnack+", 9, 0, 12, unsupported, enabled)
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ISAREG_ENTRY_GEN("gfx1010", 10, 1, 0, unsupported, any)
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ISAREG_ENTRY_GEN("gfx1010:xnack-", 10, 1, 0, unsupported, disabled)
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ISAREG_ENTRY_GEN("gfx1010:xnack+", 10, 1, 0, unsupported, enabled)
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ISAREG_ENTRY_GEN("gfx1011", 10, 1, 1, unsupported, any)
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ISAREG_ENTRY_GEN("gfx1011:xnack-", 10, 1, 1, unsupported, disabled)
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ISAREG_ENTRY_GEN("gfx1011:xnack+", 10, 1, 1, unsupported, enabled)
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ISAREG_ENTRY_GEN("gfx1012", 10, 1, 2, unsupported, any)
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ISAREG_ENTRY_GEN("gfx1012:xnack-", 10, 1, 2, unsupported, disabled)
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ISAREG_ENTRY_GEN("gfx1012:xnack+", 10, 1, 2, unsupported, enabled)
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ISAREG_ENTRY_GEN("gfx1013", 10, 1, 3, unsupported, any)
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ISAREG_ENTRY_GEN("gfx1013:xnack-", 10, 1, 3, unsupported, disabled)
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ISAREG_ENTRY_GEN("gfx1013:xnack+", 10, 1, 3, unsupported, enabled)
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ISAREG_ENTRY_GEN("gfx1030", 10, 3, 0, unsupported, unsupported)
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ISAREG_ENTRY_GEN("gfx1031", 10, 3, 1, unsupported, unsupported)
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ISAREG_ENTRY_GEN("gfx1032", 10, 3, 2, unsupported, unsupported)
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ISAREG_ENTRY_GEN("gfx1033", 10, 3, 3, unsupported, unsupported)
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ISAREG_ENTRY_GEN("gfx1034", 10, 3, 4, unsupported, unsupported)
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ISAREG_ENTRY_GEN("gfx1035", 10, 3, 5, unsupported, unsupported)
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#undef ISAREG_ENTRY_GEN
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return supported_isas;
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}
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} // namespace core
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} // namespace rocr
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