Evgeny
399 satır
15 KiB
C++
399 satır
15 KiB
C++
#include <string>
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#include "aql_profile.h"
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#include "pm4_factory.h"
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#include "cmdwriter.h" // commandwriter
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#include "hsa_perf.h" // perfcounter
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#include "thread_trace.h" // threadtrace
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#include "gpu_enum.h"
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#include "gpu_blockinfo.h"
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#define PUBLIC_API __attribute__((visibility("default")))
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namespace aql_profile {
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// Command buffer partitioning manager
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// Supports Pre/Post commands partitioning
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// and postfix control partition
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class CommandBufferMgr {
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const static uint32_t align_size = 0x100;
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const static uint32_t align_mask = align_size - 1;
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struct info_t {
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uint32_t precmds_size;
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uint32_t postcmds_size;
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};
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descriptor_t buffer;
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uint32_t postfix_size;
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info_t* info;
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uint32_t align(const uint32_t& size) { return (size + align_mask) & ~align_mask; }
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public:
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CommandBufferMgr(const profile_t* profile)
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: buffer(profile->command_buffer), postfix_size(0), info(NULL) {
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info = (info_t*)setPostfix(sizeof(info_t));
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}
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uint32_t getSize() { return buffer.size; }
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void* setPostfix(const uint32_t& size) {
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if (size > postfix_size) {
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const uint32_t delta = size - postfix_size;
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postfix_size = size;
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buffer.size -= (delta < buffer.size) ? delta : buffer.size;
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}
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return (buffer.size != 0) ? buffer.ptr + buffer.size : NULL;
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}
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bool setPreSize(const uint32_t& size) {
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bool suc = (size <= buffer.size);
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if (suc) info->precmds_size = size;
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return suc;
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}
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uint32_t getPostOffset() { return align(info->precmds_size); }
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bool checkTotalSize(const uint32_t& size) {
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bool suc = (size <= buffer.size);
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if (suc) suc = (size >= info->precmds_size);
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if (suc) {
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info->postcmds_size = size - info->precmds_size;
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suc = ((getPostOffset() + info->postcmds_size) <= buffer.size);
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}
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return suc;
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}
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descriptor_t getPreDescr() {
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descriptor_t descr;
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descr.ptr = buffer.ptr;
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descr.size = info->precmds_size;
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return descr;
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}
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descriptor_t getPostDescr() {
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descriptor_t descr;
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descr.ptr = buffer.ptr + getPostOffset();
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descr.size = info->postcmds_size;
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return descr;
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}
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};
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static inline bool is_event_match(const event_t& event1, const event_t& event2) {
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return (event1.block_name == event2.block_name) && (event1.block_index == event2.block_index) &&
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(event1.counter_id == event2.counter_id);
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}
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hsa_status_t default_pmcdata_callback(hsa_ext_amd_aql_profile_info_type_t info_type,
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hsa_ext_amd_aql_profile_info_data_t* info_data,
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void* callback_data) {
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hsa_status_t status = HSA_STATUS_SUCCESS;
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hsa_ext_amd_aql_profile_info_data_t* passed_data =
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reinterpret_cast<hsa_ext_amd_aql_profile_info_data_t*>(callback_data);
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if (info_type == HSA_EXT_AQL_PROFILE_INFO_PMC_DATA) {
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if (is_event_match(info_data->pmc_data.event, passed_data->pmc_data.event)) {
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if (passed_data->sample_id == UINT32_MAX) {
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passed_data->pmc_data.result += info_data->pmc_data.result;
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} else if (passed_data->sample_id == info_data->sample_id) {
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passed_data->pmc_data.result = info_data->pmc_data.result;
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status = HSA_STATUS_INFO_BREAK;
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}
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}
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}
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return status;
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}
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struct sqtt_ctrl_t {
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uint32_t status;
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uint32_t counter;
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uint32_t writePtr;
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};
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hsa_status_t default_sqttdata_callback(hsa_ext_amd_aql_profile_info_type_t info_type,
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hsa_ext_amd_aql_profile_info_data_t* info_data,
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void* callback_data) {
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hsa_status_t status = HSA_STATUS_SUCCESS;
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hsa_ext_amd_aql_profile_info_data_t* passed_data =
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reinterpret_cast<hsa_ext_amd_aql_profile_info_data_t*>(callback_data);
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if (info_type == HSA_EXT_AQL_PROFILE_INFO_SQTT_DATA) {
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if (info_data->sample_id == passed_data->sample_id) {
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passed_data->sqtt_data = info_data->sqtt_data;
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status = HSA_STATUS_INFO_BREAK;
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}
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}
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return status;
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}
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} // aql_profile
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extern "C" {
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// Check if event is valid for the specific GPU
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PUBLIC_API hsa_status_t hsa_ext_amd_aql_profile_validate_event(
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hsa_agent_t agent, const hsa_ext_amd_aql_profile_event_t* event, bool* result) {
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return HSA_STATUS_SUCCESS;
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}
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// Method to populate the provided AQL packet with profiling start commands
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PUBLIC_API hsa_status_t hsa_ext_amd_aql_profile_start(
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const hsa_ext_amd_aql_profile_profile_t* profile, aql_profile::packet_t* aql_start_packet) {
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aql_profile::Pm4Factory * pm4_factory = aql_profile::Pm4Factory::Create(profile);
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if (pm4_factory == NULL) return HSA_STATUS_ERROR;
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pm4_profile::CommandWriter* cmdWriter = pm4_factory->getCommandWriter();
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if (cmdWriter == NULL) return HSA_STATUS_ERROR;
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pm4_profile::DefaultCmdBuf commands;
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aql_profile::CommandBufferMgr cmdBufMgr(profile);
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if (cmdBufMgr.getSize() == 0) return HSA_STATUS_ERROR;
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if (profile->type == HSA_EXT_AQL_PROFILE_EVENT_PMC) {
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pm4_profile::Pmu* pmcMgr = pm4_factory->getPmcMgr();
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if (pmcMgr == NULL) return HSA_STATUS_ERROR;
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pmcMgr->setPmcDataBuff((uint8_t*)profile->output_buffer.ptr, profile->output_buffer.size);
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for (const hsa_ext_amd_aql_profile_event_t* p = profile->events;
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p < profile->events + profile->event_count; ++p) {
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pm4_profile::CounterBlock* block =
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pmcMgr->getCounterBlockById(pm4_factory->getBlockId(p));
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if (block == NULL) return HSA_STATUS_ERROR;
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pm4_profile::Counter* counter = block->createCounter();
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if (counter == NULL) return HSA_STATUS_ERROR;
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counter->setParameter(HSA_EXT_TOOLS_COUNTER_PARAMETER_EVENT_INDEX, sizeof(uint32_t),
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&(p->counter_id));
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counter->setEnable(true);
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}
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// Generate start commands
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pmcMgr->begin(&commands, cmdWriter);
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cmdBufMgr.setPreSize(commands.Size());
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// Generate stop commands
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pmcMgr->end(&commands, cmdWriter);
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} else if (profile->type == HSA_EXT_AQL_PROFILE_EVENT_SQTT) {
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pm4_profile::ThreadTrace* sqttMgr = pm4_factory->getSqttMgr();
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if (sqttMgr == NULL) return HSA_STATUS_ERROR;
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pm4_profile::ThreadTraceConfig sqtt_config;
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sqttMgr->InitThreadTraceConfig(&sqtt_config);
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if (profile->parameters) {
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for (const hsa_ext_amd_aql_profile_parameters_t* p = profile->parameters;
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p < (profile->parameters + profile->parameter_count); ++p) {
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switch (p->parameter_name) {
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case HSA_EXT_AQL_PROFILE_PARAM_COMPUTE_UNIT_TARGET:
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sqtt_config.threadTraceTargetCu = p->value;
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break;
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case HSA_EXT_AQL_PROFILE_PARAM_VM_ID_MASK:
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sqtt_config.threadTraceVmIdMask = p->value;
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break;
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case HSA_EXT_AQL_PROFILE_PARAM_MASK:
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sqtt_config.threadTraceMask = p->value;
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break;
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case HSA_EXT_AQL_PROFILE_PARAM_TOKEN_MASK:
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sqtt_config.threadTraceTokenMask = p->value;
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break;
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case HSA_EXT_AQL_PROFILE_PARAM_TOKEN_MASK2:
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sqtt_config.threadTraceTokenMask2 = p->value;
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break;
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default:
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return HSA_STATUS_ERROR;
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}
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}
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}
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sqttMgr->Init(&sqtt_config);
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sqttMgr->setSqttDataBuff((uint8_t*)profile->output_buffer.ptr, profile->output_buffer.size);
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const uint32_t status_size = sqttMgr->StatusSizeInfo();
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void* status_ptr = cmdBufMgr.setPostfix(status_size);
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if (status_ptr == NULL) return HSA_STATUS_ERROR;
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// Control buffer registering
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sqttMgr->setSqttCtrlBuff((uint32_t*)status_ptr);
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// Generate start commands
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sqttMgr->BeginSession(&commands, cmdWriter);
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cmdBufMgr.setPreSize(commands.Size());
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// Generate stop commands
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sqttMgr->StopSession(&commands, cmdWriter);
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} else
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return HSA_STATUS_ERROR;
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if (!cmdBufMgr.checkTotalSize(commands.Size())) return HSA_STATUS_ERROR;
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const aql_profile::descriptor_t pre_descr = cmdBufMgr.getPreDescr();
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const aql_profile::descriptor_t post_descr = cmdBufMgr.getPostDescr();
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memcpy(pre_descr.ptr, commands.Base(), pre_descr.size);
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memcpy(post_descr.ptr, commands.Base() + pre_descr.size, post_descr.size);
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// Populate start aql packet
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aql_profile::populateAql(pre_descr.ptr, pre_descr.size, cmdWriter, aql_start_packet);
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return HSA_STATUS_SUCCESS;
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}
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// Method to populate the provided AQL packet with profiling stop commands
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PUBLIC_API hsa_status_t hsa_ext_amd_aql_profile_stop(
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const hsa_ext_amd_aql_profile_profile_t* profile, aql_profile::packet_t* aql_stop_packet) {
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aql_profile::Pm4Factory * pm4_factory = aql_profile::Pm4Factory::Create(profile);
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if (pm4_factory == NULL) return HSA_STATUS_ERROR;
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pm4_profile::CommandWriter* cmdWriter = pm4_factory->getCommandWriter();
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if (cmdWriter == NULL) return HSA_STATUS_ERROR;
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aql_profile::CommandBufferMgr cmdBufMgr(profile);
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if (cmdBufMgr.getSize() == 0) return HSA_STATUS_ERROR;
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const aql_profile::descriptor_t post_descr = cmdBufMgr.getPostDescr();
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// Populate stop aql packet
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aql_profile::populateAql(post_descr.ptr, post_descr.size, cmdWriter, aql_stop_packet);
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return HSA_STATUS_SUCCESS;
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}
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// Converting of the profiling AQL packet to PM4 packet, GFX8 support
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PUBLIC_API hsa_status_t hsa_ext_amd_aql_profile_legacy_get_pm4(
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const aql_profile::packet_t* aql_packet, void* pm4) {
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return HSA_STATUS_ERROR;
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}
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// Method for getting the profile info
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PUBLIC_API hsa_status_t hsa_ext_amd_aql_profile_get_info(
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const hsa_ext_amd_aql_profile_profile_t* profile, hsa_ext_amd_aql_profile_info_type_t attribute,
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void* value) {
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hsa_status_t status = HSA_STATUS_SUCCESS;
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switch (attribute) {
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case HSA_EXT_AQL_PROFILE_INFO_COMMAND_BUFFER_SIZE:
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*(uint32_t*)value = 0x1000; // a current approximation as 4K is big enaugh
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break;
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case HSA_EXT_AQL_PROFILE_INFO_PMC_DATA_SIZE:
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*(uint32_t*)value = 0x1000; // a current approximation as 4K is big enaugh
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break;
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case HSA_EXT_AQL_PROFILE_INFO_PMC_DATA:
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reinterpret_cast<hsa_ext_amd_aql_profile_info_data_t*>(value)->pmc_data.result = 0;
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status = hsa_ext_amd_aql_profile_iterate_data(profile, aql_profile::default_pmcdata_callback,
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value);
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break;
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case HSA_EXT_AQL_PROFILE_INFO_SQTT_DATA:
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status = hsa_ext_amd_aql_profile_iterate_data(profile, aql_profile::default_sqttdata_callback,
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value);
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break;
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default:
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status = HSA_STATUS_ERROR_INVALID_ARGUMENT;
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}
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return status;
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}
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// Method for iterating the events output data
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PUBLIC_API hsa_status_t hsa_ext_amd_aql_profile_iterate_data(
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const hsa_ext_amd_aql_profile_profile_t* profile,
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hsa_ext_amd_aql_profile_data_callback_t callback, void* data) {
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hsa_status_t status = HSA_STATUS_SUCCESS;
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aql_profile::Pm4Factory * pm4_factory = aql_profile::Pm4Factory::Create(profile);
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if (pm4_factory == NULL) return HSA_STATUS_ERROR;
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if (profile->type == HSA_EXT_AQL_PROFILE_EVENT_PMC) {
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uint32_t info_size = 0;
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void* info_data;
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uint64_t* samples = (uint64_t*)profile->output_buffer.ptr;
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const uint32_t sample_count = profile->output_buffer.size / sizeof(uint64_t);
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uint32_t sample_index = 0;
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pm4_profile::Pmu* pmcMgr = pm4_factory->getPmcMgr();
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if (pmcMgr == NULL) return HSA_STATUS_ERROR;
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for (const hsa_ext_amd_aql_profile_event_t* p = profile->events;
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p < (profile->events + profile->event_count); ++p) {
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pm4_profile::CounterBlock* block =
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pmcMgr->getCounterBlockById(pm4_factory->getBlockId(p));
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if (block == NULL) return HSA_STATUS_ERROR;
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if (!block->getInfo(pm4_profile::GPU_BLK_INFO_CONTROL_METHOD, info_size, &info_data)) {
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return HSA_STATUS_ERROR;
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}
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const pm4_profile::CntlMethod method =
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static_cast<pm4_profile::CntlMethod>(*(static_cast<uint32_t*>(info_data)));
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// A perfcounter data sample per ShaderEngine
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const uint32_t block_samples_count = (method == pm4_profile::CntlMethodBySe ||
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method == pm4_profile::CntlMethodBySeAndInstance)
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? pmcMgr->getNumSe()
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: 1;
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for (uint32_t i = 0; i < block_samples_count; ++i) {
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assert(sample_index < sample_count);
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if (sample_index >= sample_count) return HSA_STATUS_ERROR;
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hsa_ext_amd_aql_profile_info_data_t sample_info;
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sample_info.sample_id = i;
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sample_info.pmc_data.event = *p;
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sample_info.pmc_data.result = samples[sample_index];
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status = callback(HSA_EXT_AQL_PROFILE_INFO_PMC_DATA, &sample_info, data);
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if (status == HSA_STATUS_INFO_BREAK) {
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status = HSA_STATUS_SUCCESS;
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break;
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}
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if (status != HSA_STATUS_SUCCESS) break;
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++sample_index;
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}
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}
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} else if (profile->type == HSA_EXT_AQL_PROFILE_EVENT_SQTT) {
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pm4_profile::ThreadTrace* sqttMgr = pm4_factory->getSqttMgr();
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if (sqttMgr == NULL) return HSA_STATUS_ERROR;
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aql_profile::CommandBufferMgr cmdBufMgr(profile);
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if (cmdBufMgr.getSize() == 0) return HSA_STATUS_ERROR;
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const uint32_t status_size = sqttMgr->StatusSizeInfo();
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// Control buffer was allocated as the CmdBuffer postfix partition
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void* status_ptr = cmdBufMgr.setPostfix(status_size);
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if (status_ptr == NULL) return HSA_STATUS_ERROR;
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// Control buffer registering
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sqttMgr->setSqttCtrlBuff((uint32_t*)status_ptr);
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// Validate SQTT status and normalize WRPTR
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if (sqttMgr->Validate() == false) return HSA_STATUS_ERROR;
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const uint32_t se_number = sqttMgr->getNumSe();
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// Casting status pointer to SQTT control per ShaderEngine array
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aql_profile::sqtt_ctrl_t* sqtt_ctrl = (aql_profile::sqtt_ctrl_t*)status_ptr;
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assert(status_size == sizeof(aql_profile::sqtt_ctrl_t) * se_number);
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if (status_size != sizeof(aql_profile::sqtt_ctrl_t) * se_number) {
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return HSA_STATUS_ERROR;
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}
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// SQTT output buffer and capacity per ShaderEngine
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void* sample_ptr = profile->output_buffer.ptr;
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const uint32_t sample_capacity = profile->output_buffer.size / se_number;
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// The samples sizes are returned in the control buffer
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for (int i = 0; i < se_number; ++i) {
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// WPTR specifies the index in thread trace buffer where next token will be
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// written by hardware. The index is incremented by size of 32 bytes.
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uint32_t sample_size = sqtt_ctrl[i].writePtr * TT_WRITE_PTR_BLK;
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hsa_ext_amd_aql_profile_info_data_t sample_info;
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sample_info.sample_id = i;
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sample_info.sqtt_data.ptr = sample_ptr;
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sample_info.sqtt_data.size = sample_size;
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status = callback(HSA_EXT_AQL_PROFILE_INFO_SQTT_DATA, &sample_info, data);
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if (status == HSA_STATUS_INFO_BREAK) {
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status = HSA_STATUS_SUCCESS;
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break;
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}
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if (status != HSA_STATUS_SUCCESS) break;
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sample_ptr += sample_capacity;
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}
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} else {
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status = HSA_STATUS_ERROR;
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}
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return status;
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}
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}
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