foreman
204 lines
7.3 KiB
C++
204 lines
7.3 KiB
C++
//
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// Copyright (c) 2008 Advanced Micro Devices, Inc. All rights reserved.
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//
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#include "device/gpu/gpudefs.hpp"
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#include "device/gpu/gpuprogram.hpp"
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#include "device/gpu/gpukernel.hpp"
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#include "acl.h"
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#include "SCShadersSi.h"
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#include "si_ci_merged_offset.h"
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#include <string>
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#include <fstream>
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#include <sstream>
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#include <iostream>
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#include <ctime>
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namespace gpu {
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bool
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NullKernel::siCreateHwInfo(const void* shader, AMUabiAddEncoding& encoding)
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{
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static const uint NumSiCsInfos = (70 + 5 + 1 + 32 + 6);
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CALProgramInfoEntry* newInfos;
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uint i = 0;
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uint infoCount = NumSiCsInfos;
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const SC_SI_HWSHADER_CS* cShader = reinterpret_cast<const SC_SI_HWSHADER_CS*>(shader);
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newInfos = new CALProgramInfoEntry[infoCount];
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encoding.progInfos = newInfos;
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if (encoding.progInfos == 0) {
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infoCount = 0;
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return false;
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}
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newInfos[i].address = AMU_ABI_USER_ELEMENT_COUNT;
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newInfos[i].value = cShader->common.userElementCount;
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i++;
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for (unsigned int j = 0; j < cShader->common.userElementCount; j++) {
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newInfos[i].address = AMU_ABI_USER_ELEMENTS_0_DWORD0 + 4*j;
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newInfos[i].value = HWSHADER_Get(cShader, common.pUserElements)[j].dataClass;
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i++;
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newInfos[i].address = AMU_ABI_USER_ELEMENTS_0_DWORD1 + 4*j;
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newInfos[i].value = HWSHADER_Get(cShader, common.pUserElements)[j].apiSlot;
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i++;
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newInfos[i].address = AMU_ABI_USER_ELEMENTS_0_DWORD2 + 4*j;
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newInfos[i].value = HWSHADER_Get(cShader, common.pUserElements)[j].startUserReg;
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i++;
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newInfos[i].address = AMU_ABI_USER_ELEMENTS_0_DWORD3 + 4*j;
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newInfos[i].value = HWSHADER_Get(cShader, common.pUserElements)[j].userRegCount;
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i++;
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}
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newInfos[i].address = AMU_ABI_SI_NUM_VGPRS;
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newInfos[i].value = cShader->common.numVgprs;
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i++;
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newInfos[i].address = AMU_ABI_SI_NUM_SGPRS;
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newInfos[i].value = cShader->common.numSgprs;
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i++;
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newInfos[i].address = AMU_ABI_SI_NUM_SGPRS_AVAIL;
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newInfos[i].value = 104-2; //512;//options.NumSGPRsAvailable;
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i++;
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newInfos[i].address = AMU_ABI_SI_NUM_VGPRS_AVAIL;
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newInfos[i].value = 256;//options.NumVGPRsAvailable;
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i++;
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newInfos[i].address = AMU_ABI_SI_FLOAT_MODE;
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newInfos[i].value = cShader->common.floatMode;
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i++;
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newInfos[i].address = AMU_ABI_SI_IEEE_MODE;
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newInfos[i].value = cShader->common.bIeeeMode;
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i++;
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newInfos[i].address = AMU_ABI_SI_SCRATCH_SIZE;
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newInfos[i].value = cShader->common.scratchSize;;
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i++;
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newInfos[i].address = mmCOMPUTE_PGM_RSRC2;
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newInfos[i].value = cShader->computePgmRsrc2.u32All;
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i++;
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newInfos[i].address = AMU_ABI_NUM_THREAD_PER_GROUP_X;
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newInfos[i].value = cShader->numThreadX;
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i++;
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newInfos[i].address = AMU_ABI_NUM_THREAD_PER_GROUP_Y;
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newInfos[i].value = cShader->numThreadY;
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i++;
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newInfos[i].address = AMU_ABI_NUM_THREAD_PER_GROUP_Z;
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newInfos[i].value = cShader->numThreadZ;
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i++;
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newInfos[i].address = AMU_ABI_ORDERED_APPEND_ENABLE;
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newInfos[i].value = cShader->bOrderedAppendEnable;
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i++;
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newInfos[i].address = AMU_ABI_RAT_OP_IS_USED;
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newInfos[i].value = cShader->common.uavResourceUsage[0];
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i++;
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for (unsigned int j = 0; j < ((SC_MAX_UAV + 31) / 32); j++) {
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newInfos[i].address = AMU_ABI_UAV_RESOURCE_MASK_0 + j;
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newInfos[i].value = cShader->common.uavResourceUsage[j];
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i++;
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}
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newInfos[i].address = AMU_ABI_NUM_WAVEFRONT_PER_SIMD; // Setting the same as for scWrapR800Info
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newInfos[i].value = 1;
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i++;
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newInfos[i].address = AMU_ABI_WAVEFRONT_SIZE;
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newInfos[i].value = nullDev().hwInfo()->simdWidth_ * 4; //options.WavefrontSize;
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i++;
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newInfos[i].address = AMU_ABI_LDS_SIZE_AVAIL;
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newInfos[i].value = 32*1024; //options.LDSSize;
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i++;
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newInfos[i].address = AMU_ABI_LDS_SIZE_USED;
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newInfos[i].value = 64 * 4 * cShader->computePgmRsrc2.bits.LDS_SIZE;
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i++;
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infoCount = i;
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assert((i + 4 * (16 - cShader->common.userElementCount)) == NumSiCsInfos);
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encoding.progInfosCount = infoCount;
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CALUavMask uavMask;
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memcpy(uavMask.mask, cShader->common.uavResourceUsage, sizeof(CALUavMask));
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encoding.uavMask = uavMask;
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encoding.textData = HWSHADER_Get(cShader, common.hShaderMemHandle);
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encoding.textSize = cShader->common.codeLenInByte;
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instructionCnt_ = encoding.textSize / sizeof(uint32_t);
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encoding.scratchRegisterCount = cShader->common.scratchSize;
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encoding.UAVReturnBufferTotalSize = 0;
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return true;
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}
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bool
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HSAILKernel::aqlCreateHWInfo(const void* shader, size_t shaderSize)
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{
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// Copy the shader_isa into a buffer
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hwMetaData_ = new char[shaderSize];
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if (hwMetaData_ == NULL) {
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return false;
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}
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memcpy(hwMetaData_, shader, shaderSize);
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SC_SI_HWSHADER_CS* siMetaData = reinterpret_cast<SC_SI_HWSHADER_CS*>(hwMetaData_);
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// Code to patch the pointers in the shader object.
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// Must be preferably done in the compiler library
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size_t offset = siMetaData->common.uSizeInBytes;
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if (siMetaData->common.u32PvtDataSizeInBytes > 0) {
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siMetaData->common.pPvtData =
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reinterpret_cast<SC_BYTE *>(
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reinterpret_cast<char *>(siMetaData) + offset);
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offset += siMetaData->common.u32PvtDataSizeInBytes;
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}
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if (siMetaData->common.codeLenInByte > 0) {
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siMetaData->common.hShaderMemHandle =
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reinterpret_cast<char *>(siMetaData) + offset;
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offset += siMetaData->common.codeLenInByte;
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}
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char* headerBaseAddress =
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reinterpret_cast<char*>(siMetaData->common.hShaderMemHandle);
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hsa_ext_code_descriptor_t* hcd =
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reinterpret_cast<hsa_ext_code_descriptor_t*>(headerBaseAddress);
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amd_kernel_code_t* akc = reinterpret_cast<amd_kernel_code_t*>(
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headerBaseAddress + hcd->code.handle);
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address codeStartAddress = reinterpret_cast<address>(akc);
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address codeEndAddress = reinterpret_cast<address>(hcd) + siMetaData->common.codeLenInByte;
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uint64_t codeSize = codeEndAddress - codeStartAddress;
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code_ = new gpu::Memory(dev(), amd::alignUp(codeSize, gpu::ConstBuffer::VectorSize));
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// Initialize kernel ISA code
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if ((code_ != NULL) && code_->create(Resource::Local)) {
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address cpuCodePtr = static_cast<address>(code_->map(NULL, Resource::WriteOnly));
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// Copy only amd_kernel_code_t
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memcpy(cpuCodePtr, codeStartAddress, codeSize);
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code_->unmap(NULL);
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}
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else {
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LogError("Failed to allocate ISA code!");
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return false;
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}
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cpuAqlCode_ = akc;
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assert((akc->workitem_private_segment_byte_size & 3) == 0 &&
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"Scratch must be DWORD aligned");
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workGroupInfo_.scratchRegs_ =
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akc->workitem_private_segment_byte_size / sizeof(uint);
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workGroupInfo_.availableSGPRs_ = dev().gslCtx()->getNumSGPRsAvailable();
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workGroupInfo_.availableVGPRs_ = dev().gslCtx()->getNumVGPRsAvailable();
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workGroupInfo_.preferredSizeMultiple_ = dev().getAttribs().wavefrontSize;
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workGroupInfo_.privateMemSize_ = akc->workitem_private_segment_byte_size;
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workGroupInfo_.localMemSize_ =
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workGroupInfo_.usedLDSSize_ = akc->workgroup_group_segment_byte_size;
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workGroupInfo_.usedSGPRs_ = akc->wavefront_sgpr_count;
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workGroupInfo_.usedStackSize_ = 0;
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workGroupInfo_.usedVGPRs_ = akc->workitem_vgpr_count;
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workGroupInfo_.wavefrontPerSIMD_ = dev().getAttribs().wavefrontSize;
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return true;
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}
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} // namespace gpu
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