adapryor
312 linhas
12 KiB
C++
312 linhas
12 KiB
C++
/*
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Copyright (c) 2022 - present Advanced Micro Devices, Inc. All rights reserved.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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*/
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#include "rdc_modules/rdc_rocp/RdcRocpBase.h"
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#include <rocprofiler-sdk/fwd.h>
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#include <rocprofiler-sdk/registration.h>
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#include <rocprofiler-sdk/rocprofiler.h>
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#include <sys/wait.h>
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#include <unistd.h>
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#include <algorithm>
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#include <cassert>
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#include <chrono>
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#include <cmath>
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#include <cstdint>
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#include <cstdio>
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#include <cstring>
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#include <stdexcept>
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#include <vector>
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// #include "hsa.h"
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#include "rdc/rdc.h"
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#include "rdc_lib/RdcLogger.h"
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#include "rdc_lib/RdcTelemetryLibInterface.h"
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#include "rdc_modules/rdc_rocp/RdcRocpCounterSampler.h"
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namespace amd {
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namespace rdc {
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double RdcRocpBase::run_profiler(uint32_t gpu_index, rdc_field_t field) {
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thread_local std::vector<rocprofiler_record_counter_t> records;
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auto counter_sampler = CounterSampler::get_samplers()[gpu_index];
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if (!counter_sampler) {
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RDC_LOG(RDC_ERROR, "Error: Counter sampler not found for GPU index " << gpu_index);
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return RDC_ST_BAD_PARAMETER;
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}
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auto field_it = field_to_metric.find(field);
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if (field_it == field_to_metric.end()) {
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RDC_LOG(RDC_ERROR, "Error: Field " << field << " not found in field_to_metric map.");
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return RDC_ST_BAD_PARAMETER;
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}
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const std::string& metric_id = field_it->second;
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try {
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counter_sampler->sample_counter_values({metric_id}, records, collection_duration_us_k);
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} catch (const std::exception& e) {
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RDC_LOG(RDC_ERROR, "Error while sampling counter values: " << e.what());
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return RDC_ST_BAD_PARAMETER;
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}
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// Aggregate counter values. Rocprof v1/v2 summed values across dimensions.
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double value = 0.0;
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for (auto& record : records) {
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value += record.counter_value; // Summing up values from all dimensions.
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}
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return value;
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}
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const char* RdcRocpBase::get_field_id_from_name(rdc_field_t field) {
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auto it = field_to_metric.find(field);
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if (it == field_to_metric.end()) {
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RDC_LOG(RDC_ERROR, "Error: Field ID " << field << " not found in field_to_metric map.");
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return "";
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}
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return field_to_metric.at(field);
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}
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const std::vector<rdc_field_t> RdcRocpBase::get_field_ids() {
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std::vector<rdc_field_t> field_ids;
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for (auto& [k, v] : field_to_metric) {
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field_ids.push_back(k);
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}
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return field_ids;
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}
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RdcRocpBase::RdcRocpBase() {
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// all fields
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static const std::map<rdc_field_t, const char*> temp_field_map_k = {
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{RDC_FI_PROF_OCCUPANCY_PERCENT, "OccupancyPercent"},
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{RDC_FI_PROF_ACTIVE_CYCLES, "GRBM_GUI_ACTIVE"},
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{RDC_FI_PROF_ACTIVE_WAVES, "SQ_WAVES"},
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{RDC_FI_PROF_ELAPSED_CYCLES, "GRBM_COUNT"},
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{RDC_FI_PROF_TENSOR_ACTIVE_PERCENT,
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"MfmaUtil"}, // same as TENSOR_ACTIVE but available for more GPUs
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{RDC_FI_PROF_GPU_UTIL_PERCENT, "GPU_UTIL"}, // metric is divided by 100 to get percent
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// metrics below are divided by time passed
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{RDC_FI_PROF_EVAL_MEM_R_BW, "FETCH_SIZE"},
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{RDC_FI_PROF_EVAL_MEM_W_BW, "WRITE_SIZE"},
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{RDC_FI_PROF_EVAL_FLOPS_16, "TOTAL_16_OPS"},
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{RDC_FI_PROF_EVAL_FLOPS_32, "TOTAL_32_OPS"},
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{RDC_FI_PROF_EVAL_FLOPS_64, "TOTAL_64_OPS"},
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{RDC_FI_PROF_EVAL_FLOPS_16_PERCENT, "RDC_OPS_16_PER_SIMDCYCLE"},
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{RDC_FI_PROF_EVAL_FLOPS_32_PERCENT, "RDC_OPS_32_PER_SIMDCYCLE"},
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{RDC_FI_PROF_EVAL_FLOPS_64_PERCENT, "RDC_OPS_64_PER_SIMDCYCLE"},
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// metrics below are not divided by time passed
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{RDC_FI_PROF_VALU_PIPE_ISSUE_UTIL, "ValuPipeIssueUtil"},
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{RDC_FI_PROF_SM_ACTIVE, "VALUBusy"},
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{RDC_FI_PROF_OCC_PER_ACTIVE_CU, "MeanOccupancyPerActiveCU"},
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{RDC_FI_PROF_OCC_ELAPSED,
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"GRBM_GUI_ACTIVE"}, // this metric is derived from OCC_PER_ACTIVE_CU and ACTIVE_CYCLES
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{RDC_FI_PROF_CPC_CPC_STAT_BUSY, "CPC_CPC_STAT_BUSY"},
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{RDC_FI_PROF_CPC_CPC_STAT_IDLE, "CPC_CPC_STAT_IDLE"},
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{RDC_FI_PROF_CPC_CPC_STAT_STALL, "CPC_CPC_STAT_STALL"},
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{RDC_FI_PROF_CPC_CPC_TCIU_BUSY, "CPC_CPC_TCIU_BUSY"},
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{RDC_FI_PROF_CPC_CPC_TCIU_IDLE, "CPC_CPC_TCIU_IDLE"},
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{RDC_FI_PROF_CPC_CPC_UTCL2IU_BUSY, "CPC_CPC_UTCL2IU_BUSY"},
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{RDC_FI_PROF_CPC_CPC_UTCL2IU_IDLE, "CPC_CPC_UTCL2IU_IDLE"},
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{RDC_FI_PROF_CPC_CPC_UTCL2IU_STALL, "CPC_CPC_UTCL2IU_STALL"},
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{RDC_FI_PROF_CPC_ME1_BUSY_FOR_PACKET_DECODE, "CPC_ME1_BUSY_FOR_PACKET_DECODE"},
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{RDC_FI_PROF_CPC_ME1_DC0_SPI_BUSY, "CPC_ME1_DC0_SPI_BUSY"},
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{RDC_FI_PROF_CPC_UTCL1_STALL_ON_TRANSLATION, "CPC_UTCL1_STALL_ON_TRANSLATION"},
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{RDC_FI_PROF_CPC_ALWAYS_COUNT, "CPC_ALWAYS_COUNT"},
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{RDC_FI_PROF_CPC_ADC_VALID_CHUNK_NOT_AVAIL, "CPC_ADC_VALID_CHUNK_NOT_AVAIL"},
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{RDC_FI_PROF_CPC_ADC_DISPATCH_ALLOC_DONE, "CPC_ADC_DISPATCH_ALLOC_DONE"},
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{RDC_FI_PROF_CPC_ADC_VALID_CHUNK_END, "CPC_ADC_VALID_CHUNK_END"},
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{RDC_FI_PROF_CPC_SYNC_FIFO_FULL_LEVEL, "CPC_SYNC_FIFO_FULL_LEVEL"},
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{RDC_FI_PROF_CPC_SYNC_FIFO_FULL, "CPC_SYNC_FIFO_FULL"},
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{RDC_FI_PROF_CPC_GD_BUSY, "CPC_GD_BUSY"},
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{RDC_FI_PROF_CPC_TG_SEND, "CPC_TG_SEND"},
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{RDC_FI_PROF_CPC_WALK_NEXT_CHUNK, "CPC_WALK_NEXT_CHUNK"},
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{RDC_FI_PROF_CPC_STALLED_BY_SE0_SPI, "CPC_STALLED_BY_SE0_SPI"},
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{RDC_FI_PROF_CPC_STALLED_BY_SE1_SPI, "CPC_STALLED_BY_SE1_SPI"},
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{RDC_FI_PROF_CPC_STALLED_BY_SE2_SPI, "CPC_STALLED_BY_SE2_SPI"},
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{RDC_FI_PROF_CPC_STALLED_BY_SE3_SPI, "CPC_STALLED_BY_SE3_SPI"},
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{RDC_FI_PROF_CPC_LTE_ALL, "CPC_LTE_ALL"},
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{RDC_FI_PROF_CPC_SYNC_WRREQ_FIFO_BUSY, "CPC_SYNC_WRREQ_FIFO_BUSY"},
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{RDC_FI_PROF_CPC_CANE_BUSY, "CPC_CANE_BUSY"},
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{RDC_FI_PROF_CPC_CANE_STALL, "CPC_CANE_STALL"},
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{RDC_FI_PROF_CPF_CMP_UTCL1_STALL_ON_TRANSLATION, "CPF_CMP_UTCL1_STALL_ON_TRANSLATION"},
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{RDC_FI_PROF_CPF_CPF_STAT_BUSY, "CPF_CPF_STAT_BUSY"},
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{RDC_FI_PROF_CPF_CPF_STAT_IDLE, "CPF_CPF_STAT_IDLE"},
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{RDC_FI_PROF_CPF_CPF_STAT_STALL, "CPF_CPF_STAT_STALL"},
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{RDC_FI_PROF_CPF_CPF_TCIU_BUSY, "CPF_CPF_TCIU_BUSY"},
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{RDC_FI_PROF_CPF_CPF_TCIU_IDLE, "CPF_CPF_TCIU_IDLE"},
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{RDC_FI_PROF_CPF_CPF_TCIU_STALL, "CPF_CPF_TCIU_STALL"},
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{RDC_FI_PROF_SIMD_UTILIZATION, "SIMD_UTILIZATION"},
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};
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hsa_status_t status = hsa_init();
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if (status != HSA_STATUS_SUCCESS) {
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const char* errstr = nullptr;
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hsa_status_string(status, &errstr);
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throw std::runtime_error("hsa error code: " + std::to_string(status) + " " + errstr);
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}
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// check rocprofiler
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if (int rocp_status = 0;
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rocprofiler_is_initialized(&rocp_status) == ROCPROFILER_STATUS_SUCCESS && rocp_status != 1) {
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throw std::runtime_error("Rocprofiler is not initialized. status: " +
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std::to_string(rocp_status));
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}
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std::vector<std::string> all_fields;
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std::vector<std::string> checked_fields;
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// populate list of agents
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agents = CounterSampler::get_available_agents();
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RDC_LOG(RDC_DEBUG, "Agent count: " << agents.size());
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samplers = CounterSampler::get_samplers();
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// populate fields
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for (const auto& [k, v] : temp_field_map_k) {
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all_fields.emplace_back(v);
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}
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// find intersection of supported and requested fields
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for (uint32_t gpu_index = 0; gpu_index < agents.size(); gpu_index++) {
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auto& cs = *samplers[gpu_index];
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RDC_LOG(RDC_DEBUG,
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"gpu_index[" << gpu_index << "] = node_id[" << agents[gpu_index].node_id << "]");
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for (auto& [str, id] : CounterSampler::get_supported_counters(cs.get_agent())) {
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checked_fields.emplace_back(str);
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}
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for (const auto& [k, v] : temp_field_map_k) {
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auto found = std::find(checked_fields.begin(), checked_fields.end(), v);
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if (found != checked_fields.end()) {
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field_to_metric.insert({k, v});
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}
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}
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}
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RDC_LOG(RDC_DEBUG, "Rocprofiler supports " << field_to_metric.size() << " fields");
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}
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RdcRocpBase::~RdcRocpBase() {
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hsa_status_t status = HSA_STATUS_SUCCESS;
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status = hsa_shut_down();
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assert(status == HSA_STATUS_SUCCESS);
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status = hsa_shut_down();
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assert(status == HSA_STATUS_ERROR_NOT_INITIALIZED);
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}
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rdc_status_t RdcRocpBase::rocp_lookup(rdc_gpu_field_t gpu_field, double* value) {
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const auto& gpu_index = gpu_field.gpu_index;
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const auto& field = gpu_field.field_id;
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if (value == nullptr) {
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return RDC_ST_BAD_PARAMETER;
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}
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const bool is_eval_field = (eval_fields.find(field) != eval_fields.end());
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const auto start_time = std::chrono::high_resolution_clock::now();
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const double read_value = run_profiler(gpu_index, field);
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const auto stop_time = std::chrono::high_resolution_clock::now();
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const double elapsed = std::chrono::duration<double, std::milli>(stop_time - start_time).count();
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double divided_value = NAN;
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double final_value = NAN;
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if (is_eval_field) {
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if (elapsed != 0.0) {
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divided_value = read_value / (elapsed / 1000.0);
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} else {
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RDC_LOG(RDC_ERROR, "Error: Elapsed time is zero. Cannot divide by zero.");
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return RDC_ST_BAD_PARAMETER;
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}
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}
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switch (field) {
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case RDC_FI_PROF_GPU_UTIL_PERCENT:
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// RDC_FI_PROF_GPU_UTIL_PERCENT is mapped to GPU_UTIL
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// GPU_UTIL metric is available on more GPUs than ENGINE_ACTIVE.
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// ENGINE_ACTIVE = GPU_UTIL/100, so do the math ourselves
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final_value = read_value / 100.0F;
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break;
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case RDC_FI_PROF_OCC_ELAPSED: {
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// RDC_FI_PROF_OCC_ELAPSED is mapped to GRBM_GUI_ACTIVE, the read happens earlier in this
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// function
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const double active_cycles_val = read_value;
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if (active_cycles_val != 0.0) {
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// read second value from rocprofiler
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const double occupancy_val = run_profiler(gpu_index, RDC_FI_PROF_OCC_PER_ACTIVE_CU);
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final_value = occupancy_val / active_cycles_val;
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} else {
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return RDC_ST_BAD_PARAMETER;
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}
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} break;
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case RDC_FI_PROF_EVAL_FLOPS_16_PERCENT: {
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if (!is_eval_field) {
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RDC_LOG(RDC_ERROR, "Field expected to be in the eval_fields list but it isn't!");
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return RDC_ST_BAD_PARAMETER;
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}
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// 1024, 2048, and 256 are taken from "INTRODUCING AMD CDNA 3 ARCHITECTURE" white paper
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const std::string target_version = agents[gpu_index].name;
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// TODO: Design a lookup table for other GPUs
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const bool isMI200 = (target_version.find("gfx90a") != std::string::npos);
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// FLOPS/clock/CU
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if (isMI200) {
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final_value =
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divided_value / (1024.0F / static_cast<double>(agents[gpu_index].simd_per_cu));
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} else { // Assume mi300
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final_value =
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divided_value / (2048.0F / static_cast<double>(agents[gpu_index].simd_per_cu));
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}
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} break;
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case RDC_FI_PROF_EVAL_FLOPS_32_PERCENT:
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case RDC_FI_PROF_EVAL_FLOPS_64_PERCENT:
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if (!is_eval_field) {
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RDC_LOG(RDC_ERROR, "Field expected to be in the eval_fields list but it isn't!");
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return RDC_ST_BAD_PARAMETER;
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}
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// FLOPS/clock/CU
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final_value = divided_value / (256.0F / static_cast<double>(agents[gpu_index].simd_per_cu));
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break;
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default:
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if (is_eval_field) {
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final_value = divided_value;
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} else {
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final_value = read_value;
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}
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break;
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}
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if (final_value == NAN) {
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RDC_LOG(RDC_ERROR, "Error: Final value is NaN.");
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return RDC_ST_BAD_PARAMETER;
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}
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*value = final_value;
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return RDC_ST_OK;
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}
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} // namespace rdc
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} // namespace amd
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