foreman
3683b3d03c
SWDEV-133818 - PAL support for Linux Pro: Coarse Grain SVM for OpenCL 2.0 1. This change enables OCL 2.0 on Linux for devices using PAL backend. 2. Set the alignment for Coarse Grain SVM allocations to be the gpu fragment size (2MB on Linux). ReviewBoardURL = http://ocltc.amd.com/reviews/r/14437/diff/ Affected files ... ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palresource.cpp#52 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palsettings.cpp#46 edit ... //depot/stg/opencl/drivers/opencl/runtime/platform/memory.cpp#128 edit
504 lines
14 KiB
C++
504 lines
14 KiB
C++
//
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// Copyright (c) 2015 Advanced Micro Devices, Inc. All rights reserved.
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//
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#include "top.hpp"
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#include "os/os.hpp"
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#include "device/device.hpp"
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#include "device/pal/paldefs.hpp"
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#include "device/pal/palsettings.hpp"
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#include <algorithm>
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#if defined(_WIN32)
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#include "Windows.h"
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#include "VersionHelpers.h"
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#endif
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namespace pal {
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/*! \brief information for adjusting maximum workload time
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*
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* This structure contains the time and OS minor version for max workload time
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* adjustment for Windows 7 or 8.
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*/
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struct ModifyMaxWorkload {
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uint32_t time; //!< max work load time (10x ms)
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uint32_t minorVersion; //!< OS minor version
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#if defined(_WIN32)
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BYTE comparisonOps; //!< Comparison option
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#endif
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};
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Settings::Settings() {
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// Initialize the GPU device default settings
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oclVersion_ = OpenCL12;
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debugFlags_ = 0;
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syncObject_ = GPU_USE_SYNC_OBJECTS;
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remoteAlloc_ = REMOTE_ALLOC;
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stagedXferRead_ = true;
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stagedXferWrite_ = true;
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stagedXferSize_ = GPU_STAGING_BUFFER_SIZE * Ki;
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// We will enable staged read/write if we use local memory
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disablePersistent_ = false;
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// By Default persistent writes will be disabled.
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stagingWritePersistent_ = GPU_STAGING_WRITE_PERSISTENT;
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maxRenames_ = 4;
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maxRenameSize_ = 4 * Mi;
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imageSupport_ = false;
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hwLDSSize_ = 0;
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// Set this to true when we drop the flag
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doublePrecision_ = ::CL_KHR_FP64;
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// Fill workgroup info size
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maxWorkGroupSize_ = 1024;
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preferredWorkGroupSize_ = 256;
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hostMemDirectAccess_ = HostMemDisable;
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libSelector_ = amd::LibraryUndefined;
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// Enable workload split by default (for 24 bit arithmetic or timeout)
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workloadSplitSize_ = 1 << GPU_WORKLOAD_SPLIT;
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// By default use host blit
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blitEngine_ = BlitEngineHost;
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const static size_t MaxPinnedXferSize = 32;
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pinnedXferSize_ = std::min(GPU_PINNED_XFER_SIZE, MaxPinnedXferSize) * Mi;
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pinnedMinXferSize_ = std::min(GPU_PINNED_MIN_XFER_SIZE * Ki, pinnedXferSize_);
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// Disable FP_FAST_FMA defines by default
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reportFMAF_ = false;
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reportFMA_ = false;
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// GPU device by default
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apuSystem_ = false;
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// Disable 64 bit pointers support by default
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use64BitPtr_ = false;
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// Max alloc size is 16GB
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maxAllocSize_ = 16 * static_cast<uint64_t>(Gi);
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// Disable memory dependency tracking by default
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numMemDependencies_ = 0;
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// By default cache isn't present
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cacheLineSize_ = 0;
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cacheSize_ = 0;
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// Initialize transfer buffer size to 1MB by default
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xferBufSize_ = 1024 * Ki;
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// Use image DMA if requested
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imageDMA_ = GPU_IMAGE_DMA;
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// Disable ASIC specific features by default
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viPlus_ = false;
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aiPlus_ = false;
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gfx10Plus_ = false;
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// Number of compute rings.
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numComputeRings_ = 0;
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minWorkloadTime_ = 1; // 0.1 ms
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maxWorkloadTime_ = 500000; // 500 ms
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// Controls tiled images in persistent
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//!@note IOL for Linux doesn't setup tiling aperture in CMM/QS
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linearPersistentImage_ = false;
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useSingleScratch_ = GPU_USE_SINGLE_SCRATCH;
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// Device enqueuing settings
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numDeviceEvents_ = 1024;
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numWaitEvents_ = 8;
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numScratchWavesPerCu_ = 16;
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// Don't support platform atomics by default.
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svmAtomics_ = false;
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// Use host queue for device enqueuing by default
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useDeviceQueue_ = GPU_USE_DEVICE_QUEUE;
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// Don't support Denormals for single precision by default
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singleFpDenorm_ = false;
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// Disable SDMA workaround by default
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sdamPageFaultWar_ = false;
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// SQTT buffer size in bytes
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rgpSqttDispCount_ = PAL_RGP_DISP_COUNT;
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rgpSqttWaitIdle_ = true;
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rgpSqttForceDisable_ = false;
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// Sub allocation parameters
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subAllocationMinSize_ = 4 * Ki;
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subAllocationChunkSize_ = 64 * Mi;
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subAllocationMaxSize_ =
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std::min(static_cast<uint64_t>(GPU_MAX_SUBALLOC_SIZE) * Ki, subAllocationChunkSize_);
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}
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bool Settings::create(const Pal::DeviceProperties& palProp,
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const Pal::GpuMemoryHeapProperties* heaps, const Pal::WorkStationCaps& wscaps,
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bool reportAsOCL12Device)
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{
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uint32_t osVer = 0x0;
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// Disable thread trace by default for all devices
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threadTraceEnable_ = false;
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bool doublePrecision = true;
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if (doublePrecision) {
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// Report FP_FAST_FMA define if double precision HW
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reportFMA_ = true;
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// FMA is 1/4 speed on Pitcairn, Cape Verde, Devastator and Scrapper
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// Bonaire, Kalindi, Spectre and Spooky so disable
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// FP_FMA_FMAF for those parts in switch below
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reportFMAF_ = true;
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}
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// Update GPU specific settings and info structure if we have any
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ModifyMaxWorkload modifyMaxWorkload = {0};
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// APU systems
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if (palProp.gpuType == Pal::GpuType::Integrated) {
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apuSystem_ = true;
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}
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switch (palProp.revision) {
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case Pal::AsicRevision::Unknown:
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switch (palProp.gfxLevel) {
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case Pal::GfxIpLevel::GfxIp10:
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gfx10Plus_ = true;
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case Pal::GfxIpLevel::GfxIp9:
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aiPlus_ = true;
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break;
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default:
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assert(0 && "Unknown GfxIP type!");
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return false;
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}
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case Pal::AsicRevision::Navi10:
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gfx10Plus_ = true;
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// Fall through to AI (gfx9) ...
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case Pal::AsicRevision::Vega20:
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case Pal::AsicRevision::Vega12:
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case Pal::AsicRevision::Vega10:
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case Pal::AsicRevision::Raven:
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case Pal::AsicRevision::Raven2:
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aiPlus_ = true;
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// Fall through to VI ...
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case Pal::AsicRevision::Carrizo:
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case Pal::AsicRevision::Bristol:
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case Pal::AsicRevision::Stoney:
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if (!aiPlus_) {
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// Fix BSOD/TDR issues observed on Stoney Win7/8.1/10
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minWorkloadTime_ = 1000;
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modifyMaxWorkload.time = 1000; // Decided by experiment
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modifyMaxWorkload.minorVersion = 1; // Win 7
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#if defined(_WIN32)
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modifyMaxWorkload.comparisonOps = VER_EQUAL; // Limit to Win 7 only
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#endif
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}
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case Pal::AsicRevision::Iceland:
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case Pal::AsicRevision::Tonga:
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case Pal::AsicRevision::Fiji:
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case Pal::AsicRevision::Polaris10:
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case Pal::AsicRevision::Polaris11:
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case Pal::AsicRevision::Polaris12:
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// Disable tiling aperture on VI+
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linearPersistentImage_ = true;
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// Keep this false even though we have support
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// singleFpDenorm_ = true;
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viPlus_ = true;
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// SDMA may have memory access outside of
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// the valid buffer range and cause a page fault
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sdamPageFaultWar_ = true;
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enableExtension(ClKhrFp16);
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// Fall through to CI ...
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case Pal::AsicRevision::Kalindi:
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case Pal::AsicRevision::Godavari:
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case Pal::AsicRevision::Spectre:
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case Pal::AsicRevision::Spooky:
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if (!viPlus_) {
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// Fix BSOD/TDR issues observed on Kaveri Win7 (EPR#416903)
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modifyMaxWorkload.time = 250000; // 250ms
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modifyMaxWorkload.minorVersion = 1; // Win 7
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#if defined(_WIN32)
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modifyMaxWorkload.comparisonOps = VER_EQUAL; // limit to Win 7
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#endif
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}
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// Fall through ...
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case Pal::AsicRevision::Bonaire:
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case Pal::AsicRevision::Hawaii:
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threadTraceEnable_ = AMD_THREAD_TRACE_ENABLE;
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reportFMAF_ = false;
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if (palProp.revision == Pal::AsicRevision::Hawaii) {
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reportFMAF_ = true;
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}
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// Cache line size is 64 bytes
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cacheLineSize_ = 64;
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// L1 cache size is 16KB
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cacheSize_ = 16 * Ki;
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libSelector_ = amd::GPU_Library_CI;
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if (LP64_SWITCH(false, true)) {
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oclVersion_ = !reportAsOCL12Device /*&& calAttr.isOpenCL200Device*/
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? XCONCAT(OpenCL, XCONCAT(OPENCL_MAJOR, OPENCL_MINOR))
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: OpenCL12;
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}
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if (GPU_FORCE_OCL20_32BIT) {
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force32BitOcl20_ = true;
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oclVersion_ = !reportAsOCL12Device /*&& calAttr.isOpenCL200Device*/
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? XCONCAT(OpenCL, XCONCAT(OPENCL_MAJOR, OPENCL_MINOR))
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: OpenCL12;
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}
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if (OPENCL_VERSION < 200) {
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oclVersion_ = OpenCL12;
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}
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numComputeRings_ = 8;
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// Cap at OpenCL20 for now
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if (oclVersion_ > OpenCL20) oclVersion_ = OpenCL20;
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// This needs to be cleaned once 64bit addressing is stable
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if (oclVersion_ < OpenCL20) {
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use64BitPtr_ = flagIsDefault(GPU_FORCE_64BIT_PTR)
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? LP64_SWITCH(false,
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/*calAttr.isWorkstation ||*/ true)
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: GPU_FORCE_64BIT_PTR;
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} else {
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if (GPU_FORCE_64BIT_PTR || LP64_SWITCH(false, true)) {
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use64BitPtr_ = true;
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}
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}
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if (oclVersion_ >= OpenCL20) {
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supportDepthsRGB_ = true;
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}
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if (use64BitPtr_) {
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if (GPU_ENABLE_LARGE_ALLOCATION && wscaps.workStationBoard) {
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maxAllocSize_ = 64ULL * Gi;
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} else {
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maxAllocSize_ = 4048 * Mi;
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}
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} else {
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maxAllocSize_ = 3ULL * Gi;
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}
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supportRA_ = false;
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partialDispatch_ = GPU_PARTIAL_DISPATCH;
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numMemDependencies_ = GPU_NUM_MEM_DEPENDENCY;
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break;
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default:
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assert(0 && "Unknown ASIC type!");
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return false;
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}
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#if defined(_WIN32)
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if (modifyMaxWorkload.time > 0) {
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OSVERSIONINFOEX versionInfo = {0};
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versionInfo.dwOSVersionInfoSize = sizeof(OSVERSIONINFOEX);
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versionInfo.dwMajorVersion = 6;
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versionInfo.dwMinorVersion = modifyMaxWorkload.minorVersion;
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DWORDLONG conditionMask = 0;
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VER_SET_CONDITION(conditionMask, VER_MAJORVERSION, modifyMaxWorkload.comparisonOps);
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VER_SET_CONDITION(conditionMask, VER_MINORVERSION, modifyMaxWorkload.comparisonOps);
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if (VerifyVersionInfo(&versionInfo, VER_MAJORVERSION | VER_MINORVERSION, conditionMask)) {
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maxWorkloadTime_ = modifyMaxWorkload.time;
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}
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}
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#endif // defined(_WIN32)
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// Enable atomics support
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enableExtension(ClKhrInt64BaseAtomics);
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enableExtension(ClKhrInt64ExtendedAtomics);
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enableExtension(ClKhrGlobalInt32BaseAtomics);
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enableExtension(ClKhrGlobalInt32ExtendedAtomics);
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enableExtension(ClKhrLocalInt32BaseAtomics);
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enableExtension(ClKhrLocalInt32ExtendedAtomics);
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enableExtension(ClKhrByteAddressableStore);
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enableExtension(ClKhrGlSharing);
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enableExtension(ClKhrGlEvent);
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enableExtension(ClKhr3DImageWrites);
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enableExtension(ClKhrImage2dFromBuffer);
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enableExtension(ClAmdMediaOps);
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enableExtension(ClAmdMediaOps2);
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#if !defined(WITH_LIGHTNING_COMPILER)
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enableExtension(ClAmdPopcnt);
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enableExtension(ClAmdVec3);
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enableExtension(ClAmdPrintf);
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#endif // !defined(WITH_LIGHTNING_COMPILER)
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// Enable some platform extensions
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enableExtension(ClAmdDeviceAttributeQuery);
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#if !defined(WITH_LIGHTNING_COMPILER)
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enableExtension(ClKhrSpir);
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#endif // !defined(WITH_LIGHTNING_COMPILER)
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#ifdef ATI_OS_LINUX
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if (palProp.gpuMemoryProperties.busAddressableMemSize > 0)
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#endif
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{
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enableExtension(ClAMDLiquidFlash);
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}
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hwLDSSize_ = 32 * Ki;
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imageSupport_ = true;
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// Use kernels for blit if appropriate
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blitEngine_ = BlitEngineKernel;
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hostMemDirectAccess_ |= HostMemBuffer;
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// HW doesn't support untiled image writes
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// hostMemDirectAccess_ |= HostMemImage;
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// Make sure device actually supports double precision
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doublePrecision_ = (doublePrecision) ? doublePrecision_ : false;
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if (doublePrecision_) {
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// Enable KHR double precision extension
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enableExtension(ClKhrFp64);
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}
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#if !defined(WITH_LIGHTNING_COMPILER)
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if (doublePrecision) {
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// Enable AMD double precision extension
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doublePrecision_ = true;
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enableExtension(ClAmdFp64);
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}
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#endif // !defined(WITH_LIGHTNING_COMPILER)
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if (palProp.gpuMemoryProperties.busAddressableMemSize > 0) {
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// Enable bus addressable memory extension
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enableExtension(ClAMDBusAddressableMemory);
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}
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//! @todo
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/*
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if (calAttr.longIdleDetect) {
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// KMD is unable to detect if we map the visible memory for CPU access, so
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// accessing persistent staged buffer may fail if LongIdleDetct is enabled.
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disablePersistent_ = true;
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}
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*/
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svmFineGrainSystem_ = palProp.gpuMemoryProperties.flags.iommuv2Support;
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svmAtomics_ = svmFineGrainSystem_;
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// SVM is not currently supported for DX Interop
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#if defined(_WIN32)
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enableExtension(ClKhrD3d9Sharing);
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enableExtension(ClKhrD3d10Sharing);
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enableExtension(ClKhrD3d11Sharing);
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#endif // _WIN32
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// Enable some OpenCL 2.0 extensions
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if (oclVersion_ >= OpenCL20) {
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enableExtension(ClKhrGLDepthImages);
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enableExtension(ClKhrSubGroups);
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enableExtension(ClKhrDepthImages);
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if (GPU_MIPMAP) {
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enableExtension(ClKhrMipMapImage);
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enableExtension(ClKhrMipMapImageWrites);
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}
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// Enable HW debug
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if (GPU_ENABLE_HW_DEBUG) {
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enableHwDebug_ = true;
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}
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}
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if (apuSystem_ &&
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((heaps[Pal::GpuHeapLocal].heapSize + heaps[Pal::GpuHeapInvisible].heapSize) < (150 * Mi))) {
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remoteAlloc_ = true;
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}
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// Update resource cache size
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if (remoteAlloc_) {
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resourceCacheSize_ = std::max((heaps[Pal::GpuHeapGartUswc].heapSize / 8),
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(uint64_t)GPU_RESOURCE_CACHE_SIZE * Mi);
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} else {
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resourceCacheSize_ =
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std::max(((heaps[Pal::GpuHeapLocal].heapSize + heaps[Pal::GpuHeapInvisible].heapSize) / 8),
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(uint64_t)GPU_RESOURCE_CACHE_SIZE * Mi);
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#if !defined(_LP64)
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resourceCacheSize_ = std::min(resourceCacheSize_, 1 * Gi);
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#endif
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}
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#if defined(WITH_LIGHTNING_COMPILER)
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switch (palProp.gfxLevel) {
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case Pal::GfxIpLevel::GfxIp10:
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case Pal::GfxIpLevel::GfxIp9:
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singleFpDenorm_ = true;
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break;
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default:
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break;
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}
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#endif // WITH_LIGHTNING_COMPILER
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// Override current device settings
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override();
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return true;
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}
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void Settings::override() {
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// Limit reported workgroup size
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if (GPU_MAX_WORKGROUP_SIZE != 0) {
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preferredWorkGroupSize_ = GPU_MAX_WORKGROUP_SIZE;
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}
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// Override blit engine type
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if (GPU_BLIT_ENGINE_TYPE != BlitEngineDefault) {
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blitEngine_ = GPU_BLIT_ENGINE_TYPE;
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}
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if (!flagIsDefault(DEBUG_GPU_FLAGS)) {
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debugFlags_ = DEBUG_GPU_FLAGS;
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}
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if (!flagIsDefault(DEBUG_GPU_FLAGS)) {
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debugFlags_ = DEBUG_GPU_FLAGS;
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}
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if (!flagIsDefault(GPU_XFER_BUFFER_SIZE)) {
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xferBufSize_ = GPU_XFER_BUFFER_SIZE * Ki;
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}
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if (!flagIsDefault(GPU_USE_SYNC_OBJECTS)) {
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syncObject_ = GPU_USE_SYNC_OBJECTS;
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}
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if (!flagIsDefault(GPU_NUM_COMPUTE_RINGS)) {
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numComputeRings_ = GPU_NUM_COMPUTE_RINGS;
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}
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if (!flagIsDefault(GPU_RESOURCE_CACHE_SIZE)) {
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resourceCacheSize_ = GPU_RESOURCE_CACHE_SIZE * Mi;
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}
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if (!flagIsDefault(AMD_GPU_FORCE_SINGLE_FP_DENORM)) {
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switch (AMD_GPU_FORCE_SINGLE_FP_DENORM) {
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case 0:
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singleFpDenorm_ = false;
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break;
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case 1:
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singleFpDenorm_ = true;
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break;
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default:
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break;
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}
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}
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}
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} // namespace pal
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