Files
rocm-systems/tests/workloads/dev0/mi100/prev_analysis/1202.csv
T
JoseSantosAMD 717a21cf84 Update csv headers, and SystemExit codes
Signed-off-by: JoseSantosAMD <Jose.Santos@amd.com>
2024-02-04 12:44:47 -06:00

524 B

1MetricAvgMinMaxUnit
2Wave Cycles33761.372444701052805.687400817871547941.7736816406Cycles/wave
3LDS_Per_Workgroup Instrs0.00.00.0Instr per wave
4Bandwidth0.00.00.0Bytes per wave
5Bank Conficts/AccessConflicts/access
6Dispatch_ID Accesses0.00.00.0Cycles per wave
7Atomic Cycles0.00.00.0Cycles per wave
8Bank Conflict0.00.00.0Cycles per wave
9Addr Conflict0.00.00.0Cycles per wave
10Unaligned Stall0.00.00.0Cycles per wave
11Mem Violations0.00.00.0per wave
12LDS_Per_Workgroup LatencyCycles