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39fd515cd25d8f5fdddb00186aab4eec5e5b21e1
rocm-systems
/
catch
/
perftests
T
History
Dittakavi, Satyanvesh
94bb129ac1
SWDEV-511852 - Adding performance test for Virtual Memory Management (
#150
)
...
Co-authored-by: idass <
ian.dass@amd.com
>
2025-07-25 12:19:05 +05:30
..
compute
SWDEV-475568 - Fix compiling issues
2024-10-23 11:03:45 -04:00
dispatch
SWDEV-494221 - Remove unnecessary hipEventRecord
2025-01-16 11:45:20 -05:00
event
SWDEV-504650-[catch2][dtest]PerfTest-Reduce the lock scope for hipEventRecord and hipEventQuery (
#158
)
2025-05-12 10:23:07 +05:30
graph
SWDEV-514141 - Fix zero clock rate issues (
#4
)
2025-06-11 21:11:25 +05:30
memory
SWDEV-532640-[catch2][dtest]-Prefetch all arguments and keep 0 hidden args if possible-PerfTest (
#242
)
2025-07-08 15:24:52 +05:30
stream
SWDEV-514141 - Fix zero clock rate issues (
#4
)
2025-06-11 21:11:25 +05:30
vmm
SWDEV-511852 - Adding performance test for Virtual Memory Management (
#150
)
2025-07-25 12:19:05 +05:30
CMakeLists.txt
SWDEV-511852 - Adding performance test for Virtual Memory Management (
#150
)
2025-07-25 12:19:05 +05:30
Dittakavi, Satyanvesh