Laurent Morichetti
526 خطوط
22 KiB
C++
526 خطوط
22 KiB
C++
/* Copyright (c) 2008-present Advanced Micro Devices, Inc.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE. */
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#ifndef GPUVIRTUAL_HPP_
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#define GPUVIRTUAL_HPP_
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#include "device/gpu/gpudefs.hpp"
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#include "device/gpu/gpuconstbuf.hpp"
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#include "device/gpu/gpuprintf.hpp"
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#include "device/gpu/gputimestamp.hpp"
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#include "device/gpu/gpusched.hpp"
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#include "platform/commandqueue.hpp"
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#include "device/blit.hpp"
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#include "device/gpu/gpudebugger.hpp"
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/*! \addtogroup GPU GPU Resource Implementation
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* @{
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*/
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//! GPU Device Implementation
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namespace gpu {
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class Device;
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class Kernel;
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class Memory;
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class CalCounterReference;
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class VirtualGPU;
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class Program;
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class BlitManager;
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class ThreadTrace;
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class HSAILKernel;
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//! Virtual GPU
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class VirtualGPU : public device::VirtualDevice, public CALGSLContext {
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public:
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struct CommandBatch : public amd::HeapObject {
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amd::Command* head_; //!< Command batch head
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GpuEvent events_[AllEngines]; //!< Last known GPU events
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TimeStamp* lastTS_; //!< TS associated with command batch
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//! Constructor
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CommandBatch(amd::Command* head, //!< Command batch head
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const GpuEvent* events, //!< HW events on all engines
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TimeStamp* lastTS //!< Last TS in command batch
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)
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: head_(head), lastTS_(lastTS) {
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memcpy(&events_, events, AllEngines * sizeof(GpuEvent));
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}
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};
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//! The virtual GPU states
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union State {
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struct {
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uint boundGlobal_ : 1; //!< Global buffer was bound
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uint profiling_ : 1; //!< Profiling is enabled
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uint forceWait_ : 1; //!< Forces wait in flush()
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uint boundCb_ : 1; //!< Constant buffer was bound
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uint boundPrintf_ : 1; //!< Printf buffer was bound
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uint hsailKernel_ : 1; //!< True if HSAIL kernel was used
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};
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uint value_;
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State() : value_(0) {}
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};
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//! CAL descriptor for the GPU virtual device
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struct CalVirtualDesc : public amd::EmbeddedObject {
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gslDomain3D gridBlock; //!< size of a block of data
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gslDomain3D gridSize; //!< size of 'blocks' to execute
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gslDomain3D partialGridBlock; //!< Partial grid block
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CALuint localSize; //!< size of OpenCL Local Memory in bytes
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uint memCount_; //!< Memory objects count
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GpuEvent events_[AllEngines]; //!< Last known GPU events
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uint iterations_; //!< Number of iterations for the execution
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TimeStamp* lastTS_; //!< Last timestamp executed on Virtual GPU
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gslMemObject constBuffers_[MaxConstBuffers]; //!< Constant buffer names
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gslMemObject uavs_[MaxUavArguments]; //!< UAV bindings
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gslMemObject readImages_[MaxReadImage]; //!< Read images
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uint32_t samplersState_[MaxSamplers]; //!< State of all samplers
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};
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typedef std::vector<ConstBuffer*> constbufs_t;
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//! GSL descriptor for the GPU kernel, specific to the virtual device
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struct GslKernelDesc : public amd::HeapObject {
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CALimage image_; //!< CAL image for the program
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gslProgramObject func_; //!< GSL program object
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gslMemObject intCb_; //!< Internal constant buffer
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};
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struct ResourceSlot {
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union State {
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struct {
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uint bound_ : 1; //!< Resource is bound
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uint constant_ : 1; //!< Resource is a constant
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};
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uint value_;
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State() : value_(0) {}
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};
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State state_; //!< slot's state
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const Memory* memory_; //!< GPU memory object
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ResourceSlot() : memory_(NULL) {}
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//! Copy constructor for the kernel argument
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ResourceSlot(const ResourceSlot& data) { *this = data; }
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//! Overloads operator=
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ResourceSlot& operator=(const ResourceSlot& data) {
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state_.value_ = data.state_.value_;
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memory_ = data.memory_;
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return *this;
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}
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};
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class MemoryDependency : public amd::EmbeddedObject {
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public:
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//! Default constructor
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MemoryDependency()
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: memObjectsInQueue_(NULL), endMemObjectsInQueue_(0), numMemObjectsInQueue_(0), maxMemObjectsInQueue_(0) {}
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~MemoryDependency() { delete[] memObjectsInQueue_; }
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//! Creates memory dependecy structure
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bool create(size_t numMemObj);
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//! Notify the tracker about new kernel
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void newKernel() { endMemObjectsInQueue_ = numMemObjectsInQueue_; }
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//! Validates memory object on dependency
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void validate(VirtualGPU& gpu, const Memory* memory, bool readOnly);
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//! Clear memory dependency
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void clear(bool all = true);
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private:
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struct MemoryState {
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uint64_t start_; //! Busy memory start address
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uint64_t end_; //! Busy memory end address
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bool readOnly_; //! Current GPU state in the queue
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};
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MemoryState* memObjectsInQueue_; //!< Memory object state in the queue
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size_t endMemObjectsInQueue_; //!< End of mem objects in the queue
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size_t numMemObjectsInQueue_; //!< Number of mem objects in the queue
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size_t maxMemObjectsInQueue_; //!< Maximum number of mem objects in the queue
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};
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class DmaFlushMgmt : public amd::EmbeddedObject {
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public:
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DmaFlushMgmt(const Device& dev);
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// Resets DMA command buffer workload
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void resetCbWorkload(const Device& dev);
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// Finds split size for the current dispatch
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void findSplitSize(const Device& dev, //!< GPU device object
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uint64_t threads, //!< Total number of execution threads
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uint instructions //!< Number of ALU instructions
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);
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// Returns TRUE if DMA command buffer is ready for a flush
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bool isCbReady(VirtualGPU& gpu, //!< Virtual GPU object
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uint64_t threads, //!< Total number of execution threads
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uint instructions //!< Number of ALU instructions
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);
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// Returns dispatch split size
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uint dispatchSplitSize() const { return dispatchSplitSize_; }
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private:
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uint64_t maxDispatchWorkload_; //!< Maximum number of operations for a single dispatch
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uint64_t maxCbWorkload_; //!< Maximum number of operations for DMA command buffer
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uint64_t cbWorkload_; //!< Current number of operations in DMA command buffer
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uint aluCnt_; //!< All ALUs on the chip
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uint dispatchSplitSize_; //!< Dispath split size in elements
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};
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typedef std::vector<ResourceSlot> ResourceSlots;
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public:
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explicit VirtualGPU(Device& device);
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bool create(bool profiling, uint rtCUs = amd::CommandQueue::RealTimeDisabled,
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uint deviceQueueSize = 0,
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amd::CommandQueue::Priority priority = amd::CommandQueue::Priority::Normal);
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~VirtualGPU();
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void submitReadMemory(amd::ReadMemoryCommand& vcmd);
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void submitWriteMemory(amd::WriteMemoryCommand& vcmd);
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void submitCopyMemory(amd::CopyMemoryCommand& vcmd);
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void submitCopyMemoryP2P(amd::CopyMemoryP2PCommand& vcmd) {}
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void submitMapMemory(amd::MapMemoryCommand& vcmd);
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void submitUnmapMemory(amd::UnmapMemoryCommand& vcmd);
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void submitKernel(amd::NDRangeKernelCommand& vcmd);
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bool submitKernelInternal(
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const amd::NDRangeContainer& sizes, //!< Workload sizes
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const amd::Kernel& kernel, //!< Kernel for execution
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const_address parameters, //!< Parameters for the kernel
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bool nativeMem = true, //!< Native memory objects
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amd::Event* enqueueEvent = NULL //!< Event provided in the enqueue kernel command
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);
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bool submitKernelInternalHSA(
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const amd::NDRangeContainer& sizes, //!< Workload sizes
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const amd::Kernel& kernel, //!< Kernel for execution
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const_address parameters, //!< Parameters for the kernel
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bool nativeMem = true, //!< Native memory objects
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amd::Event* enqueueEvent = NULL //!< Event provided in the enqueue kernel command
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);
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void submitNativeFn(amd::NativeFnCommand& vcmd);
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void submitFillMemory(amd::FillMemoryCommand& vcmd);
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void submitMigrateMemObjects(amd::MigrateMemObjectsCommand& cmd);
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void submitMarker(amd::Marker& vcmd);
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void submitAcquireExtObjects(amd::AcquireExtObjectsCommand& vcmd);
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void submitReleaseExtObjects(amd::ReleaseExtObjectsCommand& vcmd);
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void submitPerfCounter(amd::PerfCounterCommand& vcmd);
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void submitThreadTraceMemObjects(amd::ThreadTraceMemObjectsCommand& cmd);
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void submitThreadTrace(amd::ThreadTraceCommand& vcmd);
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void submitSignal(amd::SignalCommand& vcmd);
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void submitMakeBuffersResident(amd::MakeBuffersResidentCommand& vcmd);
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virtual void submitSvmFreeMemory(amd::SvmFreeMemoryCommand& cmd);
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virtual void submitSvmCopyMemory(amd::SvmCopyMemoryCommand& cmd);
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virtual void submitSvmFillMemory(amd::SvmFillMemoryCommand& cmd);
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virtual void submitSvmMapMemory(amd::SvmMapMemoryCommand& cmd);
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virtual void submitSvmUnmapMemory(amd::SvmUnmapMemoryCommand& cmd);
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virtual void submitTransferBufferFromFile(amd::TransferBufferFileCommand& cmd);
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void releaseMemory(gslMemObject gslResource, bool wait = true);
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void releaseKernel(CALimage calImage);
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void flush(amd::Command* list = NULL, bool wait = false);
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bool terminate() { return true; }
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//! Returns GPU device object associated with this kernel
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const Device& dev() const { return gpuDevice_; }
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//! Returns CAL descriptor of the virtual device
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const CalVirtualDesc* cal() const { return &cal_; }
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//! Returns active kernel descriptor for this virtual device
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const GslKernelDesc* gslKernelDesc() const { return activeKernelDesc_; }
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//! Returns a GPU event, associated with GPU memory
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GpuEvent* getGpuEvent(const gslMemObject gslMem //!< GSL mem object
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) {
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return &gpuEvents_[gslMem];
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}
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//! Assigns a GPU event, associated with GPU memory
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void assignGpuEvent(const gslMemObject gslMem, //!< GSL mem object
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GpuEvent gpuEvent) {
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gpuEvents_[gslMem] = gpuEvent;
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}
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//! Set the kernel as active
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bool setActiveKernelDesc(const amd::NDRangeContainer& sizes, //!< kernel execution work sizes
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const Kernel* kernel //!< GPU kernel object
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);
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//! Set the last known GPU event
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void setGpuEvent(GpuEvent gpuEvent, //!< GPU event for tracking
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bool flush = false //!< TRUE if flush is required
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);
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//! Flush DMA buffer on the specified engine
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void flushDMA(uint engineID //!< Engine ID for DMA flush
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);
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//! Wait for all engines on this Virtual GPU
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//! Returns TRUE if CPU didn't wait for GPU
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bool waitAllEngines(CommandBatch* cb = NULL //!< Command batch
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);
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//! Waits for the latest GPU event with a lock to prevent multiple entries
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void waitEventLock(CommandBatch* cb //!< Command batch
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);
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//! Returns a resource associated with the constant buffer
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const ConstBuffer* cb(uint idx) const { return constBufs_[idx]; }
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//! Adds CAL objects into the constant buffer vector
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void addConstBuffer(ConstBuffer* cb) { constBufs_.push_back(cb); }
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constbufs_t constBufs_; //!< constant buffers
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//! Start the command profiling
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void profilingBegin(amd::Command& command, //!< Command queue object
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bool drmProfiling = false //!< Measure DRM time
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);
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//! End the command profiling
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void profilingEnd(amd::Command& command);
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//! Collect the profiling results
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bool profilingCollectResults(CommandBatch* cb, //!< Command batch
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const amd::Event* waitingEvent //!< Waiting event
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);
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//! Adds a memory handle into the GSL memory array for Virtual Heap
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bool addVmMemory(const Memory* memory //!< GPU memory object
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);
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//! Adds a stage write buffer into a list
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void addXferWrite(Memory& memory);
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//! Adds a pinned memory object into a map
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void addPinnedMem(amd::Memory* mem);
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//! Release pinned memory objects
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void releasePinnedMem();
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//! Finds if pinned memory is cached
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amd::Memory* findPinnedMem(void* addr, size_t size);
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//! Returns gsl memory object for VM
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const gslMemObject* vmMems() const { return vmMems_; }
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//! Get the PrintfDbg object
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PrintfDbg& printfDbg() const { return *printfDbg_; }
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//! Get the PrintfDbgHSA object
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PrintfDbgHSA& printfDbgHSA() const { return *printfDbgHSA_; }
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//! Enables synchronized transfers
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void enableSyncedBlit() const;
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//! Checks if profiling is enabled
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bool profiling() const { return state_.profiling_; }
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//! Returns memory dependency class
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MemoryDependency& memoryDependency() { return memoryDependency_; }
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//! Returns hsaQueueMem_
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const Memory* hsaQueueMem() const { return hsaQueueMem_; }
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//! Returns DMA flush management structure
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const DmaFlushMgmt& dmaFlushMgmt() const { return dmaFlushMgmt_; }
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//! Releases GSL memory objects allocated on this queue
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void releaseMemObjects(bool scratch = true);
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//! Returns the HW ring used on this virtual device
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uint hwRing() const { return hwRing_; }
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//! Returns current timestamp object for profiling
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TimeStamp* currTs() const { return cal_.lastTS_; }
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//! Returns virtual queue object for device enqueuing
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Memory* vQueue() const { return virtualQueue_; }
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//! Update virtual queue header
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void writeVQueueHeader(VirtualGPU& hostQ, uint64_t kernelTable);
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//! Returns TRUE if virtual queue was successfully allocatted
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bool createVirtualQueue(uint deviceQueueSize //!< Device queue size
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);
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EngineType engineID_; //!< Engine ID for this VirtualGPU
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ResourceSlots slots_; //!< Resource slots for kernel arguments
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State state_; //!< virtual GPU current state
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CalVirtualDesc cal_; //!< CAL virtual device descriptor
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void flushCuCaches(HwDbgGpuCacheMask cache_mask); //!< flush/invalidate SQ cache
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protected:
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virtual void profileEvent(EngineType engine, bool type) const;
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//! Creates buffer object from image
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amd::Memory* createBufferFromImage(
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amd::Memory& amdImage //! The parent image object(untiled images only)
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);
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private:
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typedef std::unordered_map<CALimage, GslKernelDesc*> GslKernels;
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typedef std::unordered_map<gslMemObject, GpuEvent> GpuEvents;
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//! Finds total amount of necessary iterations
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inline void findIterations(const amd::NDRangeContainer& sizes, //!< Original workload sizes
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const amd::NDRange& local, //!< Local workgroup size
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amd::NDRange& groups, //!< Calculated workgroup sizes
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amd::NDRange& remainder, //!< Calculated remainder sizes
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size_t& extra //!< Amount of extra executions for remainder
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);
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//! Setups workloads for the current iteration
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inline void setupIteration(
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uint iteration, //!< Current iteration
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const amd::NDRangeContainer& sizes, //!< Original workload sizes
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Kernel& gpuKernel, //!< GPU kernel
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amd::NDRange& global, //!< Global size for the current iteration
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amd::NDRange& offsets, //!< Offsets for the current iteration
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amd::NDRange& local, //!< Local sizes for the current iteration
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amd::NDRange& groups, //!< Group sizes for the current iteration
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amd::NDRange& groupOffset, //!< Group offsets for the current iteration
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amd::NDRange& divider, //!< Group divider
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amd::NDRange& remainder, //!< Remain workload
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size_t extra //!< Extra groups
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);
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//! Allocates constant buffers
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bool allocConstantBuffers();
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//! Allocates CAL kernel descriptor of the virtual device
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GslKernelDesc* allocKernelDesc(const Kernel* kernel, //!< Kernel object
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CALimage calImage); //!< CAL image
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//! Frees CAL kernel descriptor of the virtual device
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void freeKernelDesc(GslKernelDesc* desc);
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bool gslOpen(uint nEngines, gslEngineDescriptor* engines, uint32_t rtCUs);
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void gslDestroy();
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//! Releases stage write buffers
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void releaseXferWrite();
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//! Allocate hsaQueueMem_
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bool allocHsaQueueMem();
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//! Awaits a command batch with a waiting event
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bool awaitCompletion(CommandBatch* cb, //!< Command batch for to wait
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const amd::Event* waitingEvent = NULL //!< A waiting event
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);
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//! Validates the scratch buffer memory for a specified kernel
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void validateScratchBuffer(const Kernel* kernel //!< Kernel for validaiton
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);
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//! Detects memory dependency for HSAIL kernels and flushes caches
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bool processMemObjectsHSA(const amd::Kernel& kernel, //!< AMD kernel object for execution
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const_address params, //!< Pointer to the param's store
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bool nativeMem, //!< Native memory objects
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std::vector<const Memory*>* memList //!< Memory list for KMD tracking
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);
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//! Common function for fill memory used by both svm Fill and non-svm fill
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bool fillMemory(cl_command_type type, //!< the command type
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amd::Memory* amdMemory, //!< memory object to fill
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const void* pattern, //!< pattern to fill the memory
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size_t patternSize, //!< pattern size
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const amd::Coord3D& origin, //!< memory origin
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const amd::Coord3D& size //!< memory size for filling
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);
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bool copyMemory(cl_command_type type, //!< the command type
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amd::Memory& srcMem, //!< source memory object
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amd::Memory& dstMem, //!< destination memory object
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bool entire, //!< flag of entire memory copy
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const amd::Coord3D& srcOrigin, //!< source memory origin
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const amd::Coord3D& dstOrigin, //!< destination memory object
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const amd::Coord3D& size, //!< copy size
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const amd::BufferRect& srcRect, //!< region of source for copy
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const amd::BufferRect& dstRect //!< region of destination for copy
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);
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void buildKernelInfo(const HSAILKernel& hsaKernel, //!< hsa kernel
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hsa_kernel_dispatch_packet_t* aqlPkt, //!< aql packet for dispatch
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HwDbgKernelInfo& kernelInfo, //!< kernel info for the dispatch
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amd::Event* enqueueEvent //!< Event provided in the enqueue kernel command
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);
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void assignDebugTrapHandler(const DebugToolInfo& dbgSetting, //!< debug settings
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HwDbgKernelInfo& kernelInfo //!< kernel info for the dispatch
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);
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GslKernels gslKernels_; //!< GSL kernel descriptors
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GslKernelDesc* activeKernelDesc_; //!< active GSL kernel descriptors
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GpuEvents gpuEvents_; //!< GPU events
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Device& gpuDevice_; //!< physical GPU device
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PrintfDbg* printfDbg_; //!< GPU printf implemenation
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PrintfDbgHSA* printfDbgHSA_; //!< HSAIL printf implemenation
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TimeStampCache* tsCache_; //!< TimeStamp cache
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MemoryDependency memoryDependency_; //!< Memory dependency class
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gslMemObject* vmMems_; //!< Array of GSL memories for VM mode
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uint numVmMems_; //!< Number of entries in VM mem array
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DmaFlushMgmt dmaFlushMgmt_; //!< DMA flush management
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std::list<Memory*> xferWriteBuffers_; //!< Stage write buffers
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std::list<amd::Memory*> pinnedMems_; //!< Pinned memory list
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typedef std::list<CommandBatch*> CommandBatchList;
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CommandBatchList cbList_; //!< List of command batches
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uint hwRing_; //!< HW ring used on this virtual device
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uint64_t readjustTimeGPU_; //!< Readjust time between GPU and CPU timestamps
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TimeStamp* currTs_; //!< current timestamp for command
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AmdVQueueHeader* vqHeader_; //!< Sysmem copy for virtual queue header
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Memory* virtualQueue_; //!< Virtual device queue
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Memory* schedParams_; //!< The scheduler parameters
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uint schedParamIdx_; //!< Index in the scheduler parameters buffer
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uint deviceQueueSize_; //!< Device queue size
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uint maskGroups_; //!< The number of mask groups processed in the scheduler by one thread
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Memory* hsaQueueMem_; //!< Memory for the amd_queue_t object
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bool profileEnabled_; //!< Profiling is enabled
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};
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/*@}*/} // namespace gpu
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#endif /*GPUVIRTUAL_HPP_*/
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