b4c6143a2f
Change-Id: Ia4f9ff0f5f873b4223a8cca154188bb0d2f1abba
274 wiersze
10 KiB
C++
274 wiersze
10 KiB
C++
/* Copyright (c) 2015-present Advanced Micro Devices, Inc.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE. */
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#pragma once
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#include "top.hpp"
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#include "thread/atomic.hpp"
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#include "device/pal/palresource.hpp"
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#include <map>
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/*! \addtogroup GPU
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* @{
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*/
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namespace device {
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class Memory;
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}
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//! PAL Device Implementation
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namespace pal {
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class Device;
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class Heap;
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class Resource;
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class Memory;
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class VirtualGPU;
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//! GPU memory object.
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// Wrapper that can contain a heap block or an interop buffer/image.
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class Memory : public device::Memory, public Resource {
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public:
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//! Constructor (with owner)
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Memory(const Device& gpuDev, //!< GPU device object
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amd::Memory& owner, //!< Abstraction layer memory object
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size_t size //!< Memory size for allocation
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);
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//! Constructor (nonfat version for local scratch mem use without heap block)
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Memory(const Device& gpuDev, //!< GPU device object
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size_t size //!< Memory size for allocation
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);
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//! Constructor memory for images (without global heap allocation)
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Memory(const Device& gpuDev, //!< GPU device object
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amd::Memory& owner, //!< Abstraction layer memory object
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size_t width, //!< Allocated memory width
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size_t height, //!< Allocated memory height
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size_t depth, //!< Allocated memory depth
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cl_image_format format, //!< Memory format
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cl_mem_object_type imageType, //!< CL image type
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uint mipLevels //!< The number of mip levels
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);
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//! Constructor memory for images (without global heap allocation)
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Memory(const Device& gpuDev, //!< GPU device object
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size_t size, //!< Memory object size
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size_t width, //!< Allocated memory width
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size_t height, //!< Allocated memory height
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size_t depth, //!< Allocated memory depth
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cl_image_format format, //!< Memory format
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cl_mem_object_type imageType, //!< CL image type
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uint mipLevels //!< The number of mip levels
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);
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//! Default destructor
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virtual ~Memory();
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//! Creates the interop memory
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bool createInterop();
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//! Overloads the resource create method
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virtual bool create(Resource::MemoryType memType, //!< Memory type
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Resource::CreateParams* params = nullptr, //!< Prameters for create
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bool forceLinear = false //!< Forces linear tiling for images
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);
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//! Allocate memory for API-level maps
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virtual void* allocMapTarget(const amd::Coord3D& origin, //!< The map location in memory
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const amd::Coord3D& region, //!< The map region in memory
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uint mapFlags, //!< Map flags
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size_t* rowPitch = NULL, //!< Row pitch for the mapped memory
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size_t* slicePitch = NULL //!< Slice for the mapped memory
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);
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//! Pins system memory associated with this memory object
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virtual bool pinSystemMemory(void* hostPtr, //!< System memory address
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size_t size //!< Size of allocated system memory
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);
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//! Releases indirect map surface
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virtual void releaseIndirectMap() { decIndMapCount(); }
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//! Map the device memory to CPU visible
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virtual void* cpuMap(device::VirtualDevice& vDev, //!< Virtual device for map operaiton
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uint flags = 0, //!< flags for the map operation
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// Optimization for multilayer map/unmap
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uint startLayer = 0, //!< Start layer for multilayer map
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uint numLayers = 0, //!< End layer for multilayer map
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size_t* rowPitch = NULL, //!< Row pitch for the device memory
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size_t* slicePitch = NULL //!< Slice pitch for the device memory
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);
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//! Unmap the device memory
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virtual void cpuUnmap(device::VirtualDevice& vDev //!< Virtual device for unmap operaiton
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);
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//! Updates device memory from the owner's host allocation
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void syncCacheFromHost(VirtualGPU& gpu, //!< Virtual GPU device object
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//! Synchronization flags
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device::Memory::SyncFlags syncFlags = device::Memory::SyncFlags());
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//! Updates the owner's host allocation from device memory
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virtual void syncHostFromCache(
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//! Synchronization flags
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device::Memory::SyncFlags syncFlags = device::Memory::SyncFlags());
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//! Creates a view from current resource
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virtual Memory* createBufferView(
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amd::Memory& subBufferOwner //!< The abstraction layer subbuf owner
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);
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virtual uint64_t virtualAddress() const override { return vmAddress(); }
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virtual const address cpuSrd() const {
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return reinterpret_cast<const address>(const_cast<void*>(hwState()));
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}
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//! Allocates host memory for synchronization with MGPU context
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void mgpuCacheWriteBack();
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//! Accessors for indirect map memory object
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Memory* mapMemory() const;
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// Decompress GL depth-stencil/MSAA resources for CL access
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// Invalidates any FBOs the resource may be bound to, otherwise the GL driver may crash.
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virtual bool processGLResource(GLResourceOP operation);
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//! Returns the interop resource for this memory object
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const Memory* parent() const { return parent_; }
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//! Returns TRUE if direct map is acceaptable. The method detects
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//! forced USWC memory on APU and will cause a switch to
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//! indirect map for allocations with a possibility of host read
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bool isDirectMap() {
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return (isCacheable() || !isHostMemDirectAccess() ||
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(owner()->getMemFlags() &
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(CL_MEM_ALLOC_HOST_PTR | CL_MEM_HOST_WRITE_ONLY | CL_MEM_READ_ONLY)));
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}
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//! Quick view update for managed buffers. It should avoid expensive object allocations
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void updateView(Resource* view, size_t offset, size_t size) {
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size_ = size;
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flags_ |= HostMemoryDirectAccess;
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Resource::updateView(view, offset, size);
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}
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//! Check if memory object requires cache coherency sync
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bool isChacheCoherencySync() const {
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return (!isHostMemDirectAccess() && (memoryType() != P2PAccess));
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}
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protected:
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//! Decrement map count
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void decIndMapCount();
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//! Validates allocated memory for possible workarounds
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virtual bool ValidateMemory(Resource::MemoryType memType) { return true; }
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private:
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//! Disable copy constructor
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Memory(const Memory&);
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//! Disable operator=
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Memory& operator=(const Memory&);
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Memory* pinnedMemory_; //!< Memory used as pinned system memory
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const Memory* parent_; //!< Parent memory object
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};
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class Buffer : public pal::Memory {
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public:
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//! Buffer constructor
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Buffer(const Device& gpuDev, //!< GPU device object
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amd::Memory& owner, //!< Abstraction layer memory object
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size_t size //!< Buffer size
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)
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: pal::Memory(gpuDev, owner, size) {}
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//! Creates a view from current resource
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virtual Memory* createBufferView(
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amd::Memory& subBufferOwner //!< The abstraction layer subbuf owner
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) const;
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private:
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//! Disable copy constructor
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Buffer(const Buffer&);
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//! Disable operator=
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Buffer& operator=(const Buffer&);
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};
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class Image : public pal::Memory {
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public:
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//! Image constructor
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Image(const Device& gpuDev, //!< GPU device object
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amd::Memory& owner, //!< Abstraction layer memory object
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size_t width, //!< Allocated memory width
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size_t height, //!< Allocated memory height
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size_t depth, //!< Allocated memory depth
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cl_image_format format, //!< Memory format
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cl_mem_object_type imageType, //!< CL image type
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uint mipLevels //!< The number of mip levels
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)
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: pal::Memory(gpuDev, owner, width, height, depth, format, imageType, mipLevels),
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copyImageBuffer_(nullptr) {}
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//! Image constructor
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Image(const Device& gpuDev, //!< GPU device object
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size_t size, //!< Memory size
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size_t width, //!< Allocated memory width
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size_t height, //!< Allocated memory height
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size_t depth, //!< Allocated memory depth
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cl_image_format format, //!< Memory format
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cl_mem_object_type imageType, //!< CL image type
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uint mipLevels //!< The number of mip levels
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)
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: pal::Memory(gpuDev, size, width, height, depth, format, imageType, mipLevels),
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copyImageBuffer_(nullptr) {}
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virtual ~Image() { delete copyImageBuffer_; }
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//! Allocate memory for API-level maps
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virtual void* allocMapTarget(const amd::Coord3D& origin, //!< The map location in memory
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const amd::Coord3D& region, //!< The map region in memory
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uint mapFlags, //!< Map flags
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size_t* rowPitch = NULL, //!< Row pitch for the mapped memory
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size_t* slicePitch = NULL //!< Slice for the mapped memory
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);
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virtual uint64_t virtualAddress() const override { return hwSrd(); }
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Image* CopyImageBuffer() const { return copyImageBuffer_; }
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//! Validates allocated memory for possible workarounds
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bool ValidateMemory(Resource::MemoryType memType) final;
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private:
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//! Disable copy constructor
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Image(const Image&);
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//! Disable operator=
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Image& operator=(const Image&);
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Image* copyImageBuffer_;
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};
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} // namespace pal
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