Yong Zhao
6df62c78b8
The code is a snapshot up to this commit around July 31 2018. commit b00fadff36a3 Author: xinhui pan <xinhui.pan@amd.com> Date: Mon Jul 30 09:53:03 2018 +0800 kfdtest: skip MMapLarge test on apu Change-Id: I40e9a5a18e5c8f075e5290bb80532f1a3f689058 Signed-off-by: Yong Zhao <yong.zhao@amd.com>
130 řádky
4.3 KiB
C
130 řádky
4.3 KiB
C
/*
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* Copyright (C) 2012-2018 Advanced Micro Devices, Inc. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __PM4_PKT_STRUCT_CI_H__
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#define __PM4_PKT_STRUCT_CI_H__
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enum WRITE_DATA_CI_atc_enum { atc_write_data_NOT_USE_ATC_0 = 0, atc_write_data_USE_ATC_1 = 1 };
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enum WRITE_DATA_CI_engine_sel { engine_sel_write_data_ci_MICRO_ENGINE_0 = 0, engine_sel_write_data_ci_PREFETCH_PARSER_1 = 1, engine_sel_write_data_ci_CONST_ENG_2 = 2 };
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typedef struct _PM4WRITE_DATA_CI {
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union {
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PM4_TYPE_3_HEADER header;
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unsigned int ordinal1;
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};
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union {
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struct {
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unsigned int reserved1:8;
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MEC_WRITE_DATA_dst_sel_enum dst_sel:4;
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unsigned int reserved2:4;
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MEC_WRITE_DATA_addr_incr_enum addr_incr:1;
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unsigned int reserved3:3;
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MEC_WRITE_DATA_wr_confirm_enum wr_confirm:1;
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unsigned int reserved4:3;
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WRITE_DATA_CI_atc_enum atc:1;
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MEC_WRITE_DATA_cache_policy_enum cache_policy:2;
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unsigned int volatile_setting:1;
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unsigned int reserved5:2;
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WRITE_DATA_CI_engine_sel engine_sel:2;
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} bitfields2;
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unsigned int ordinal2;
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};
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unsigned int dst_addr_lo;
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unsigned int dst_address_hi;
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unsigned int data[1]; // 1..N of these fields
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} PM4WRITE_DATA_CI, *PPM4WRITE_DATA_CI;
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enum MEC_RELEASE_MEM_CI_atc_enum { atc_mec_release_mem_ci_NOT_USE_ATC_0 = 0, atc_mec_release_mem_ci_USE_ATC_1 = 1 };
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typedef struct _PM4_RELEASE_MEM_CI {
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union {
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PM4_TYPE_3_HEADER header;
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unsigned int ordinal1;
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};
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union {
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struct {
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unsigned int event_type:6;
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unsigned int reserved1:2;
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MEC_RELEASE_MEM_event_index_enum event_index:4;
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unsigned int l1_vol:1;
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unsigned int l2_vol:1;
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unsigned int reserved:1;
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unsigned int l2_wb:1;
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unsigned int l1_inv:1;
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unsigned int l2_inv:1;
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unsigned int reserved2:6;
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MEC_RELEASE_MEM_CI_atc_enum atc:1;
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MEC_RELEASE_MEM_cache_policy_enum cache_policy:2;
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unsigned int volatile_setting:1;
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unsigned int reserved3:4;
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} bitfields2;
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unsigned int ordinal2;
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};
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union {
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struct {
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unsigned int reserved4:16;
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MEC_RELEASE_MEM_dst_sel_enum dst_sel:2;
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unsigned int reserved5:6;
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MEC_RELEASE_MEM_int_sel_enum int_sel:3;
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unsigned int reserved6:2;
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MEC_RELEASE_MEM_data_sel_enum data_sel:3;
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} bitfields3;
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unsigned int ordinal3;
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};
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union {
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struct {
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unsigned int reserved7:2;
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unsigned int address_lo_dword_aligned:30;
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} bitfields4a;
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struct {
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unsigned int reserved8:3;
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unsigned int address_lo_qword_aligned:29;
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} bitfields4b;
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unsigned int ordinal4;
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};
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unsigned int addr_hi;
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union {
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unsigned int data_lo;
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struct {
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unsigned int offset:16;
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unsigned int num_dwords:16;
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} bitfields5b;
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unsigned int ordinal6;
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};
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unsigned int data_hi;
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} PM4_RELEASE_MEM_CI, *PPM4_RELEASE_MEM_CI;
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#endif // __PM4_PKT_STRUCT_CI_H__
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