943c42f58f
Change-Id: I8d806ef09eca4300fcec0ce6a226d13547dfb728 Signed-off-by: Dalibor Stanisavljevic <Dalibor.Stanisavljevic@amd.com>
140 lines
4.6 KiB
C++
140 lines
4.6 KiB
C++
/*
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* =============================================================================
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* The University of Illinois/NCSA
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* Open Source License (NCSA)
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*
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* Copyright (c) 2022, Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Developed by:
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*
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* AMD Research and AMD ROC Software Development
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*
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* Advanced Micro Devices, Inc.
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*
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* www.amd.com
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal with the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimers.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimers in
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* the documentation and/or other materials provided with the distribution.
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* - Neither the names of <Name of Development Group, Name of Institution>,
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* nor the names of its contributors may be used to endorse or promote
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* products derived from this Software without specific prior written
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* permission.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS WITH THE SOFTWARE.
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*
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*/
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#include <functional>
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#include "amd_smi/impl/amd_smi_gpu_device.h"
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namespace amd {
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namespace smi {
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uint32_t AMDSmiGPUDevice::get_gpu_id() const {
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return gpu_id_;
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}
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uint32_t AMDSmiGPUDevice::get_gpu_fd() const {
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return fd_;
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}
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std::string& AMDSmiGPUDevice::get_gpu_path() {
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return path_;
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}
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amdsmi_bdf_t AMDSmiGPUDevice::get_bdf() {
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return bdf_;
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}
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uint32_t AMDSmiGPUDevice::get_vendor_id() {
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return vendor_id_;
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}
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amdsmi_status_t AMDSmiGPUDevice::get_drm_data() {
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amdsmi_status_t ret;
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uint32_t fd = 0;
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std::string path;
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amdsmi_bdf_t bdf;
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ret = drm_.get_drm_fd_by_index(gpu_id_, &fd);
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if (ret != AMDSMI_STATUS_SUCCESS) return AMDSMI_STATUS_NOT_SUPPORTED;
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ret = drm_.get_drm_path_by_index(gpu_id_, &path);
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if (ret != AMDSMI_STATUS_SUCCESS) return AMDSMI_STATUS_NOT_SUPPORTED;
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ret = drm_.get_bdf_by_index(gpu_id_, &bdf);
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if (ret != AMDSMI_STATUS_SUCCESS) return AMDSMI_STATUS_NOT_SUPPORTED;
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mutex_ = shared_mutex_init(path.c_str(), 0777);
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if (mutex_.ptr == nullptr) {
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printf("Failed to create shared mem. mutex.");
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return AMDSMI_STATUS_INIT_ERROR;
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}
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bdf_ = bdf, path_ = path, fd_ = fd;
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vendor_id_ = drm_.get_vendor_id();
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return AMDSMI_STATUS_SUCCESS;
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}
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pthread_mutex_t* AMDSmiGPUDevice::get_mutex() {
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return mutex_.ptr;
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}
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amdsmi_status_t AMDSmiGPUDevice::amdgpu_query_info(unsigned info_id,
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unsigned size, void *value) const {
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amdsmi_status_t ret;
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uint32_t fd = 0;
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ret = drm_.get_drm_fd_by_index(gpu_id_, &fd);
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if (ret != AMDSMI_STATUS_SUCCESS) return AMDSMI_STATUS_NOT_SUPPORTED;
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return drm_.amdgpu_query_info(fd, info_id, size, value);
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}
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amdsmi_status_t AMDSmiGPUDevice::amdgpu_query_hw_ip(unsigned info_id,
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unsigned hw_ip_type, unsigned size, void *value) const {
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amdsmi_status_t ret;
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uint32_t fd = 0;
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ret = drm_.get_drm_fd_by_index(gpu_id_, &fd);
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if (ret != AMDSMI_STATUS_SUCCESS) return AMDSMI_STATUS_NOT_SUPPORTED;
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return drm_.amdgpu_query_hw_ip(fd, info_id, hw_ip_type, size, value);
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}
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amdsmi_status_t AMDSmiGPUDevice::amdgpu_query_fw(unsigned info_id,
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unsigned fw_type, unsigned size, void *value) const {
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amdsmi_status_t ret;
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uint32_t fd = 0;
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ret = drm_.get_drm_fd_by_index(gpu_id_, &fd);
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if (ret != AMDSMI_STATUS_SUCCESS) return AMDSMI_STATUS_NOT_SUPPORTED;
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return drm_.amdgpu_query_fw(fd, info_id, fw_type, size, value);
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}
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amdsmi_status_t AMDSmiGPUDevice::amdgpu_query_vbios(void *info) const {
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amdsmi_status_t ret;
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uint32_t fd = 0;
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ret = drm_.get_drm_fd_by_index(gpu_id_, &fd);
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if (ret != AMDSMI_STATUS_SUCCESS) return AMDSMI_STATUS_NOT_SUPPORTED;;
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return drm_.amdgpu_query_vbios(fd, info);
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}
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} // namespace smi
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} // namespace amd
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