David Addison
81 regels
2.9 KiB
Makefile
81 regels
2.9 KiB
Makefile
#
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# Copyright (c) 2015-2025, NVIDIA CORPORATION. All rights reserved.
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#
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# See LICENSE.txt for license information
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#
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CUDA_HOME ?= /usr/local/cuda
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PREFIX ?= /usr/local
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VERBOSE ?= 0
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DEBUG ?= 0
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CUDA_LIB ?= $(CUDA_HOME)/lib64
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CUDA_INC ?= $(CUDA_HOME)/include
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NVCC ?= $(CUDA_HOME)/bin/nvcc
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CUDARTLIB ?= cudart
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CUDA_VERSION = $(strip $(shell which $(NVCC) >/dev/null && $(NVCC) --version | grep release | sed 's/.*release //' | sed 's/\,.*//'))
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CUDA_MAJOR = $(shell echo $(CUDA_VERSION) | cut -d "." -f 1)
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CUDA_MINOR = $(shell echo $(CUDA_VERSION) | cut -d "." -f 2)
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# Better define NVCC_GENCODE in your environment to the minimal set
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# of archs to reduce compile time.
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ifeq ($(shell test "0$(CUDA_MAJOR)" -ge 13; echo $$?),0)
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# Add Blackwell but drop Pascal & Volta support if we're using CUDA13.0 or above
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NVCC_GENCODE ?= -gencode=arch=compute_75,code=sm_75 \
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-gencode=arch=compute_80,code=sm_80 \
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-gencode=arch=compute_90,code=sm_90 \
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-gencode=arch=compute_100,code=sm_100 \
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-gencode=arch=compute_120,code=sm_120 \
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-gencode=arch=compute_120,code=compute_120
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else ifeq ($(shell test "0$(CUDA_MAJOR)" -eq 12 -a "0$(CUDA_MINOR)" -ge 8; echo $$?),0)
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# Include Blackwell support if we're using CUDA12.8 or above
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NVCC_GENCODE ?= -gencode=arch=compute_60,code=sm_60 \
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-gencode=arch=compute_61,code=sm_61 \
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-gencode=arch=compute_70,code=sm_70 \
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-gencode=arch=compute_80,code=sm_80 \
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-gencode=arch=compute_90,code=sm_90 \
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-gencode=arch=compute_100,code=sm_100 \
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-gencode=arch=compute_120,code=sm_120 \
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-gencode=arch=compute_120,code=compute_120
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else ifeq ($(shell test "0$(CUDA_MAJOR)" -ge 12; echo $$?),0)
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NVCC_GENCODE ?= -gencode=arch=compute_60,code=sm_60 \
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-gencode=arch=compute_61,code=sm_61 \
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-gencode=arch=compute_70,code=sm_70 \
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-gencode=arch=compute_80,code=sm_80 \
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-gencode=arch=compute_90,code=sm_90 \
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-gencode=arch=compute_90,code=compute_90
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else ifeq ($(shell test "0$(CUDA_MAJOR)" -ge 11; echo $$?),0)
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NVCC_GENCODE ?= -gencode=arch=compute_60,code=sm_60 \
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-gencode=arch=compute_61,code=sm_61 \
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-gencode=arch=compute_70,code=sm_70 \
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-gencode=arch=compute_80,code=sm_80 \
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-gencode=arch=compute_80,code=compute_80
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else
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NVCC_GENCODE ?= -gencode=arch=compute_35,code=sm_35 \
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-gencode=arch=compute_50,code=sm_50 \
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-gencode=arch=compute_60,code=sm_60 \
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-gencode=arch=compute_61,code=sm_61 \
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-gencode=arch=compute_70,code=sm_70 \
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-gencode=arch=compute_70,code=compute_70
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endif
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NVCUFLAGS := -ccbin $(CXX) $(NVCC_GENCODE) -std=c++11
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CXXFLAGS := -std=c++11
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LDFLAGS := -L${CUDA_LIB} -lcudart -lrt
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NVLDFLAGS := -L${CUDA_LIB} -l${CUDARTLIB} -lrt
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ifeq ($(DEBUG), 0)
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NVCUFLAGS += -O3 -g
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CXXFLAGS += -O3 -g
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else
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NVCUFLAGS += -O0 -G -g
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CXXFLAGS += -O0 -g -ggdb3
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endif
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ifneq ($(VERBOSE), 0)
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NVCUFLAGS += -Xcompiler -Wall,-Wextra,-Wno-unused-parameter
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else
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.SILENT:
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endif
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