5bc35a7eb6
* Add environment variable configuration infrastructure
- Namespace rocshmem::envvar
- Track all config env vars in per-category lists
- Remove duplicates from list of allowed env var types
- Reject negative inputs for unsigned integer types
- Accept empty strings for std::string
- Print error source location using C++20 std::source_location
- Unit tests
* Port environment variables
- ROCSHMEM_UNIQUEID_WITH_MPI
- ROCSHMEM_RO_DISABLE_IPC
- ROCSHMEM_BOOTSTRAP_TIMEOUT
- ROCSHMEM_BOOTSTRAP_HOSTID
- ROCSHMEM_BOOTSTRAP_SOCKET_IFNAME
- ROCSHMEM_RO_PROGRESS_DELAY
- ROCSHMEM_BOOTSTRAP_SOCKET_FAMILY
- ROCSHMEM_MAX_NUM_CONTEXTS
+ Merge the independent per-backend copies into a single variable
that is used by all three backends (IPC, RO, GDA).
+ Set default to 32 (for GDA); prior default for IPC and RO was 1024.
- ROCSHMEM_MAX_NUM_HOST_CONTEXTS
- ROCSHMEM_MAX_WF_BUFFERS
- ROCSHMEM_SQ_SIZE
- ROCSHMEM_RO_NET_CPU_QUEUE
+ Renamed from RO_NET_CPU_QUEUE
+ Change env var input type to bool, default to false
+ Invert code logic: setting RO_NET_CPU_QUEUE to anything
would /disable/ a variable gpu_queue, which defaulted to true.
Variable is now named config::ro::net_cpu_queue,
with all prior checks for gpu_queue inverted.
- ROCSHMEM_USE_IB_HCA
- ROCSHMEM_HEAP_SIZE
+ Defaults to 1L << 30 i.e. 1 GiB,
from default heap size in memory/heap_memory.hpp.
- ROCSHMEM_MAX_NUM_TEAMS
+ Unlike other env vars, this can be referenced from devices.
+ Function currently narrows from size_t to int: uses need to be audited
for safety and correctness in using size_t directly.
- ROCSHMEM_GDA_ALTERNATE_QP_PORTS
* New env var ROCSHMEM_DEBUG
- Debug levels:
+ NONE
+ VERSION
+ WARN
+ INFO
+ TRACE
- Currently unused - will be added later
- Mirrors RCCL debug control
* Remove rocshmem::rocshmem_env_config
* Change interface for GetClosestNicToGpu
to accept const char** instead of char**:
the pointed-to string does not need to be modified
- Files were not audited for inclusion of util.hpp only for env vars
---------
Signed-off-by: Omri Mor <Omri.Mor@amd.com>
[ROCm/rocshmem commit: a0fcbf8d35]
533 líneas
13 KiB
C++
533 líneas
13 KiB
C++
/******************************************************************************
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* Copyright (c) Advanced Micro Devices, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*****************************************************************************/
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#ifndef LIBRARY_SRC_GDA_BACKEND_HPP_
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#define LIBRARY_SRC_GDA_BACKEND_HPP_
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#include <dlfcn.h>
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#include "backend_bc.hpp"
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#include "containers/free_list_impl.hpp"
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#include "hdp_proxy.hpp" //TODO useless?
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#include "memory/hip_allocator.hpp"
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#include "context_incl.hpp"
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#include "gda_context_proxy.hpp"
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#include "queue_pair.hpp"
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#include "bootstrap/bootstrap.hpp"
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#include "debug_gda.hpp"
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#include "gda/ionic/provider_gda_ionic.hpp"
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#include "gda/bnxt/provider_gda_bnxt.hpp"
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#include "gda/mlx5/provider_gda_mlx5.hpp"
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struct bnxtdv_funcs_t {
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int (*init_obj)(struct bnxt_re_dv_obj *obj, uint64_t obj_type);
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struct ibv_qp* (*create_qp)(struct ibv_pd *pd,
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struct bnxt_re_dv_qp_init_attr *qp_attr);
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int (*destroy_qp)(struct ibv_qp *ibvqp);
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int (*modify_qp)(struct ibv_qp *ibv_qp, struct ibv_qp_attr *attr,
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int attr_mask, uint32_t type, uint32_t value);
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int (*qp_mem_alloc)(struct ibv_pd *ibvpd,
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struct ibv_qp_init_attr *attr,
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struct bnxt_re_dv_qp_mem_info *dv_qp_mem);
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struct ibv_cq* (*create_cq)(struct ibv_context *ibvctx,
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struct bnxt_re_dv_cq_init_attr *cq_attr);
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int (*destroy_cq)(struct ibv_cq *ibv_cq);
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void* (*cq_mem_alloc)(struct ibv_context *ibvctx, int num_cqe,
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struct bnxt_re_dv_cq_attr *cq_attr);
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void* (*umem_reg)(struct ibv_context *ibvctx,
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struct bnxt_re_dv_umem_reg_attr *in);
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int (*umem_dereg)(void *umem_handle);
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int (*get_default_db_region)(struct ibv_context *ibvctx,
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struct bnxt_re_dv_db_region_attr *out);
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};
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struct mlx5dv_funcs_t {
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int (*init_obj)(struct mlx5dv_obj *obj, uint64_t obj_type);
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};
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namespace rocshmem {
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class GDAContext;
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class GDAHostContext;
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class QueuePair;
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class HostInterface;
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enum GDAVendor {
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NONE,
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IONIC,
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BNXT,
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MLX5
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};
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class GDABackend : public Backend {
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private:
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typedef struct dest_info {
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int lid;
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int qpn;
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int psn;
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union ibv_gid gid;
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} dest_info_t;
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const char *requested_dev = nullptr;
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struct ibv_context *context = nullptr;;
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struct ibv_pd *pd_orig = nullptr;
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enum GDAVendor gda_vendor = GDAVendor::NONE;
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struct ibv_port_attr portinfo;
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union ibv_gid gid;
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int port = 1;
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int gid_index;
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uint32_t *heap_rkey = nullptr;
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struct ibv_mr *heap_mr = nullptr;
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uint32_t inline_threshold = 8;
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QueuePair *host_qps = nullptr;
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QueuePair *gpu_qps = nullptr;
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std::vector<ibv_qp*> qps;
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std::vector<ibv_cq*> cqs;
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std::vector<dest_info_t> dest_info;
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/* GDA_BNXT START */
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std::vector<struct bnxt_host_qp> bnxt_qps;
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std::vector<struct bnxt_host_cq> bnxt_cqs;
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struct bnxt_re_dv_db_region_attr db_region_attr;
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/* GDA_BNXT END */
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/* GDA_IONIC & GDA_MLX5 START */
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struct ibv_pd *pd_parent = nullptr;
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/* GDA_IONIC & GDA_MLX5 END */
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/* GDA_IONIC START */
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struct ibv_pd *pd_uxdma[2];
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void *gpu_db_page = nullptr;
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uint64_t *gpu_db_cq = nullptr;
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uint64_t *gpu_db_sq = nullptr;
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/* GDA_IONIC END */
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/**
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* @brief Common code invoked from the different constructors
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*/
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void read_env();
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public:
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friend GDAContext;
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/**
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* @copydoc Backend::Backend(unsigned)
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*/
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explicit GDABackend(MPI_Comm comm);
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explicit GDABackend(TcpBootstrap *bootstr);
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/**
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* @copydoc Backend::~Backend()
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*/
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virtual ~GDABackend();
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__device__ bool create_ctx(int64_t options, rocshmem_ctx_t *ctx);
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/**
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* @brief Destroy a `rocshmem_ctx_t` context and returns it back to the
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* context free list.
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*/
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__device__ void destroy_ctx(rocshmem_ctx_t *ctx);
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/**
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* @copydoc Backend::ctx_create
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*/
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void ctx_create(int64_t options, void **ctx) override;
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/**
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* @copydoc Backend::ctx_destroy
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*/
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void ctx_destroy(Context *ctx) override;
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/**
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* @brief Abort the application.
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*
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* @param[in] status Exit code.
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*
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* @return void.
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*
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* @note This routine terminates the entire application.
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*/
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void global_exit(int status) override;
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/**
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* @copydoc Backend::create_new_team
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*/
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void create_new_team(Team *parent_team, TeamInfo *team_info_wrt_parent,
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TeamInfo *team_info_wrt_world, int num_pes,
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int my_pe_in_new_team, MPI_Comm team_comm,
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rocshmem_team_t *new_team) override;
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/**
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* @copydoc Backend::team_destroy(rocshmem_team_t)
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*/
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void team_destroy(rocshmem_team_t team) override;
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/**
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* @brief Accessor for work/sync bases
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*
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* @return Vector containing the addresses of the work/sync bases
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*/
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char** get_wrk_sync_bases() { return wrk_sync_pool_bases_; } //TODO UNUSED
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/**
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* @brief The host-facing interface that will be used
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* by all contexts of the GDABackend
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*/
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std::shared_ptr<HostInterface> host_interface{nullptr};
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/**
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* @brief Scratchpad for the internal barrier algorithms.
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*/
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int64_t *barrier_sync{nullptr};
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/**
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* @brief Handle for raw memory for barrier sync
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*/
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long *barrier_pSync_pool{nullptr};
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/**
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* @brief Handle for raw memory for reduce sync
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*/
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long *reduce_pSync_pool{nullptr};
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/**
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* @brief Handle for raw memory for broadcast sync
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*/
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long *bcast_pSync_pool{nullptr};
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/**
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* @brief Handle for raw memory for alltoall sync
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*/
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long *alltoall_pSync_pool{nullptr};
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/**
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* @brief Handle for raw memory for work
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*/
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void *pWrk_pool{nullptr};
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/**
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* @brief Handle for raw memory for alltoall
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*/
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void *pAta_pool{nullptr};
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/**
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* @brief Handle for raw memory for fence/quiet
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*/
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int *fence_pool{nullptr};
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protected:
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/**
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* @copydoc Backend::dump_backend_stats()
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*/
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void dump_backend_stats() override;
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/**
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* @copydoc Backend::reset_backend_stats()
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*/
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void reset_backend_stats() override;
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/**
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* @brief Allocates uncacheable host memory for the hdp policy.
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*
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* @note Internal data ownership is managed by the proxy
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*/
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HdpProxy<HIPHostAllocator> hdp_proxy_{};
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/**
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* @brief Holds a copy of the default context for host functions
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*/
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std::unique_ptr<GDAHostContext> default_host_ctx{nullptr};
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/**
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* @brief Allocate and initialize team world.
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*/
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void setup_team_world();
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/**
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* @brief Initialize the resources required to support teams
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*/
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void setup_teams();
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/**
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* @brief Destruct the resources required to support teams
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*/
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void cleanup_teams();
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/**
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* @brief Allocation and initialization of backend contexts.
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*/
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void setup_ctxs();
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void cleanup_ctxs();
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void setup_host_ctx();
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void setup_default_ctx();
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/**
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* @brief Allocation and initialization of resources required to
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* support IPC handover.
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*/
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void setup_ipc();
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void cleanup_ipc();
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/**
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* @brief Allocate and initialize barrier operation addresses on
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* symmetric heap.
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*
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* When this method completes, the barrier_sync member will be available
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* for use.
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*/
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void setup_collectives();
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/**
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* @brief Allocate buffer for fence/quiet operation
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*/
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void setup_fence_buffer();
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void setup_heap_memory_rkey();
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void cleanup_heap_memory_rkey();
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void initialize_gpu_qp(QueuePair* qp, int conn_num);
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void bnxt_initialize_gpu_qp(QueuePair* qp, int conn_num);
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/**
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* @brief Setup InfiniBand Resources
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*/
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void setup_ibv();
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/**
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* @brief Cleanup InfiniBand Resources
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*/
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void cleanup_ibv();
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/**
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* @brief Detect the available direct verbs libraries
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*/
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void autodetect_dv_libs();
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/**
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* @brief Open InfiniBand Device and create common structures
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*/
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void open_ib_device();
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/**
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* @brief Selects the best GID index
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*/
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void select_gid_index();
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/**
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* @brief Create all CQs and QPs
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*/
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void create_queues();
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/**
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* @brief Create all CQs with a of length ncqes
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*/
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void create_cqs(int ncqes);
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void bnxt_create_cqs(int ncqes);
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/**
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* @brief Create all QPs with a SQ of length sq_length
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*/
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void create_qps(int sq_length);
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void bnxt_create_qps(int sq_length);
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/**
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* @brief Reorders QPs to that we map rocSHMEM contexts to the correct QPs
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*/
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void alternate_qp_ports();
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/**
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* @brief Exchange QP information for connection
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*/
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void exchange_qp_dest_info();
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/**
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* @brief Modify all QPs from RESET to INIT state
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*/
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void modify_qps_reset_to_init();
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/**
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* @brief Modify all QPs from INIT to RTR state
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*/
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void modify_qps_init_to_rtr();
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/**
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* @brief Modify all QPs from RTR to RTs state
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*/
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void modify_qps_rtr_to_rts();
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/**
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* @brief Converts an ibv_mtu to an integer
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*/
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int ibv_mtu_to_int(enum ibv_mtu mtu);
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static void* pd_alloc_host(ibv_pd* pd, void* pd_context, size_t size, size_t alignment, uint64_t resource_type);
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static void* pd_alloc_device_uncached(ibv_pd* pd, void* pd_context, size_t size, size_t alignment, uint64_t resource_type);
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static void pd_release(ibv_pd* pd, void* pd_context, void* ptr, uint64_t resource_type);
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void create_parent_domain();
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void setup_gpu_qps();
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void cleanup_gpu_qps();
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private:
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/**
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* @brief Common code invoked from the different constructors
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*/
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void init();
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/**
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* @brief Proxy for the default context
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*
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* @note Internal data ownership is managed by the proxy
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*/
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GDADefaultContextProxyT default_context_proxy_; // init handled in constructor
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/**
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* @brief An array of @ref ROContexts that backs the context FreeList.
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*/
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GDAContext *ctx_array{nullptr};
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/**
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* @brief A free-list containing contexts.
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*/
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FreeListProxy<HIPAllocator, GDAContext *> ctx_free_list{};
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/**
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* @brief The bitmask representing the availability of teams in the pool
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*/
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char *team_pool_bitmask_{nullptr};
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/**
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* @brief Bitmask to store the reduced result of bitmasks on pariticipating
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* PEs
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*
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* With no thread-safety for this bitmask, multithreaded creation of teams is
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* not supported.
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*/
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char *team_reduced_bitmask_{nullptr};
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/**
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* @brief Size of the bitmask
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*/
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int team_bitmask_size_{-1};
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/**
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* Fine grained memory allocator for buffers used in collectives Routines
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*/
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HIPDefaultFinegrainedAllocator fine_grained_allocator_ {};
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/**
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* @brief Collective routines work/sync buffer size
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*/
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size_t wrk_sync_pool_size_{};
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/**
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* @brief Collective routines work/sync buffer base ptr
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*/
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char* const wrk_sync_pool_{nullptr};
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/**
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* @brief Temporary buffer pointer pointing to the same address as
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* wrk_sync_pool_, used to calculate the starting addresses of
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* different work and sync buffers.
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*/
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char *wrk_sync_pool_top_{nullptr};
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/**
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* @brief Array containing the addresses of the work/sync buffer bases
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* of other PEs
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*/
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char** wrk_sync_pool_bases_{nullptr};//TODO UNUSED, maybe used again later when we decouple the sync from the main heap
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/**
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* @brief Initialize memory required for work/sync buffers and open GDA
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* handle on PE's wrk_sync_pool.
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*/
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void setup_wrk_sync_buffer();
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/**
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* @brief Close GDA memory handles for work/sync buffers and deallocate
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* work/sync buffer.
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*/
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void cleanup_wrk_sync_buffer();
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/**
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* @brief rte all-to-all
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*/
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void Alltoall_char_inplace (char *inoutbuf, size_t num_bytes, rocshmem_team_t team);
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/**
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* @brief rte allreduce for teams
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*/
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void Allreduce_char_BAND (char* inbuf, char *outbuf, size_t num_bytes, Team *team);
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/**
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* @brief rte barrier for initialization
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*/
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void rte_barrier();
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/**
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* @brief structures holding the function pointers to the direct verbs functionality
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* of each network driver.
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*/
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bnxtdv_funcs_t bnxtdv_ftable_;
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|
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/**
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|
* @brief handle used for the dlopen of the BCOM library
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*/
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void *bnxtdv_handle_{nullptr};
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/**
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* @brief initialize function table for BCOM direct verbs support
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*/
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int bnxt_dv_dl_init();
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/**
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* @brief structures holding the function pointers to the direct verbs functionality
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* of each network driver.
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*/
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mlx5dv_funcs_t mlx5dv_ftable_;
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/**
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* @brief handle used for the dlopen of the MLX5 library
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*/
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void *mlx5dv_handle_{nullptr};
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/**
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* @brief initialize function table for MLNX direct verbs support
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*/
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int mlx5_dv_dl_init();
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};
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} // namespace rocshmem
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#endif // LIBRARY_SRC_GDA_BACKEND_HPP_
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