d9ba131f73
amdsmi_dev_get_gpu_ecc_status -> amdsmi_get_gpu_ecc_status amdsmi_dev_get_gpu_ecc_enabled -> amdsmi_get_gpu_ecc_enabled amdsmi_dev_get_gpu_ecc_count -> amdsmi_get_gpu_ecc_count Change-Id: I84e6489f82bae115e1a13c9e4fce8029888ca379
175 خطوط
6.7 KiB
C++
Executable File
175 خطوط
6.7 KiB
C++
Executable File
/*
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* =============================================================================
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* The University of Illinois/NCSA
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* Open Source License (NCSA)
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*
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* Copyright (c) 2022, Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Developed by:
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*
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* AMD Research and AMD ROC Software Development
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*
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* Advanced Micro Devices, Inc.
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*
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* www.amd.com
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal with the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimers.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimers in
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* the documentation and/or other materials provided with the distribution.
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* - Neither the names of <Name of Development Group, Name of Institution>,
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* nor the names of its contributors may be used to endorse or promote
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* products derived from this Software without specific prior written
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* permission.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS WITH THE SOFTWARE.
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*
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*/
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#include <stdint.h>
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#include <stddef.h>
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#include <iostream>
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#include <gtest/gtest.h>
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#include "amd_smi/amdsmi.h"
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#include "err_cnt_read.h"
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#include "../test_common.h"
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TestErrCntRead::TestErrCntRead() : TestBase() {
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set_title("AMDSMI Error Count Read Test");
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set_description("The Error Count Read tests verifies that error counts"
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" can be read properly.");
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}
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TestErrCntRead::~TestErrCntRead(void) {
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}
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void TestErrCntRead::SetUp(void) {
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TestBase::SetUp();
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return;
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}
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void TestErrCntRead::DisplayTestInfo(void) {
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TestBase::DisplayTestInfo();
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}
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void TestErrCntRead::DisplayResults(void) const {
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TestBase::DisplayResults();
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return;
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}
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void TestErrCntRead::Close() {
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// This will close handles opened within amdsmitst utility calls and call
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// amdsmi_shut_down(), so it should be done after other hsa cleanup
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TestBase::Close();
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}
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void TestErrCntRead::Run(void) {
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amdsmi_status_t err;
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amdsmi_error_count_t ec;
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uint64_t enabled_mask;
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amdsmi_ras_err_state_t err_state;
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TestBase::Run();
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if (setup_failed_) {
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IF_VERB(STANDARD) {
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std::cout << "** SetUp Failed for this test. Skipping.**" << std::endl;
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}
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return;
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}
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for (uint32_t x = 0; x < num_iterations(); ++x) {
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for (uint32_t i = 0; i < num_monitor_devs(); ++i) {
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PrintDeviceHeader(processor_handles_[i]);
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err = amdsmi_get_gpu_ecc_enabled(processor_handles_[i], &enabled_mask);
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if (err == AMDSMI_STATUS_NOT_SUPPORTED) {
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IF_VERB(STANDARD) {
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std::cout <<
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"\t**Error Count Enabled Mask get is not supported on this machine"
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<< std::endl;
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}
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// Verify api support checking functionality is working
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err = amdsmi_get_gpu_ecc_enabled(processor_handles_[i], nullptr);
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ASSERT_EQ(err, AMDSMI_STATUS_INVAL);
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continue;
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} else {
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CHK_ERR_ASRT(err)
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// Verify api support checking functionality is working
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err = amdsmi_get_gpu_ecc_enabled(processor_handles_[i], nullptr);
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ASSERT_EQ(err, AMDSMI_STATUS_INVAL);
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IF_VERB(STANDARD) {
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std::cout << "Block Error Mask: 0x" << std::hex << enabled_mask <<
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std::endl;
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}
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}
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for (uint32_t b = AMDSMI_GPU_BLOCK_FIRST;
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b <= AMDSMI_GPU_BLOCK_LAST; b = b*2) {
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err = amdsmi_get_gpu_ecc_status(processor_handles_[i], static_cast<amdsmi_gpu_block_t>(b),
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&err_state);
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CHK_ERR_ASRT(err)
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IF_VERB(STANDARD) {
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std::cout << "\t**Error Count status for " <<
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GetBlockNameStr(static_cast<amdsmi_gpu_block_t>(b)) <<
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" block: " << GetErrStateNameStr(err_state) << std::endl;
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}
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// Verify api support checking functionality is working
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err = amdsmi_get_gpu_ecc_status(processor_handles_[i], static_cast<amdsmi_gpu_block_t>(b),
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nullptr);
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ASSERT_EQ(err, AMDSMI_STATUS_INVAL);
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err = amdsmi_get_gpu_ecc_count(processor_handles_[i], static_cast<amdsmi_gpu_block_t>(b), &ec);
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if (err == AMDSMI_STATUS_NOT_SUPPORTED) {
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IF_VERB(STANDARD) {
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std::cout << "\t**Error Count for " <<
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GetBlockNameStr(static_cast<amdsmi_gpu_block_t>(b)) <<
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": Not supported for this device" << std::endl;
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}
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// Verify api support checking functionality is working
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err = amdsmi_get_gpu_ecc_count(processor_handles_[i], static_cast<amdsmi_gpu_block_t>(b),
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nullptr);
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ASSERT_EQ(err, AMDSMI_STATUS_INVAL);
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} else {
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CHK_ERR_ASRT(err)
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IF_VERB(STANDARD) {
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std::cout << "\t**Error counts for " <<
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GetBlockNameStr(static_cast<amdsmi_gpu_block_t>(b)) << " block: "
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<< std::endl;
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std::cout << "\t\tCorrectable errors: " << ec.correctable_count
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<< std::endl;
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std::cout << "\t\tUncorrectable errors: " << ec.uncorrectable_count
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<< std::endl;
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}
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// Verify api support checking functionality is working
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err = amdsmi_get_gpu_ecc_count(processor_handles_[i], static_cast<amdsmi_gpu_block_t>(b),
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nullptr);
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ASSERT_EQ(err, AMDSMI_STATUS_INVAL);
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}
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}
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}
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}
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}
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