6df9a49437
* SWDEV-465041 - Add support for user events with DD
User events can be replaced with HSA signals. Add the interface
to allocate HSA signal for user events and update the status on
CL_COMPLETE.
Force pinned path with DD to avoid blocking calls. Pinned memory
can be released only when the command is complete.
Simplify device enqueue path to use generic kernel arg buffer and
signals
* Fix notifyCmdQueue() logic for OCL
* Avoid blocking calls in OCL with DD
* Add event destruciton in a case of the failure.
[ROCm/clr commit: 2305f8ae56]
823 строки
29 KiB
C++
823 строки
29 KiB
C++
/* Copyright (c) 2008 - 2024 Advanced Micro Devices, Inc.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE. */
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#include "platform/activity.hpp"
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#include "platform/command.hpp"
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#include "platform/commandqueue.hpp"
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#include "device/device.hpp"
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#include "platform/context.hpp"
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#include "platform/kernel.hpp"
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#include "thread/monitor.hpp"
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#include "platform/memory.hpp"
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#include "platform/agent.hpp"
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#include "os/alloc.hpp"
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#include <atomic>
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#include <cstring>
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#include <algorithm>
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namespace amd {
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// ================================================================================================
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Event::Event(HostQueue& queue, bool profilingEnabled)
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: callbacks_(NULL),
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status_(CL_INT_MAX),
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hw_event_(nullptr),
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notify_event_(nullptr),
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device_(&queue.device()),
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profilingInfo_(profilingEnabled) {
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event_entry_scope_.store(Device::kCacheStateInvalid, std::memory_order_relaxed);
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notified_.clear();
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}
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// ================================================================================================
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Event::Event()
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: callbacks_(NULL),
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status_(CL_SUBMITTED),
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hw_event_(nullptr),
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notify_event_(nullptr),
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device_(nullptr) {
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event_entry_scope_.store(Device::kCacheStateInvalid, std::memory_order_relaxed);
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notified_.clear();
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}
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// ================================================================================================
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Event::~Event() {
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CallBackEntry* callback = callbacks_;
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while (callback != NULL) {
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CallBackEntry* next = callback->next_;
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delete callback;
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callback = next;
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}
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// Release the notify event
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if (notify_event_ != nullptr) {
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notify_event_->release();
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}
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// Destroy global HW event if available
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if ((hw_event_ != nullptr) && (device_ != nullptr)) {
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device_->ReleaseGlobalSignal(hw_event_);
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}
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}
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// ================================================================================================
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uint64_t Event::recordProfilingInfo(int32_t status, uint64_t timeStamp) {
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if (timeStamp == 0) {
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timeStamp = Os::timeNanos();
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}
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switch (status) {
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case CL_QUEUED:
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profilingInfo_.queued_ = timeStamp;
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break;
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case CL_SUBMITTED:
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profilingInfo_.submitted_ = timeStamp;
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break;
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case CL_RUNNING:
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profilingInfo_.start_ = timeStamp;
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break;
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default:
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profilingInfo_.end_ = timeStamp;
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break;
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}
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return timeStamp;
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}
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// Global epoch time since the first processed command
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uint64_t epoch = 0;
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// ================================================================================================
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bool Event::setStatus(int32_t status, uint64_t timeStamp) {
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assert(status <= CL_QUEUED && "invalid status");
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int32_t currentStatus = this->status();
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if (currentStatus <= CL_COMPLETE || currentStatus <= status) {
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// We can only move forward in the execution status.
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return false;
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}
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if (profilingInfo().enabled_) {
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timeStamp = recordProfilingInfo(status, timeStamp);
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if (epoch == 0) {
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epoch = profilingInfo().queued_;
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}
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}
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if (amd::IS_HIP) {
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// HIP API doesn't have any event, associated with a callback. Hence the SW status of
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// the event is irrelevant, during the actual callback. At the same time HIP API requires
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// to finish the callback before HIP stream can continue. Hence runtime has to process
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// the callback first and then update the status.
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if (callbacks_ != (CallBackEntry*)0) {
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processCallbacks(status);
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}
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if (!status_.compare_exchange_strong(currentStatus, status, std::memory_order_relaxed)) {
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// Somebody else beat us to it, let them deal with the release/signal.
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return false;
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}
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} else {
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if (!status_.compare_exchange_strong(currentStatus, status, std::memory_order_relaxed)) {
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// Somebody else beat us to it, let them deal with the release/signal.
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return false;
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}
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if (callbacks_ != (CallBackEntry*)0) {
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processCallbacks(status);
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}
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}
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if (Agent::shouldPostEventEvents() && command().type() != 0) {
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Agent::postEventStatusChanged(as_cl(this), status, timeStamp + Os::offsetToEpochNanos());
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}
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if (status <= CL_COMPLETE) {
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// Before we notify the waiters that this event reached the CL_COMPLETE
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// status, we release all the resources associated with this instance.
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if (!IS_HIP) {
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releaseResources();
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}
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if (profilingInfo().enabled_ && amd::activity_prof::IsEnabled(OP_ID_DISPATCH)) {
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amd::activity_prof::ReportActivity(command());
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}
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// Broadcast all the waiters.
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if (referenceCount() > 1) {
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signal();
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}
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if (profilingInfo().enabled_) {
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ClPrint(LOG_DEBUG, LOG_CMD, "Command %p complete (Wall: %ld, CPU: %ld, GPU: %ld us)",
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&command(),
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((profilingInfo().end_ - epoch) / 1000),
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((profilingInfo().submitted_ - profilingInfo().queued_) / 1000),
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((profilingInfo().end_ - profilingInfo().start_) / 1000));
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} else {
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ClPrint(LOG_DEBUG, LOG_CMD, "Command %p complete", &command());
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}
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release();
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}
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return true;
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}
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// ================================================================================================
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bool Event::resetStatus(int32_t status) {
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int32_t currentStatus = this->status();
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if (currentStatus != CL_COMPLETE) {
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ClPrint(LOG_ERROR, LOG_CMD, "command is reset before complete current status :%d",
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currentStatus);
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}
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if (!status_.compare_exchange_strong(currentStatus, status, std::memory_order_relaxed)) {
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ClPrint(LOG_ERROR, LOG_CMD, "Failed to reset command status");
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return false;
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}
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notified_.clear();
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return true;
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}
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// ================================================================================================
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bool Event::setCallback(int32_t status, Event::CallBackFunction callback, void* data,
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bool blocking) {
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assert(status >= CL_COMPLETE && status <= CL_QUEUED && "invalid status");
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CallBackEntry* entry = new CallBackEntry(status, callback, data, blocking);
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if (entry == NULL) {
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return false;
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}
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entry->next_ = callbacks_;
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while (!callbacks_.compare_exchange_weak(entry->next_, entry))
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; // Someone else is also updating the head of the linked list! reload.
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// Check if the event has already reached 'status'
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if (this->status() <= status && entry->callback_ != CallBackFunction(0)) {
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if (entry->callback_.exchange(NULL) != NULL) {
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callback(as_cl(this), status, entry->data_);
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}
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}
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return true;
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}
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// ================================================================================================
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void Event::processCallbacks(int32_t status) const {
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cl_event event = const_cast<cl_event>(as_cl(this));
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const int32_t mask = (status > CL_COMPLETE) ? status : CL_COMPLETE;
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// For_each callback:
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CallBackEntry* entry;
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for (entry = callbacks_; entry != NULL; entry = entry->next_) {
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// If the entry's status matches the mask,
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if (entry->status_ == mask && entry->callback_ != CallBackFunction(0)) {
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// invoke the callback function.
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CallBackFunction callback = entry->callback_.exchange(NULL);
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if (callback != NULL) {
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callback(event, status, entry->data_);
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}
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}
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}
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}
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static constexpr bool kCpuWait = true;
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// ================================================================================================
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bool Event::awaitCompletion() {
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if (status() > CL_COMPLETE) {
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// Notifies the current command queue about waiting
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if (!notifyCmdQueue(kCpuWait)) {
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return false;
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}
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ClPrint(LOG_DEBUG, LOG_WAIT, "Waiting for event %p to complete, current status %d",
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this, status());
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auto* queue = command().queue();
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if ((queue != nullptr) && queue->vdev()->ActiveWait()) {
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while (status() > CL_COMPLETE) {
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amd::Os::yield();
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}
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} else {
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ScopedLock lock(lock_);
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// Wait until the status becomes CL_COMPLETE or negative.
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while (status() > CL_COMPLETE) {
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lock_.wait();
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}
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}
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ClPrint(LOG_DEBUG, LOG_WAIT, "Event %p wait completed", this);
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}
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return status() == CL_COMPLETE;
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}
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// ================================================================================================
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bool Event::notifyCmdQueue(bool cpu_wait) {
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HostQueue* queue = command().queue();
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if (AMD_DIRECT_DISPATCH) {
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ScopedLock l(notify_lock_);
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if ((status() > CL_COMPLETE) && (nullptr != queue) &&
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// If HW event was assigned, then notification can be ignored, since a barrier was issued
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// @note: Force the marker always in OCL for now, since OCL events require precise
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// sequence of the status update
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((HwEvent() == nullptr) || !amd::IS_HIP) &&
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!notified_.test_and_set()) {
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// Make sure the queue is draining the enqueued commands.
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amd::Command* command = new amd::Marker(*queue, false, nullWaitList, this, cpu_wait);
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if (command == NULL) {
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notified_.clear();
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return false;
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}
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command->enqueue();
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// Save notification, associated with the current event
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notify_event_ = command;
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}
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} else {
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if ((status() > CL_COMPLETE) && (nullptr != queue) && !notified_.test_and_set()) {
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// Make sure the queue is draining the enqueued commands.
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amd::Command* command = new amd::Marker(*queue, false, nullWaitList, this);
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if (command == NULL) {
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notified_.clear();
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return false;
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}
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command->enqueue();
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command->release();
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}
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}
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return true;
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}
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const Event::EventWaitList Event::nullWaitList(0);
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// ================================================================================================
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Command::Command(HostQueue& queue, cl_command_type type, const EventWaitList& eventWaitList,
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uint32_t commandWaitBits, const Event* waitingEvent)
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: Event(queue,
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amd::activity_prof::IsEnabled(amd::activity_prof::OperationId(type)) ||
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queue.properties().test(CL_QUEUE_PROFILING_ENABLE) ||
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Agent::shouldPostEventEvents()),
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queue_(&queue),
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next_(nullptr),
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type_(type),
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waitingEvent_(waitingEvent),
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eventWaitList_(eventWaitList),
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commandWaitBits_(commandWaitBits) {
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// Retain the commands from the event wait list.
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for (const auto &event: eventWaitList) {
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event->retain();
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}
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}
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SysmemPool<ComputeCommand>* Command::command_pool_ = new SysmemPool<ComputeCommand>;
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// ================================================================================================
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void Command::operator delete(void* ptr) {
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if (DEBUG_CLR_SYSMEM_POOL) {
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command_pool_->Free(ptr);
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} else {
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::operator delete (ptr);
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}
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}
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// ================================================================================================
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void* Command::operator new(size_t size) {
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if (DEBUG_CLR_SYSMEM_POOL) {
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return command_pool_->Alloc(size);
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} else {
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return ::operator new (size);
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}
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}
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// ================================================================================================
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void Command::releaseResources() {
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const Command::EventWaitList& events = eventWaitList();
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// Release the commands from the event wait list.
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for (const auto &event: events) {
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event->release();
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}
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}
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// ================================================================================================
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void Command::enqueue() {
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assert(queue_ != NULL && "Cannot be enqueued");
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if (Agent::shouldPostEventEvents() && type_ != 0) {
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Agent::postEventCreate(as_cl(static_cast<Event*>(this)), type_);
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}
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ClPrint(LOG_DEBUG, LOG_CMD, "Command (%s) enqueued: %p to queue: %p",
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amd::activity_prof::getOclCommandKindString(this->type()), this, queue_);
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// Direct dispatch logic below will submit the command immediately, but the command status
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// update will occur later after flush() with a wait
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if (AMD_DIRECT_DISPATCH) {
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setStatus(CL_QUEUED);
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// Notify all commands about the waiter. Barrier will be sent in order to obtain
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// HSA signal for a wait on the current queue
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for (const auto &event: eventWaitList()) {
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if (!amd::IS_HIP && event->command().type() == CL_COMMAND_USER) {
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if (event->status() >= CL_COMPLETE) {
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reinterpret_cast<amd::UserEvent*>(event)->AddDependent(this);
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} else {
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setStatus(CL_EXEC_STATUS_ERROR_FOR_EVENTS_IN_WAIT_LIST);
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return;
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}
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} else {
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event->notifyCmdQueue(!kCpuWait);
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}
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}
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// The batch update must be lock protected to avoid a race condition
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// when multiple threads submit/flush/update the batch at the same time
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ScopedLock sl(queue_->vdev()->execution());
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queue_->FormSubmissionBatch(this);
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// Enqueue flushes, except profiling markers to avoid frequent expensive callbacks
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if (((type() == 0) && profilingInfo().batch_flush_) ||
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(type() == CL_COMMAND_MARKER) || (type() == CL_COMMAND_TASK)) {
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// The current HSA signal tracking logic requires profiling enabled for the markers
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EnableProfiling();
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// Update batch head for the current marker. Hence the status of all commands can be
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// updated upon the marker completion
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SetBatchHead(queue_->GetSubmissionBatch());
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submit(*queue_->vdev());
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// The batch will be tracked with the marker now
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queue_->ResetSubmissionBatch();
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} else {
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submit(*queue_->vdev());
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queue_->FlushSubmissionBatch(this);
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}
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} else {
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queue_->append(*this);
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queue_->flush();
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}
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if ((queue_->device().settings().waitCommand_ && (type_ != 0)) ||
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((commandWaitBits_ & 0x2) != 0)) {
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queue_->finish();
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}
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// set this queue status is active
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queue_->SetQueueStatus();
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}
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// ================================================================================================
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const Context& Command::context() const { return queue_->context(); }
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NDRangeKernelCommand::NDRangeKernelCommand(HostQueue& queue, const EventWaitList& eventWaitList,
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Kernel& kernel, const NDRangeContainer& sizes,
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uint32_t sharedMemBytes, uint32_t extraParam,
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uint32_t gridId, uint32_t numGrids,
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uint64_t prevGridSum, uint64_t allGridSum,
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uint32_t firstDevice, bool forceProfiling) :
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Command(queue, CL_COMMAND_NDRANGE_KERNEL, eventWaitList, AMD_SERIALIZE_KERNEL |
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(HIP_LAUNCH_BLOCKING << 1)),
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kernel_(kernel),
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sizes_(sizes),
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sharedMemBytes_(sharedMemBytes),
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extraParam_(extraParam),
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gridId_(gridId),
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numGrids_(numGrids),
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prevGridSum_(prevGridSum),
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allGridSum_(allGridSum),
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firstDevice_(firstDevice) {
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auto& device = queue.device();
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auto devKernel = const_cast<device::Kernel*>(kernel.getDeviceKernel(device));
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if (cooperativeGroups()) {
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setNumWorkgroups();
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}
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// This optimization will set marker_ts_ but may not submit a batch.
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if (forceProfiling) {
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profilingInfo_.enabled_ = true;
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profilingInfo_.clear();
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profilingInfo_.correlation_id_ = activity_prof::correlation_id;
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profilingInfo_.marker_ts_ = true;
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}
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kernel_.retain();
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}
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void NDRangeKernelCommand::releaseResources() {
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kernel_.parameters().release(parameters_);
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DEBUG_ONLY(parameters_ = NULL);
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kernel_.release();
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Command::releaseResources();
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}
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NativeFnCommand::NativeFnCommand(HostQueue& queue, const EventWaitList& eventWaitList,
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void(CL_CALLBACK* nativeFn)(void*), const void* args,
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size_t argsSize, size_t numMemObjs, const cl_mem* memObjs,
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const void** memLocs)
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: Command(queue, CL_COMMAND_NATIVE_KERNEL, eventWaitList),
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nativeFn_(nativeFn),
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argsSize_(argsSize) {
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args_ = new char[argsSize_];
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if (args_ == NULL) {
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return;
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}
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::memcpy(args_, args, argsSize_);
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memObjects_.resize(numMemObjs);
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memOffsets_.resize(numMemObjs);
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for (size_t i = 0; i < numMemObjs; ++i) {
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Memory* obj = as_amd(memObjs[i]);
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obj->retain();
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memObjects_[i] = obj;
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memOffsets_[i] = (const_address)memLocs[i] - (const_address)args;
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}
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}
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int32_t NativeFnCommand::invoke() {
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size_t numMemObjs = memObjects_.size();
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for (size_t i = 0; i < numMemObjs; ++i) {
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void* hostMemPtr = memObjects_[i]->getHostMem();
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if (hostMemPtr == NULL) {
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return CL_MEM_OBJECT_ALLOCATION_FAILURE;
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}
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*reinterpret_cast<void**>(&args_[memOffsets_[i]]) = hostMemPtr;
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}
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nativeFn_(args_);
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return CL_SUCCESS;
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}
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bool OneMemoryArgCommand::validatePeerMemory() {
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amd::Device* queue_device = &queue()->device();
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// Rocr backend maps memory from different devices by default and runtime doesn't need to track
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// extra memory objects.
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if (queue_device->settings().rocr_backend_) {
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const std::vector<Device*>& srcDevices = memory_->getContext().devices();
|
|
if (!memory_->isArena() &&
|
|
srcDevices.size() == 1 && queue_device != srcDevices[0]) {
|
|
// current device and source device are not same hence
|
|
// explicit allow access is needed for P2P access
|
|
device::Memory* mem = memory_->getDeviceMemory(*srcDevices[0]);
|
|
if (!mem->getAllowedPeerAccess()) {
|
|
void* dst = reinterpret_cast<void*>(mem->virtualAddress());
|
|
bool status = srcDevices[0]->deviceAllowAccess(dst);
|
|
mem->setAllowedPeerAccess(true);
|
|
return status;
|
|
}
|
|
}
|
|
}
|
|
return true;
|
|
}
|
|
|
|
bool OneMemoryArgCommand::validateMemory() {
|
|
// Runtime disables deferred memory allocation for single device.
|
|
// Hence ignore memory validations
|
|
if (queue()->context().devices().size() == 1) {
|
|
return true;
|
|
}
|
|
device::Memory* mem = memory_->getDeviceMemory(queue()->device());
|
|
if (NULL == mem) {
|
|
LogPrintfError("Can't allocate memory size - 0x%08X bytes!", memory_->getSize());
|
|
return false;
|
|
}
|
|
return true;
|
|
}
|
|
|
|
bool TwoMemoryArgsCommand::validatePeerMemory(){
|
|
bool accessAllowed = true;
|
|
amd::Device* queue_device = &queue()->device();
|
|
// Explicite Allow access is needed when first time memory is accessed from other device.
|
|
// Rules : Remote device has to provide access to current device
|
|
// --------------------------------------------------------------------
|
|
// Crr_Dev = src | Allow access will be called for dst memory |
|
|
// --------------------------------------------------------------------
|
|
// Crr_Dev = dst | Allow access will be called for src memory |
|
|
// --------------------------------------------------------------------
|
|
// Crr_dev = other| Allow access will be called for dst and src memory|
|
|
// --------------------------------------------------------------------
|
|
if (queue_device->settings().rocr_backend_) {
|
|
const std::vector<Device*>& srcDevices = memory1_->getContext().devices();
|
|
const std::vector<Device*>& dstDevices = memory2_->getContext().devices();
|
|
// explicit allow access is needed for P2P access
|
|
device::Memory* mem1 = memory1_->getDeviceMemory(*srcDevices[0]);
|
|
if (!memory1_->isArena() &&
|
|
!mem1->getAllowedPeerAccess() && srcDevices.size() == 1) {
|
|
void* src = reinterpret_cast<void*>(mem1->originalDeviceAddress());
|
|
accessAllowed = srcDevices[0]->deviceAllowAccess(src);
|
|
mem1->setAllowedPeerAccess(true);
|
|
}
|
|
|
|
device::Memory* mem2 = memory2_->getDeviceMemory(*dstDevices[0]);
|
|
if (!memory2_->isArena() &&
|
|
!mem2->getAllowedPeerAccess() && dstDevices.size() == 1) {
|
|
void* dst = reinterpret_cast<void*>(mem2->originalDeviceAddress());
|
|
accessAllowed &= dstDevices[0]->deviceAllowAccess(dst);
|
|
mem2->setAllowedPeerAccess(true);
|
|
}
|
|
}
|
|
return accessAllowed;
|
|
}
|
|
|
|
bool TwoMemoryArgsCommand::validateMemory() {
|
|
// Runtime disables deferred memory allocation for single device.
|
|
// Hence ignore memory validations
|
|
if (queue()->context().devices().size() == 1) {
|
|
return true;
|
|
}
|
|
device::Memory* mem = memory1_->getDeviceMemory(queue()->device());
|
|
if (NULL == mem) {
|
|
LogPrintfError("Can't allocate memory size - 0x%08X bytes!", memory1_->getSize());
|
|
return false;
|
|
}
|
|
mem = memory2_->getDeviceMemory(queue()->device());
|
|
if (NULL == mem) {
|
|
LogPrintfError("Can't allocate memory size - 0x%08X bytes!", memory2_->getSize());
|
|
return false;
|
|
}
|
|
return true;
|
|
}
|
|
bool ReadMemoryCommand::isEntireMemory() const {
|
|
return source().isEntirelyCovered(origin(), size());
|
|
}
|
|
|
|
bool WriteMemoryCommand::isEntireMemory() const {
|
|
return destination().isEntirelyCovered(origin(), size());
|
|
}
|
|
|
|
bool SvmMapMemoryCommand::isEntireMemory() const {
|
|
return getSvmMem()->isEntirelyCovered(origin(), size());
|
|
}
|
|
|
|
bool FillMemoryCommand::isEntireMemory() const {
|
|
return memory().isEntirelyCovered(origin(), size());
|
|
}
|
|
|
|
bool CopyMemoryCommand::isEntireMemory() const {
|
|
bool result = false;
|
|
|
|
switch (type()) {
|
|
case CL_COMMAND_COPY_IMAGE_TO_BUFFER: {
|
|
Coord3D imageSize(size()[0] * size()[1] * size()[2] *
|
|
source().asImage()->getImageFormat().getElementSize());
|
|
result = source().isEntirelyCovered(srcOrigin(), size()) &&
|
|
destination().isEntirelyCovered(dstOrigin(), imageSize);
|
|
} break;
|
|
case CL_COMMAND_COPY_BUFFER_TO_IMAGE: {
|
|
Coord3D imageSize(size()[0] * size()[1] * size()[2] *
|
|
destination().asImage()->getImageFormat().getElementSize());
|
|
result = source().isEntirelyCovered(srcOrigin(), imageSize) &&
|
|
destination().isEntirelyCovered(dstOrigin(), size());
|
|
} break;
|
|
case CL_COMMAND_COPY_BUFFER_RECT: {
|
|
Coord3D rectSize(size()[0] * size()[1] * size()[2]);
|
|
Coord3D srcOffs(srcRect().start_);
|
|
Coord3D dstOffs(dstRect().start_);
|
|
result = source().isEntirelyCovered(srcOffs, rectSize) &&
|
|
destination().isEntirelyCovered(dstOffs, rectSize);
|
|
} break;
|
|
default:
|
|
result = source().isEntirelyCovered(srcOrigin(), size()) &&
|
|
destination().isEntirelyCovered(dstOrigin(), size());
|
|
break;
|
|
}
|
|
return result;
|
|
}
|
|
|
|
bool MapMemoryCommand::isEntireMemory() const {
|
|
return memory().isEntirelyCovered(origin(), size());
|
|
}
|
|
|
|
void UnmapMemoryCommand::releaseResources() {
|
|
//! @todo This is a workaround to a deadlock on indirect map release.
|
|
//! Remove this code when CAL will have a refcounter on memory.
|
|
//! decIndMapCount() has to go back to submitUnmapMemory()
|
|
device::Memory* mem = memory_->getDeviceMemory(queue()->device());
|
|
if (NULL != mem) {
|
|
mem->releaseIndirectMap();
|
|
}
|
|
|
|
OneMemoryArgCommand::releaseResources();
|
|
}
|
|
|
|
bool MigrateMemObjectsCommand::validateMemory() {
|
|
// Runtime disables deferred memory allocation for single device.
|
|
// Hence ignore memory validations
|
|
if (queue()->context().devices().size() == 1) {
|
|
return true;
|
|
}
|
|
for (const auto& it : memObjects_) {
|
|
device::Memory* mem = it->getDeviceMemory(queue()->device());
|
|
if (NULL == mem) {
|
|
LogPrintfError("Can't allocate memory size - 0x%08X bytes!", it->getSize());
|
|
return false;
|
|
}
|
|
}
|
|
return true;
|
|
}
|
|
|
|
// =================================================================================================
|
|
int32_t NDRangeKernelCommand::AllocCaptureSetValidate(void** kernelParams, address kernArgs,
|
|
size_t kernArgsSize) {
|
|
const amd::Device& device = queue()->device();
|
|
// Validate the kernel before submission
|
|
if (!queue()->device().validateKernel(kernel(), queue()->vdev(), cooperativeGroups())) {
|
|
return CL_OUT_OF_RESOURCES;
|
|
}
|
|
|
|
parameters_ = kernel().parameters().alloc(*queue()->vdev());
|
|
if (parameters_ == nullptr) {
|
|
LogError("Cannot allocate memory for parameters_");
|
|
return CL_OUT_OF_RESOURCES;
|
|
}
|
|
|
|
if (!kernel().parameters().captureAndSet(kernelParams, kernArgs, kernArgsSize, parameters_)) {
|
|
LogError("Cannot capture and set the kernel parameters");
|
|
return CL_OUT_OF_RESOURCES;
|
|
}
|
|
return CL_SUCCESS;
|
|
}
|
|
|
|
int32_t NDRangeKernelCommand::captureAndValidate() {
|
|
const amd::Device& device = queue()->device();
|
|
// Validate the kernel before submission
|
|
if (!queue()->device().validateKernel(kernel(), queue()->vdev(), cooperativeGroups())) {
|
|
return CL_OUT_OF_RESOURCES;
|
|
}
|
|
|
|
int32_t error;
|
|
uint64_t lclMemSize = kernel().getDeviceKernel(device)->workGroupInfo()->localMemSize_;
|
|
parameters_ = kernel().parameters().capture(*queue()->vdev(),
|
|
sharedMemBytes_ + lclMemSize, &error);
|
|
return error;
|
|
}
|
|
|
|
bool ExtObjectsCommand::validateMemory() {
|
|
// Always process GL objects, even if deferred allocations are disabled,
|
|
// because processGLResource() calls OGL Acquire().
|
|
bool retVal = true;
|
|
for (const auto& it : memObjects_) {
|
|
device::Memory* mem = it->getDeviceMemory(queue()->device());
|
|
if (NULL == mem) {
|
|
LogPrintfError("Can't allocate memory size - 0x%08X bytes!", it->getSize());
|
|
return false;
|
|
}
|
|
retVal = processGLResource(mem);
|
|
}
|
|
return retVal;
|
|
}
|
|
|
|
bool AcquireExtObjectsCommand::processGLResource(device::Memory* mem) {
|
|
return mem->processGLResource(device::Memory::GLDecompressResource);
|
|
}
|
|
|
|
bool ReleaseExtObjectsCommand::processGLResource(device::Memory* mem) {
|
|
return mem->processGLResource(device::Memory::GLInvalidateFBO);
|
|
}
|
|
|
|
bool MakeBuffersResidentCommand::validateMemory() {
|
|
// Runtime disables deferred memory allocation for single device.
|
|
// Hence ignore memory validations
|
|
if (queue()->context().devices().size() == 1) {
|
|
return true;
|
|
}
|
|
for (const auto& it : memObjects_) {
|
|
device::Memory* mem = it->getDeviceMemory(queue()->device());
|
|
if (NULL == mem) {
|
|
LogPrintfError("Can't allocate memory size - 0x%08X bytes!", it->getSize());
|
|
return false;
|
|
}
|
|
}
|
|
return true;
|
|
}
|
|
|
|
bool ThreadTraceMemObjectsCommand::validateMemory() {
|
|
// Runtime disables deferred memory allocation for single device.
|
|
// Hence ignore memory validations
|
|
if (queue()->context().devices().size() == 1) {
|
|
return true;
|
|
}
|
|
for (auto it = memObjects_.cbegin(); it != memObjects_.cend(); it++) {
|
|
device::Memory* mem = (*it)->getDeviceMemory(queue()->device());
|
|
if (NULL == mem) {
|
|
for (auto tmpIt = memObjects_.cbegin(); tmpIt != it; tmpIt++) {
|
|
device::Memory* tmpMem = (*tmpIt)->getDeviceMemory(queue()->device());
|
|
delete tmpMem;
|
|
}
|
|
LogPrintfError("Can't allocate memory size - 0x%08X bytes!", (*it)->getSize());
|
|
return false;
|
|
}
|
|
}
|
|
return true;
|
|
}
|
|
|
|
bool CopyMemoryP2PCommand::validateMemory() {
|
|
amd::Device* queue_device = &queue()->device();
|
|
|
|
// Rocr backend maps memory from different devices by default and runtime doesn't need to track
|
|
// extra memory objects. Also P2P staging buffer always allocated
|
|
if (queue_device->settings().rocr_backend_) {
|
|
return validatePeerMemory();
|
|
}
|
|
|
|
const std::vector<Device*>& devices = memory1_->getContext().devices();
|
|
if (devices.size() != 1) {
|
|
LogError("Can't allocate memory object for P2P extension");
|
|
return false;
|
|
}
|
|
device::Memory* mem = memory1_->getDeviceMemory(*devices[0]);
|
|
if (nullptr == mem) {
|
|
LogPrintfError("Can't allocate memory size - 0x%08X bytes!", memory1_->getSize());
|
|
return false;
|
|
}
|
|
const std::vector<Device*>& devices2 = memory2_->getContext().devices();
|
|
if (devices2.size() != 1) {
|
|
LogError("Can't allocate memory object for P2P extension");
|
|
return false;
|
|
}
|
|
mem = memory2_->getDeviceMemory(*devices2[0]);
|
|
if (nullptr == mem) {
|
|
LogPrintfError("Can't allocate memory size - 0x%08X bytes!", memory2_->getSize());
|
|
return false;
|
|
}
|
|
bool p2pStaging = false;
|
|
// Validate P2P memories on the current device, if any of them is null, then it's p2p staging
|
|
if ((nullptr == memory1_->getDeviceMemory(queue()->device())) ||
|
|
(nullptr == memory2_->getDeviceMemory(queue()->device()))) {
|
|
p2pStaging = true;
|
|
}
|
|
|
|
if (devices[0]->P2PStage() != nullptr && p2pStaging) {
|
|
amd::ScopedLock lock(devices[0]->P2PStageOps());
|
|
// Make sure runtime allocates memory on every device
|
|
for (uint d = 0; d < devices[0]->GlbCtx().devices().size(); ++d) {
|
|
device::Memory* mem = devices[0]->P2PStage()->getDeviceMemory(*devices[0]->GlbCtx().devices()[d]);
|
|
if (nullptr == mem) {
|
|
DevLogPrintfError("Cannot get P2P stage Device Memory for device: 0x%x \n",
|
|
devices[0]->GlbCtx().devices()[d]);
|
|
return false;
|
|
}
|
|
}
|
|
}
|
|
return true;
|
|
}
|
|
|
|
// ================================================================================================
|
|
bool SvmPrefetchAsyncCommand::validateMemory() {
|
|
amd::Memory* svmMem = amd::MemObjMap::FindMemObj(dev_ptr());
|
|
if (nullptr == svmMem) {
|
|
LogPrintfError("SvmPrefetchAsync received unknown memory for prefetch: %p!", dev_ptr());
|
|
return false;
|
|
}
|
|
return true;
|
|
}
|
|
|
|
} // namespace amd
|