7b6332d3d0
* Adding explicit HDP flush when using RDMA via Infiniband
118 lines
3.3 KiB
C++
118 lines
3.3 KiB
C++
/*************************************************************************
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* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* See LICENSE.txt for license information
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************************************************************************/
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#ifndef NCCL_TRANSPORT_H_
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#define NCCL_TRANSPORT_H_
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#include "nccl.h"
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#include <stdint.h>
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#define NTRANSPORTS 3
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extern struct ncclTransport ncclTransports[];
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// Forward declarations
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struct ncclRing;
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struct ncclConnector;
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struct ncclComm;
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#define RANK_INFO_SIZE 64
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typedef char ncclTinfo_t[RANK_INFO_SIZE];
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struct ncclInfo {
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ncclTinfo_t tinfo[NTRANSPORTS];
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};
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// Used to hold the transport connection values
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typedef int64_t ncclTvalue_t;
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#define CONNECT_SIZE 128
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struct ncclConnect {
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char data[CONNECT_SIZE];
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};
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struct ncclProxyArgs {
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struct ncclRing* ring;
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int substeps;
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int nsteps;
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uint64_t opCount;
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int llMode;
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bool needProxy;
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int active; // add component before this line -- it is left out during initialization
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};
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struct ncclTransportComm {
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ncclResult_t (*setup)(ncclTinfo_t*, ncclTinfo_t*, struct ncclConnect*, struct ncclRing*);
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ncclResult_t (*connect)(struct ncclConnect*, struct ncclConnector*);
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ncclResult_t (*free)(void*);
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ncclResult_t (*proxy)(struct ncclProxyArgs*);
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};
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struct ncclTransport {
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const char name[4];
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ncclResult_t (*fillInfo)(ncclTinfo_t*, int, uint64_t);
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ncclResult_t (*canConnect)(ncclTvalue_t*, ncclTinfo_t*, ncclTinfo_t*);
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ncclResult_t (*getRings)(int, int*, int*, ncclTvalue_t*, int*, int*, int*, int, int*);
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struct ncclTransportComm send;
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struct ncclTransportComm recv;
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};
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#include <pthread.h>
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typedef ncclResult_t (*threadFunc_t)(struct ncclProxyArgs*);
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#define TRANSPORT_PROXY_FIFO_SIZE NCCL_MAX_OPS
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struct transportProxyInfo {
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struct ncclComm* comm;
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pthread_t thread;
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threadFunc_t func;
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volatile int proxyReady;
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struct ncclProxyArgs argsFifo[TRANSPORT_PROXY_FIFO_SIZE];
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volatile uint64_t argsFifoHead;
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volatile uint64_t argsFifoTail;
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pthread_cond_t cond;
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pthread_mutex_t mutex;
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};
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ncclResult_t transportCreateProxy(int type, struct ncclRing* ring, struct ncclComm* comm);
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ncclResult_t transportDestroyProxy(struct ncclConnector* connector);
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enum proxyMode {
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proxyRing = 0,
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proxyFrom = 1,
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proxyTo = 2
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};
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static int proxyPatternRing = proxyRing;
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static inline int proxyPatternFrom(int root) { return 1+root; }
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static inline int proxyPatternTo(int root) { return -1-root; }
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static inline enum proxyMode proxyPatternMode(int pattern) { return (pattern == 0) ? proxyRing : ((pattern > 0) ? proxyFrom : proxyTo); }
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static inline int proxyPatternRoot(int pattern) { return (pattern > 0) ? pattern-1 : -pattern-1; }
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ncclResult_t transportSaveProxies(int substeps, int subchunks, int nstepsPerRound, int nblocksPerRound, size_t size, int pattern, struct ncclComm* comm);
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ncclResult_t transportStartProxies(struct ncclComm* comm);
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#include <unistd.h>
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// Spin wait until func evaluates to true
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template<typename FUNC>
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inline void transportProxyWait(const FUNC& func) {
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while (!func()) {
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sched_yield();
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}
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}
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inline void transportProxyIdle(int idle) {
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sched_yield();
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}
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// Function to get GPU's HDP_MEM_FLUSH_ADDR: HDP Memory Coherency Flush Control
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// This register allows software to explicitly initiate a flush read to HDP memory
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ncclResult_t getGpuHdpReg(int cudaDev, uint32_t** hdp);
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#endif
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