Austin Kerbow
87202d4408
Changes in the compiler are being made to add controls for XNACK and SRAM ECC for all targets which can support these features. By default the conservatively correct settings of XNACK on and SRAM ECC on will be used. This change is to facilitate these backend updates. Change-Id: I2fd6b6bc1d32937737e7f56d8e08c70fe781c745
243 lignes
8.2 KiB
C++
Fichiers exécutables
243 lignes
8.2 KiB
C++
Fichiers exécutables
////////////////////////////////////////////////////////////////////////////////
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//
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// The University of Illinois/NCSA
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// Open Source License (NCSA)
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//
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// Copyright (c) 2014-2015, Advanced Micro Devices, Inc. All rights reserved.
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//
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// Developed by:
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//
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// AMD Research and AMD HSA Software Development
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//
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// Advanced Micro Devices, Inc.
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//
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// www.amd.com
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to
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// deal with the Software without restriction, including without limitation
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// the rights to use, copy, modify, merge, publish, distribute, sublicense,
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// and/or sell copies of the Software, and to permit persons to whom the
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// Software is furnished to do so, subject to the following conditions:
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//
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// - Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimers.
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// - Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimers in
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// the documentation and/or other materials provided with the distribution.
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// - Neither the names of Advanced Micro Devices, Inc,
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// nor the names of its contributors may be used to endorse or promote
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// products derived from this Software without specific prior written
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// permission.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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// THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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// OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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// DEALINGS WITH THE SOFTWARE.
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//
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////////////////////////////////////////////////////////////////////////////////
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#include "core/inc/isa.h"
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#include <cstring>
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#include <sstream>
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#include <utility>
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namespace core {
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bool Wavefront::GetInfo(
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const hsa_wavefront_info_t &attribute,
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void *value) const {
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if (!value) {
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return false;
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}
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switch (attribute) {
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case HSA_WAVEFRONT_INFO_SIZE: {
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*((uint32_t*)value) = 64;
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return true;
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}
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default: {
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return false;
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}
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}
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}
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std::string Isa::GetFullName() const {
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std::stringstream full_name;
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full_name << GetArchitecture() << "-" << GetVendor() << "-" << GetOS() << "-"
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<< GetEnvironment() << "-gfx" << GetMajorVersion()
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<< GetMinorVersion() << GetStepping();
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if (xnackEnabled_)
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full_name << "+xnack";
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if (sramEcc_)
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full_name << "+sram-ecc";
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return full_name.str();
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}
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bool Isa::GetInfo(const hsa_isa_info_t &attribute, void *value) const {
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if (!value) {
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return false;
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}
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switch (attribute) {
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case HSA_ISA_INFO_NAME_LENGTH: {
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std::string full_name = GetFullName();
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*((uint32_t*)value) = static_cast<uint32_t>(full_name.size() + 1);
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return true;
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}
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case HSA_ISA_INFO_NAME: {
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std::string full_name = GetFullName();
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memset(value, 0x0, full_name.size() + 1);
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memcpy(value, full_name.c_str(), full_name.size());
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return true;
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}
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// deprecated.
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case HSA_ISA_INFO_CALL_CONVENTION_COUNT: {
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*((uint32_t*)value) = 1;
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return true;
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}
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// deprecated.
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case HSA_ISA_INFO_CALL_CONVENTION_INFO_WAVEFRONT_SIZE: {
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*((uint32_t*)value) = 64;
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return true;
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}
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// deprecated.
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case HSA_ISA_INFO_CALL_CONVENTION_INFO_WAVEFRONTS_PER_COMPUTE_UNIT: {
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*((uint32_t*)value) = 40;
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return true;
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}
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case HSA_ISA_INFO_MACHINE_MODELS: {
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const bool machine_models[2] = {false, true};
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memcpy(value, machine_models, sizeof(machine_models));
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return true;
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}
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case HSA_ISA_INFO_PROFILES: {
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bool profiles[2] = {true, false};
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if (this->version() == Version(7, 0, 0) ||
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this->version() == Version(8, 0, 1)) {
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profiles[1] = true;
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}
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memcpy(value, profiles, sizeof(profiles));
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return true;
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}
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case HSA_ISA_INFO_DEFAULT_FLOAT_ROUNDING_MODES: {
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const bool rounding_modes[3] = {false, false, true};
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memcpy(value, rounding_modes, sizeof(rounding_modes));
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return true;
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}
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case HSA_ISA_INFO_BASE_PROFILE_DEFAULT_FLOAT_ROUNDING_MODES: {
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const bool rounding_modes[3] = {false, false, true};
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memcpy(value, rounding_modes, sizeof(rounding_modes));
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return true;
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}
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case HSA_ISA_INFO_FAST_F16_OPERATION: {
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if (this->GetMajorVersion() >= 8) {
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*((bool*)value) = true;
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} else {
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*((bool*)value) = false;
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}
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return true;
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}
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case HSA_ISA_INFO_WORKGROUP_MAX_DIM: {
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const uint16_t workgroup_max_dim[3] = {1024, 1024, 1024};
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memcpy(value, workgroup_max_dim, sizeof(workgroup_max_dim));
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return true;
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}
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case HSA_ISA_INFO_WORKGROUP_MAX_SIZE: {
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*((uint32_t*)value) = 1024;
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return true;
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}
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case HSA_ISA_INFO_GRID_MAX_DIM: {
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const hsa_dim3_t grid_max_dim = {UINT32_MAX, UINT32_MAX, UINT32_MAX};
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memcpy(value, &grid_max_dim, sizeof(grid_max_dim));
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return true;
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}
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case HSA_ISA_INFO_GRID_MAX_SIZE: {
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*((uint64_t*)value) = UINT64_MAX;
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return true;
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}
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case HSA_ISA_INFO_FBARRIER_MAX_SIZE: {
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*((uint32_t*)value) = 32;
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return true;
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}
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default: {
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return false;
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}
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}
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}
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hsa_round_method_t Isa::GetRoundMethod(
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hsa_fp_type_t fp_type,
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hsa_flush_mode_t flush_mode) const {
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return HSA_ROUND_METHOD_SINGLE;
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}
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const Isa *IsaRegistry::GetIsa(const std::string &full_name) {
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auto isareg_iter = supported_isas_.find(full_name);
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return isareg_iter == supported_isas_.end() ? nullptr : &isareg_iter->second;
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}
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const Isa *IsaRegistry::GetIsa(const Isa::Version &version, bool xnack, bool ecc) {
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auto isareg_iter = supported_isas_.find(Isa(version, xnack, ecc).GetFullName());
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return isareg_iter == supported_isas_.end() ? nullptr : &isareg_iter->second;
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}
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const IsaRegistry::IsaMap IsaRegistry::supported_isas_ =
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IsaRegistry::GetSupportedIsas();
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const IsaRegistry::IsaMap IsaRegistry::GetSupportedIsas() {
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#define ISAREG_ENTRY_GEN(maj, min, stp, xnack, ecc) \
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Isa amd_amdgpu_##maj##min##stp##xnack##ecc; \
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amd_amdgpu_##maj##min##stp##xnack##ecc.version_ = Isa::Version(maj, min, stp); \
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amd_amdgpu_##maj##min##stp##xnack##ecc.xnackEnabled_ = xnack; \
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amd_amdgpu_##maj##min##stp##xnack##ecc.sramEcc_ = ecc; \
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supported_isas.insert(std::make_pair( \
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amd_amdgpu_##maj##min##stp##xnack##ecc.GetFullName(), \
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amd_amdgpu_##maj##min##stp##xnack##ecc)); \
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IsaMap supported_isas;
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ISAREG_ENTRY_GEN(7, 0, 0, false, false)
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ISAREG_ENTRY_GEN(7, 0, 1, false, false)
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ISAREG_ENTRY_GEN(7, 0, 2, false, false)
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ISAREG_ENTRY_GEN(8, 0, 1, false, false)
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ISAREG_ENTRY_GEN(8, 0, 1, true, false)
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ISAREG_ENTRY_GEN(8, 0, 2, false, false)
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ISAREG_ENTRY_GEN(8, 0, 2, true, false)
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ISAREG_ENTRY_GEN(8, 0, 3, false, false)
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ISAREG_ENTRY_GEN(8, 0, 3, true, false)
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ISAREG_ENTRY_GEN(8, 1, 0, false, false)
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ISAREG_ENTRY_GEN(8, 1, 0, true, false)
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ISAREG_ENTRY_GEN(9, 0, 0, false, false)
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ISAREG_ENTRY_GEN(9, 0, 0, true, false)
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ISAREG_ENTRY_GEN(9, 0, 2, false, false)
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ISAREG_ENTRY_GEN(9, 0, 2, true, false)
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ISAREG_ENTRY_GEN(9, 0, 4, false, false)
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ISAREG_ENTRY_GEN(9, 0, 4, true, false)
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ISAREG_ENTRY_GEN(9, 0, 6, false, false)
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ISAREG_ENTRY_GEN(9, 0, 6, true, false)
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ISAREG_ENTRY_GEN(9, 0, 6, false, true )
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ISAREG_ENTRY_GEN(9, 0, 6, true, true )
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ISAREG_ENTRY_GEN(9, 0, 8, false, false)
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ISAREG_ENTRY_GEN(9, 0, 8, true, false)
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ISAREG_ENTRY_GEN(9, 0, 8, false, true )
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ISAREG_ENTRY_GEN(9, 0, 8, true, true )
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ISAREG_ENTRY_GEN(10, 1, 0, false, false)
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ISAREG_ENTRY_GEN(10, 1, 0, true, false)
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ISAREG_ENTRY_GEN(10, 1, 1, false, false)
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ISAREG_ENTRY_GEN(10, 1, 1, true, false)
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ISAREG_ENTRY_GEN(10, 1, 2, false, false)
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ISAREG_ENTRY_GEN(10, 1, 2, true, false)
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return supported_isas;
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}
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} // namespace core
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