German Andryeyev 6604accdb3 SWDEV-501757 - Use signals without interrupts ...

In active wait mode use signals without interrupts by default and switch
to the interrupts only if a callback is required.

Change-Id: Ibcde8f7d44c70f8fb8fa5e0a7fdd8b08a2982a8e


[ROCm/clr commit: f4b9d3b7bd]

2024-12-09 15:16:15 -05:00

..

cmake

SWDEV-495609 - Change include path for rocclr/utils

2024-12-05 11:44:20 -05:00

compiler/lib

[SWDEV-469495] Compile blit kernels with -fsanitize=address when asan is enabled.

2024-08-27 01:27:31 -04:00

device

SWDEV-501757 - Use signals without interrupts

2024-12-09 15:16:15 -05:00

elf

SWDEV-1 - Remove unused code.

2022-05-19 08:54:15 -04:00

include

SWDEV-463865 - changed device,roc and pal namespaces to be nested under amd

2024-06-07 12:23:06 -04:00

os

SWDEV-440746 - Remove obsolete code

2024-04-22 09:56:42 -04:00

platform

SWDEV-485945 - use union to convert values

2024-12-04 11:15:03 -05:00

thread

SWDEV-480772 - Remove name variable from amd::Monitor class.

2024-09-19 11:55:01 -04:00

utils

SWDEV-497145 - Use rocr copyOnEngine API for staged copies

2024-12-04 13:38:13 -05:00

.gitattributes

SWDEV-1 - fix line endings for .asm files

2021-08-22 23:56:08 -07:00

.gitignore

Add .gitignore file.

2020-02-18 11:09:50 -05:00

CMakeLists.txt

SWDEV-293742 - Update copyright end year VDI repo

2021-08-22 23:56:07 -07:00

LICENSE.txt

SWDEV-293742 - Update copyright end year VDI repo

2021-08-22 23:56:07 -07:00