87f99e7ec6
* Add host APIs for querying device ctx and remote heap pointer * Host API to query device pointer for ROCSHMEM_DEFAULT_CONTEXT, this is needed to support dynamic module initialization via device kernel library bitcode. * Host API to query remote symmetric heap pointer that can be used in custom device kernel for RMA operations. * Added rocshmem_ptr implementation within the Host Context class * Enables pointer retrieval functionality for symmetric data objects * Copy IPC pointers to host memory in RO host context --------- Co-authored-by: avinashkethineedi <avinash.kethineedi@amd.com>
198 lines
5.9 KiB
C++
198 lines
5.9 KiB
C++
/******************************************************************************
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* Copyright (c) Advanced Micro Devices, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*****************************************************************************/
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#ifndef LIBRARY_SRC_IPC_POLICY_HPP_
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#define LIBRARY_SRC_IPC_POLICY_HPP_
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#include <hip/hip_runtime.h>
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#include <mpi.h>
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#include <atomic>
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#include <vector>
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#include "rocshmem/rocshmem_config.h" // NOLINT(build/include_subdir)
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#include "memory/hip_allocator.hpp"
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#include "util.hpp"
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#include "bootstrap/bootstrap.hpp"
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namespace rocshmem {
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class Backend;
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class Context;
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class IpcOnImpl {
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using HEAP_BASES_T = std::vector<char *, StdAllocatorHIP<char *>>;
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public:
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int shm_rank{0};
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int shm_size{0};
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char **ipc_bases{nullptr};
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int *pes_with_ipc_avail{nullptr};
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__host__ void ipcHostInit(int my_pe, const HEAP_BASES_T &heap_bases,
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MPI_Comm thread_comm);
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__host__ void ipcHostInit(int my_pe, const HEAP_BASES_T &heap_bases,
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TcpBootstrap *bootstrap);
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__host__ void ipcHostStop();
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__host__ __device__ bool isIpcAvailable(int my_pe, int target_pe, int *local_target_pe) {
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if (nullptr == pes_with_ipc_avail) { return false; }
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for (int i=0; i<shm_size; i++) {
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if (pes_with_ipc_avail[i] == target_pe) {
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*local_target_pe = i;
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return true;
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}
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}
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return false;
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}
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__device__ void ipcGpuInit(Backend *gpu_backend, Context *ctx, int thread_id);
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__device__ void ipcCopy(void *dst, void *src, size_t size);
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__device__ void ipcCopy_wg(void *dst, void *src, size_t size);
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__device__ void ipcCopy_wave(void *dst, void *src, size_t size);
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__device__ void ipcFence() { __threadfence_system(); }
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template <typename T>
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__device__ T ipcAMOFetchAdd(T *val, T value) {
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return __hip_atomic_fetch_add(val, value, __ATOMIC_SEQ_CST,
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__HIP_MEMORY_SCOPE_SYSTEM);
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}
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template <typename T>
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__device__ T ipcAMOFetchCas(T *val, T cond, T value) {
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__hip_atomic_compare_exchange_strong(val, &cond, value, __ATOMIC_SEQ_CST,
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__ATOMIC_SEQ_CST,
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__HIP_MEMORY_SCOPE_SYSTEM);
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return cond;
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}
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template <typename T>
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__device__ void ipcAMOAdd(T *val, T value) {
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__hip_atomic_fetch_add(val, value, __ATOMIC_SEQ_CST,
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__HIP_MEMORY_SCOPE_SYSTEM);
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}
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template <typename T>
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__device__ void ipcAMOCas(T *val, T cond, T value) {
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__hip_atomic_compare_exchange_strong(val, &cond, value, __ATOMIC_SEQ_CST,
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__ATOMIC_SEQ_CST,
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__HIP_MEMORY_SCOPE_SYSTEM);
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}
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template <typename T>
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__device__ void ipcAMOSet(T *val, T value) {
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__hip_atomic_store(val, value, __ATOMIC_SEQ_CST, __HIP_MEMORY_SCOPE_SYSTEM);
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}
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__device__ void zero_byte_read(int pe) {
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int local_pe = pe % shm_size;
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uint32_t *pe_ipc_base = reinterpret_cast<uint32_t *>(ipc_bases[local_pe]);
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volatile uint32_t read_value = __hip_atomic_load(
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pe_ipc_base, __ATOMIC_SEQ_CST, __HIP_MEMORY_SCOPE_SYSTEM);
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}
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};
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// clang-format off
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NOWARN(-Wunused-parameter,
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class IpcOffImpl {
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using HEAP_BASES_T = std::vector<char *, StdAllocatorHIP<char *>>;
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public:
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int shm_rank{0};
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uint32_t shm_size{0};
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char **ipc_bases{nullptr};
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int *pes_with_ipc_avail{nullptr};
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__host__ void ipcHostInit(int my_pe, const HEAP_BASES_T &heap_bases,
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MPI_Comm thread_comm) {}
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__host__ void ipcHostInit(int my_pe, const HEAP_BASES_T &heap_bases,
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TcpBootstrap *bootstrap){}
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__host__ void ipcHostStop() {}
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__host__ __device__ bool isIpcAvailable(int my_pe, int target_pe, int *local_target_pe) { return false; }
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__device__ void ipcGpuInit(Backend *rocshmem_handle, Context *ctx,
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int thread_id) {}
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__device__ void ipcCopy(void *dst, void *src, size_t size) {}
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__device__ void ipcCopy_wg(void *dst, void *src, size_t size) {}
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__device__ void ipcCopy_wave(void *dst, void *src, size_t size) {}
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__device__ void ipcFence() {}
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template <typename T>
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__device__ T ipcAMOFetchAdd(T *val, T value) {
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return T();
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}
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template <typename T>
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__device__ T ipcAMOFetchCas(T *val, T cond, T value) {
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return T();
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}
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template <typename T>
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__device__ void ipcAMOAdd(T *val, T value) {}
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template <typename T>
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__device__ void ipcAMOSet(T *val, T value) {}
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template <typename T>
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__device__ void ipcAMOCas(T *val, T cond, T value) {}
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__device__ void zero_byte_read(int pe) {}
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};
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)
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// clang-format on
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/*
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* Select which one of our IPC policies to use at compile time.
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*/
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#ifdef USE_IPC
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typedef IpcOnImpl IpcImpl;
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#else
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typedef IpcOffImpl IpcImpl;
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#endif
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} // namespace rocshmem
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#endif // LIBRARY_SRC_IPC_POLICY_HPP_
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