Files
rocm-systems/projects/clr/rocclr/runtime/device/rocm/rocsettings.hpp
T
foreman 8ca4c76180 P4 to Git Change 1397729 by kzhuravl@kzhuravl-fiji-ocllc on 2017/04/12 20:05:08
SWDEV-116535 - Report CL_FP_DENORM for single fp config for gfx9 for LC for rocm/pal and force denorms on based on AMD_GPU_FORCE_SINGLE_FP_DENORM for rocm.

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palsettings.cpp#23 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocdevice.cpp#47 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocprogram.cpp#62 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocsettings.cpp#16 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocsettings.hpp#7 edit


[ROCm/clr commit: c7e04f3222]
2017-04-12 19:14:23 -05:00

79 lines
2.3 KiB
C++

//
// Copyright (c) 2010 Advanced Micro Devices, Inc. All rights reserved.
//
#pragma once
#ifndef WITHOUT_HSA_BACKEND
#include "library.hpp"
/*! \addtogroup HSA OCL Stub Implementation
* @{
*/
//! HSA OCL STUB Implementation
namespace roc {
//! Device settings
class Settings : public device::Settings
{
public:
union {
struct {
uint doublePrecision_: 1; //!< Enables double precision support
uint pollCompletion_: 1; //!< Enables polling in HSA
uint enableLocalMemory_ : 1; //!< Enable GPUVM memory
uint enableImageHandle_: 1; //!< Use HSAIL image/sampler pointer
uint enableNCMode_: 1; //!< Enable Non Coherent mode for system memory
uint enablePartialDispatch_: 1; //!< Enable support for Partial Dispatch
uint imageDMA_: 1; //!< Enable direct image DMA transfers
uint stagedXferRead_: 1; //!< Uses a staged buffer read
uint stagedXferWrite_: 1; //!< Uses a staged buffer write
uint singleFpDenorm_: 1; //!< Support Single FP Denorm
uint reserved_: 21;
};
uint value_;
};
//! Default max workgroup size for 1D
int maxWorkGroupSize_;
//! Default max workgroup sizes for 2D
int maxWorkGroupSize2DX_;
int maxWorkGroupSize2DY_;
//! Default max workgroup sizes for 3D
int maxWorkGroupSize3DX_;
int maxWorkGroupSize3DY_;
int maxWorkGroupSize3DZ_;
uint kernargPoolSize_;
uint signalPoolSize_;
size_t xferBufSize_; //!< Transfer buffer size for image copy optimization
size_t stagedXferSize_; //!< Staged buffer size
size_t pinnedXferSize_; //!< Pinned buffer size for transfer
size_t pinnedMinXferSize_; //!< Minimal buffer size for pinned transfer
//! Default constructor
Settings();
//! Creates settings
bool create(bool fullProfile, int gfxipVersion);
private:
//! Disable copy constructor
Settings(const Settings&);
//! Disable assignment
Settings& operator=(const Settings&);
//! Overrides current settings based on registry/environment
void override();
};
/*@}*/} // namespace roc
#endif /*WITHOUT_HSA_BACKEND*/