92fb1abaf2
* Update roc_shmem_ctx_fence API to use team-relative PE numbering * Update backend to populate team_opaque member of ROC_SHMEM_CTX_DEFAULT (used to store information about the team wrt TEAM_WORLD)
165 lines
5.9 KiB
C++
165 lines
5.9 KiB
C++
/******************************************************************************
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* Copyright (c) 2024 Advanced Micro Devices, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*****************************************************************************/
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#include "context_ipc_device.hpp"
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#include "context_ipc_tmpl_device.hpp"
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#include <hip/hip_runtime.h>
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#include <hip/amd_detail/amd_device_functions.h>
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#include <unistd.h>
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#include <cstdio>
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#include <cstdlib>
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#include "config.h" // NOLINT(build/include_subdir)
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#include "roc_shmem/roc_shmem.hpp"
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#include "backend_ipc.hpp"
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namespace rocshmem {
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__host__ IPCContext::IPCContext(Backend *b)
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: Context(b, false) {
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IPCBackend *backend{static_cast<IPCBackend *>(b)};
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ipcImpl_.ipc_bases = b->ipcImpl.ipc_bases;
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ipcImpl_.shm_size = b->ipcImpl.shm_size;
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auto *bp{backend->ipc_backend_proxy.get()};
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barrier_sync = backend->barrier_sync;
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g_ret = bp->g_ret;
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atomic_base_ptr = bp->atomic_ret->atomic_base_ptr;
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fence_pool = backend->fence_pool;
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orders_.store = detail::atomic::rocshmem_memory_order::memory_order_seq_cst;
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}
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__device__ void IPCContext::threadfence_system() {
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}
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__device__ void IPCContext::ctx_create() {
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}
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__device__ void IPCContext::ctx_destroy(){
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}
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__device__ void IPCContext::putmem(void *dest, const void *source, size_t nelems,
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int pe) {
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uint64_t L_offset =
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reinterpret_cast<char *>(dest) - ipcImpl_.ipc_bases[my_pe];
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ipcImpl_.ipcCopy(ipcImpl_.ipc_bases[pe] + L_offset,
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const_cast<void *>(source), nelems);
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}
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__device__ void IPCContext::getmem(void *dest, const void *source, size_t nelems,
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int pe) {
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const char *src_typed = reinterpret_cast<const char *>(source);
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uint64_t L_offset =
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const_cast<char *>(src_typed) - ipcImpl_.ipc_bases[my_pe];
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ipcImpl_.ipcCopy(dest, ipcImpl_.ipc_bases[pe] + L_offset, nelems);
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}
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__device__ void IPCContext::putmem_nbi(void *dest, const void *source,
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size_t nelems, int pe) {
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putmem(dest, source, nelems, pe);
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}
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__device__ void IPCContext::getmem_nbi(void *dest, const void *source,
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size_t nelems, int pe) {
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getmem(dest, source, nelems, pe);
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}
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__device__ void IPCContext::fence() {
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for (int i{0}, j{tinfo->pe_start}; i < tinfo->size; i++, j += tinfo->stride) {
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detail::atomic::store<int, detail::atomic::memory_scope_system>(&fence_pool[j], 1, orders_);
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}
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}
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__device__ void IPCContext::fence(int pe) {
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detail::atomic::store<int, detail::atomic::memory_scope_system>(&fence_pool[pe], 1, orders_);
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}
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__device__ void IPCContext::quiet() {
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fence();
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}
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__device__ void *IPCContext::shmem_ptr(const void *dest, int pe) {
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void *ret = nullptr;
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return ret;
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}
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__device__ void IPCContext::putmem_wg(void *dest, const void *source,
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size_t nelems, int pe) {
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uint64_t L_offset =
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reinterpret_cast<char *>(dest) - ipcImpl_.ipc_bases[my_pe];
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ipcImpl_.ipcCopy_wg(ipcImpl_.ipc_bases[pe] + L_offset,
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const_cast<void *>(source), nelems);
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__syncthreads();
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}
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__device__ void IPCContext::getmem_wg(void *dest, const void *source,
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size_t nelems, int pe) {
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const char *src_typed = reinterpret_cast<const char *>(source);
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uint64_t L_offset =
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const_cast<char *>(src_typed) - ipcImpl_.ipc_bases[my_pe];
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ipcImpl_.ipcCopy_wg(dest, ipcImpl_.ipc_bases[pe] + L_offset, nelems);
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__syncthreads();
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}
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__device__ void IPCContext::putmem_nbi_wg(void *dest, const void *source,
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size_t nelems, int pe) {
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putmem_wg(dest, source, nelems, pe);
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}
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__device__ void IPCContext::getmem_nbi_wg(void *dest, const void *source,
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size_t nelems, int pe) {
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getmem_wg(dest, source, nelems, pe);
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}
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__device__ void IPCContext::putmem_wave(void *dest, const void *source,
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size_t nelems, int pe) {
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uint64_t L_offset =
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reinterpret_cast<char *>(dest) - ipcImpl_.ipc_bases[my_pe];
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ipcImpl_.ipcCopy_wave(ipcImpl_.ipc_bases[pe] + L_offset,
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const_cast<void *>(source), nelems);
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}
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__device__ void IPCContext::getmem_wave(void *dest, const void *source,
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size_t nelems, int pe) {
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const char *src_typed = reinterpret_cast<const char *>(source);
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uint64_t L_offset =
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const_cast<char *>(src_typed) - ipcImpl_.ipc_bases[my_pe];
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ipcImpl_.ipcCopy_wave(dest, ipcImpl_.ipc_bases[pe] + L_offset,
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nelems);
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}
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__device__ void IPCContext::putmem_nbi_wave(void *dest, const void *source,
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size_t nelems, int pe) {
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putmem_wave(dest, source, nelems, pe);
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}
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__device__ void IPCContext::getmem_nbi_wave(void *dest, const void *source,
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size_t nelems, int pe) {
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getmem_wave(dest, source, nelems, pe);
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}
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} // namespace rocshmem
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