foreman
93e45cff4e
SWDEV-101315 - Fix PerfCounter not working under CodeXL. 1. Need to map ORCA PerfCounter block to PAL PerfCounter block/instance. 2. CodeXL could try to create PerfCouters that don't exist in HW, so need to handle that and return 0 as result. Affected files ... ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palcounters.cpp#5 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palcounters.hpp#6 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palvirtual.cpp#21 edit
417 línte
11 KiB
C++
417 línte
11 KiB
C++
//
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// Copyright (c) 2015 Advanced Micro Devices, Inc. All rights reserved.
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//
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#include "device/pal/palcounters.hpp"
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#include "device/pal/palvirtual.hpp"
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#include <array>
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namespace pal {
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PalCounterReference*
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PalCounterReference::Create(VirtualGPU& gpu)
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{
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Pal::Result result;
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// Create performance experiment
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Pal::PerfExperimentCreateInfo createInfo = {};
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createInfo.optionFlags.sampleInternalOperations = 1;
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createInfo.optionFlags.cacheFlushOnCounterCollection = 1;
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createInfo.optionFlags.sqShaderMask = 1;
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createInfo.optionValues.sampleInternalOperations = true;
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createInfo.optionValues.cacheFlushOnCounterCollection = true;
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createInfo.optionValues.sqShaderMask = Pal::PerfShaderMaskCs;
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size_t palExperSize = gpu.dev().iDev()->GetPerfExperimentSize(
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createInfo, &result);
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if (result != Pal::Result::Success) {
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return nullptr;
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}
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PalCounterReference* memRef = new (palExperSize) PalCounterReference(gpu);
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if (memRef != nullptr) {
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result = gpu.dev().iDev()->CreatePerfExperiment(createInfo,
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&memRef[1], &memRef->perfExp_);
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if (result != Pal::Result::Success) {
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memRef->release();
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return nullptr;
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}
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}
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return memRef;
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}
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PalCounterReference::~PalCounterReference()
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{
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// The counter object is always associated with a particular queue,
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// so we have to lock just this queue
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amd::ScopedLock lock(gpu_.execution());
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if (layout_ != nullptr) {
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delete layout_;
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}
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if (memory_ != nullptr) {
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delete memory_;
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}
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if (nullptr != iPerf()) {
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iPerf()->Destroy();
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}
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}
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uint64_t PalCounterReference::result(int index)
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{
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if (index < 0) {
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// These are counters that have no corresponding PalSample created
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return 0;
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}
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if (layout_ != nullptr) {
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assert(index <= layout_->sampleCount && "index not in range");
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const Pal::GlobalSampleLayout& sample = layout_->samples[index];
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if (sample.dataType == Pal::PerfCounterDataType::Uint32) {
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uint32_t beginVal = *reinterpret_cast<uint32_t*>(reinterpret_cast<char*>(cpuAddr_) + sample.beginValueOffset);
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uint32_t endVal = *reinterpret_cast<uint32_t*>(reinterpret_cast<char*>(cpuAddr_) + sample.endValueOffset);
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return (endVal - beginVal);
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}
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else if (sample.dataType == Pal::PerfCounterDataType::Uint64) {
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uint64_t beginVal = *reinterpret_cast<uint64_t*>(reinterpret_cast<char*>(cpuAddr_) + sample.beginValueOffset);
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uint64_t endVal = *reinterpret_cast<uint64_t*>(reinterpret_cast<char*>(cpuAddr_) + sample.endValueOffset);
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return (endVal - beginVal);
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}
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else {
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assert(0 && "dataType should be either Uint32 or Uint64");
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return 0;
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}
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}
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return 0;
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}
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bool PalCounterReference::finalize()
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{
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Pal::Result result;
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iPerf()->Finalize();
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// Acquire GPU memory for the query from the pool and bind it.
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Pal::GpuMemoryRequirements gpuMemReqs = {};
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iPerf()->GetGpuMemoryRequirements(&gpuMemReqs);
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memory_ = new Memory(gpu().dev(), amd::alignUp(gpuMemReqs.size, gpuMemReqs.alignment));
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if (nullptr == memory_) {
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return false;
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}
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if (!memory_->create(Resource::Remote)) {
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return false;
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}
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cpuAddr_ = memory_->cpuMap(gpu_);
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if (nullptr == cpuAddr_) {
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return false;
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}
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gpu_.queue(gpu_.engineID_).addMemRef(memory_->iMem());
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result = iPerf()->BindGpuMemory(memory_->iMem(), 0);
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if (result == Pal::Result::Success) {
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Pal::GlobalCounterLayout layout = {};
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iPerf()->GetGlobalCounterLayout(&layout);
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assert(layout.sampleCount == numExpCounters_);
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size_t size = sizeof(Pal::GlobalCounterLayout) + (sizeof(Pal::GlobalSampleLayout) * (layout.sampleCount - 1));
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layout_ = reinterpret_cast<Pal::GlobalCounterLayout*>(new char[size]);
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if (layout_ != nullptr) {
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layout_->sampleCount = layout.sampleCount;
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iPerf()->GetGlobalCounterLayout(layout_);
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}
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return true;
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}
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else {
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return false;
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}
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}
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// Converting from ORCA cmndefs.h to PAL palPerfExperiment.h
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static const
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std::array<std::pair<int, int>, 83> ciBlockIdOrcaToPal =
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{{
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{0x0F, 0}, // CB0
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{0x0F, 1}, // CB1
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{0x0F, 2}, // CB2
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{0x0F, 3}, // CB3
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{0x01, 0}, // CPF
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{0x0E, 0}, // DB0
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{0x0E, 1}, // DB1
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{0x0E, 2}, // DB2
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{0x0E, 3}, // DB3
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{0x12, 0}, // GRBM
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{0x13, 0}, // GRBMSE
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{0x04, 0}, // PA_SU
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{0x04, 0}, // PA_SC
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{0x06, 0}, // SPI
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{0x07, 0}, // SQ
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{0x07, 0}, // SQ_ES
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{0x07, 0}, // SQ_GS
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{0x07, 0}, // SQ_VS
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{0x07, 0}, // SQ_PS
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{0x07, 0}, // SQ_LS
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{0x07, 0}, // SQ_HS
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{0x07, 0}, // SQ_CS
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{0x08, 0}, // SX
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{0x09, 0}, // TA0
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{0x09, 1}, // TA1
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{0x09, 2}, // TA2
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{0x09, 3}, // TA3
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{0x09, 4}, // TA4
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{0x09, 5}, // TA5
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{0x09, 6}, // TA6
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{0x09, 7}, // TA7
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{0x09, 8}, // TA8
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{0x09, 9}, // TA9
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{0x09, 0x0a}, // TA10
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{0x0D, 0}, // TCA0
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{0x0D, 1}, // TCA1
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{0x0C, 0}, // TCC0
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{0x0C, 1}, // TCC1
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{0x0C, 2}, // TCC2
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{0x0C, 3}, // TCC3
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{0x0C, 4}, // TCC4
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{0x0C, 5}, // TCC5
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{0x0C, 6}, // TCC6
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{0x0C, 7}, // TCC7
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{0x0C, 8}, // TCC8
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{0x0C, 9}, // TCC9
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{0x0C, 0x0a}, // TCC10
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{0x0C, 0x0b}, // TCC11
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{0x0C, 0x0c}, // TCC12
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{0x0C, 0x0d}, // TCC13
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{0x0C, 0x0e}, // TCC14
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{0x0C, 0x0f}, // TCC15
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{0x0A, 0}, // TD0
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{0x0A, 1}, // TD1
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{0x0A, 2}, // TD2
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{0x0A, 3}, // TD3
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{0x0A, 4}, // TD4
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{0x0A, 5}, // TD5
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{0x0A, 6}, // TD6
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{0x0A, 7}, // TD7
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{0x0A, 8}, // TD8
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{0x0A, 9}, // TD9
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{0x0A, 0x0a}, // TD10
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{0x0B, 0}, // TCP0
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{0x0B, 1}, // TCP1
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{0x0B, 2}, // TCP2
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{0x0B, 3}, // TCP3
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{0x0B, 4}, // TCP4
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{0x0B, 5}, // TCP5
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{0x0B, 6}, // TCP6
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{0x0B, 7}, // TCP7
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{0x0B, 8}, // TCP8
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{0x0B, 9}, // TCP9
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{0x0B, 0x0a}, // TCP10
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{0x10, 0}, // GDS
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{0x03, 0}, // VGT
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{0x02, 0}, // IA
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{0x16, 0}, // MC
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{0x11, 0}, // SRBM
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{0x1a, 0}, // TCS
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{0x19, 0}, // WD
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{0x17, 0}, // CPG
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{0x18, 0}, // CPC
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}};
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static const
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std::array<std::pair<int, int>, 98> viBlockIdOrcaToPal =
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{{
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{0x0F, 0}, // CB0
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{0x0F, 1}, // CB1
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{0x0F, 2}, // CB2
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{0x0F, 3}, // CB3
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{0x01, 0}, // CPF
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{0x0E, 0}, // DB0
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{0x0E, 1}, // DB1
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{0x0E, 2}, // DB2
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{0x0E, 3}, // DB3
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{0x12, 0}, // GRBM
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{0x13, 0}, // GRBMSE
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{0x04, 0}, // PA_SU
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{0x04, 0}, // PA_SC
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{0x06, 0}, // SPI
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{0x07, 0}, // SQ
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{0x07, 0}, // SQ_ES
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{0x07, 0}, // SQ_GS
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{0x07, 0}, // SQ_VS
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{0x07, 0}, // SQ_PS
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{0x07, 0}, // SQ_LS
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{0x07, 0}, // SQ_HS
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{0x07, 0}, // SQ_CS
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{0x08, 0}, // SX
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{0x09, 0}, // TA0
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{0x09, 1}, // TA1
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{0x09, 2}, // TA2
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{0x09, 3}, // TA3
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{0x09, 4}, // TA4
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{0x09, 5}, // TA5
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{0x09, 6}, // TA6
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{0x09, 7}, // TA7
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{0x09, 8}, // TA8
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{0x09, 9}, // TA9
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{0x09, 0x0a}, // TA10
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{0x09, 0x0b}, // TA11
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{0x09, 0x0c}, // TA12
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{0x09, 0x0d}, // TA13
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{0x09, 0x0e}, // TA14
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{0x09, 0x0f}, // TA15
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{0x0D, 0}, // TCA0
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{0x0D, 1}, // TCA1
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{0x0C, 0}, // TCC0
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{0x0C, 1}, // TCC1
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{0x0C, 2}, // TCC2
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{0x0C, 3}, // TCC3
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{0x0C, 4}, // TCC4
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{0x0C, 5}, // TCC5
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{0x0C, 6}, // TCC6
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{0x0C, 7}, // TCC7
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{0x0C, 8}, // TCC8
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{0x0C, 9}, // TCC9
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{0x0C, 0x0a}, // TCC10
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{0x0C, 0x0b}, // TCC11
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{0x0C, 0x0c}, // TCC12
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{0x0C, 0x0d}, // TCC13
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{0x0C, 0x0e}, // TCC14
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{0x0C, 0x0f}, // TCC15
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{0x0A, 0}, // TD0
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{0x0A, 1}, // TD1
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{0x0A, 2}, // TD2
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{0x0A, 3}, // TD3
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{0x0A, 4}, // TD4
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{0x0A, 5}, // TD5
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{0x0A, 6}, // TD6
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{0x0A, 7}, // TD7
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{0x0A, 8}, // TD8
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{0x0A, 9}, // TD9
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{0x0A, 0x0a}, // TD10
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{0x0A, 0x0b}, // TD11
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{0x0A, 0x0c}, // TD12
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{0x0A, 0x0d}, // TD13
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{0x0A, 0x0e}, // TD14
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{0x0A, 0x0f}, // TD15
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{0x0B, 0}, // TCP0
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{0x0B, 1}, // TCP1
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{0x0B, 2}, // TCP2
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{0x0B, 3}, // TCP3
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{0x0B, 4}, // TCP4
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{0x0B, 5}, // TCP5
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{0x0B, 6}, // TCP6
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{0x0B, 7}, // TCP7
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{0x0B, 8}, // TCP8
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{0x0B, 9}, // TCP9
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{0x0B, 0x0a}, // TCP10
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{0x0B, 0x0b}, // TCP11
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{0x0B, 0x0c}, // TCP12
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{0x0B, 0x0d}, // TCP13
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{0x0B, 0x0e}, // TCP14
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{0x0B, 0x0f}, // TCP15
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{0x10, 0}, // GDS
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{0x03, 0}, // VGT
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{0x02, 0}, // IA
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{0x16, 0}, // MC
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{0x11, 0}, // SRBM
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{0x19, 0}, // WD
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{0x17, 0}, // CPG
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{0x18, 0}, // CPC
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}};
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void PerfCounter::convertInfo()
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{
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switch (dev().ipLevel()) {
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case Pal::GfxIpLevel::GfxIp7:
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if (info_.blockIndex_ < ciBlockIdOrcaToPal.size()) {
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auto p = ciBlockIdOrcaToPal[info_.blockIndex_];
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info_.blockIndex_ = std::get<0>(p);
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info_.counterIndex_ = std::get<1>(p);
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}
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break;
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case Pal::GfxIpLevel::GfxIp8:
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if (info_.blockIndex_ < viBlockIdOrcaToPal.size()) {
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auto p = viBlockIdOrcaToPal[info_.blockIndex_];
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info_.blockIndex_ = std::get<0>(p);
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info_.counterIndex_ = std::get<1>(p);
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}
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break;
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case Pal::GfxIpLevel::GfxIp9:
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Unimplemented();
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break;
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default:
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Unimplemented();
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break;
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}
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}
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PerfCounter::~PerfCounter()
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{
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if (palRef_ == nullptr) {
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return;
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}
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// Release the counter reference object
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palRef_->release();
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}
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bool
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PerfCounter::create()
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{
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palRef_->retain();
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// Initialize the counter
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Pal::PerfCounterInfo counterInfo = {};
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counterInfo.counterType = Pal::PerfCounterType::Global;
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counterInfo.block = static_cast<Pal::GpuBlock>(info_.blockIndex_);
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counterInfo.instance = info_.counterIndex_;
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counterInfo.eventId = info_.eventIndex_;
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Pal::Result result = iPerf()->AddCounter(counterInfo);
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if (result == Pal::Result::Success) {
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index_ = palRef_->getPalCounterIndex();
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return true;
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}
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else {
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// Get here when there's no HW PerfCounter matching the counterInfo
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index_ = -1;
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return false;
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}
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}
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uint64_t
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PerfCounter::getInfo(uint64_t infoType) const
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{
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switch (infoType) {
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case CL_PERFCOUNTER_GPU_BLOCK_INDEX: {
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// Return the GPU block index
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return info()->blockIndex_;
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}
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case CL_PERFCOUNTER_GPU_COUNTER_INDEX: {
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// Return the GPU counter index
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return info()->counterIndex_;
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}
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case CL_PERFCOUNTER_GPU_EVENT_INDEX: {
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// Return the GPU event index
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return info()->eventIndex_;
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}
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case CL_PERFCOUNTER_DATA: {
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return palRef_->result(index_);
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}
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default:
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LogError("Wrong PerfCounter::getInfo parameter");
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}
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return 0;
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}
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} // namespace pal
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