7d2bc9d113
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1250152]
188 lines
6.6 KiB
C++
188 lines
6.6 KiB
C++
////////////////////////////////////////////////////////////////////////////////
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//
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// The University of Illinois/NCSA
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// Open Source License (NCSA)
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//
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// Copyright (c) 2014-2015, Advanced Micro Devices, Inc. All rights reserved.
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//
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// Developed by:
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//
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// AMD Research and AMD HSA Software Development
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//
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// Advanced Micro Devices, Inc.
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//
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// www.amd.com
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to
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// deal with the Software without restriction, including without limitation
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// the rights to use, copy, modify, merge, publish, distribute, sublicense,
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// and/or sell copies of the Software, and to permit persons to whom the
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// Software is furnished to do so, subject to the following conditions:
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//
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// - Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimers.
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// - Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimers in
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// the documentation and/or other materials provided with the distribution.
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// - Neither the names of Advanced Micro Devices, Inc,
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// nor the names of its contributors may be used to endorse or promote
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// products derived from this Software without specific prior written
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// permission.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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// THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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// OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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// DEALINGS WITH THE SOFTWARE.
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//
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////////////////////////////////////////////////////////////////////////////////
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#ifndef HSA_RUNTME_CORE_SIGNAL_CPP_
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#define HSA_RUNTME_CORE_SIGNAL_CPP_
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#include "core/inc/signal.h"
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#include "core/util/timer.h"
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#include <algorithm>
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namespace core {
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uint32_t Signal::WaitAny(uint32_t signal_count, hsa_signal_t* hsa_signals,
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hsa_signal_condition_t* conds,
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hsa_signal_value_t* values, uint64_t timeout,
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hsa_wait_state_t wait_hint,
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hsa_signal_value_t* satisfying_value) {
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hsa_signal_handle* signals =
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reinterpret_cast<hsa_signal_handle*>(hsa_signals);
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uint32_t prior = 0;
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for (uint32_t i = 0; i < signal_count; i++)
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prior = Max(prior, atomic::Increment(&signals[i]->waiting_));
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MAKE_SCOPE_GUARD([&]() {
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for (uint32_t i = 0; i < signal_count; i++)
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atomic::Decrement(&signals[i]->waiting_);
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});
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// Allow only the first waiter to sleep (temporary, known to be bad).
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if (prior != 0) wait_hint = HSA_WAIT_STATE_ACTIVE;
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// Ensure that all signals in the list can be slept on.
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if (wait_hint != HSA_WAIT_STATE_ACTIVE) {
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for (uint32_t i = 0; i < signal_count; i++) {
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if (signals[i]->EopEvent() == NULL) {
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wait_hint = HSA_WAIT_STATE_ACTIVE;
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break;
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}
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}
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}
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const uint32_t small_size = 10;
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HsaEvent* short_evts[small_size];
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HsaEvent** evts = NULL;
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uint32_t unique_evts = 0;
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if (wait_hint != HSA_WAIT_STATE_ACTIVE) {
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if (signal_count > small_size)
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evts = new HsaEvent* [signal_count];
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else
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evts = short_evts;
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for (uint32_t i = 0; i < signal_count; i++)
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evts[i] = signals[i]->EopEvent();
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std::sort(evts, evts + signal_count);
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HsaEvent** end = std::unique(evts, evts + signal_count);
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unique_evts = uint32_t(end - evts);
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}
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MAKE_SCOPE_GUARD([&]() {
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if (signal_count > small_size) delete[] evts;
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});
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int64_t value;
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timer::fast_clock::time_point start_time = timer::fast_clock::now();
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// Set a polling timeout value
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// Exact time is not hugely important, it should just be a short while which
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// is smaller than the thread scheduling quantum (usually around 16ms)
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const timer::fast_clock::duration kMaxElapsed = std::chrono::milliseconds(5);
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// Convert timeout value into the fast_clock domain
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uint64_t hsa_freq;
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HSA::hsa_system_get_info(HSA_SYSTEM_INFO_TIMESTAMP_FREQUENCY, &hsa_freq);
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const timer::fast_clock::duration fast_timeout =
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timer::duration_from_seconds<timer::fast_clock::duration>(
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double(timeout) / double(hsa_freq));
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bool condition_met = false;
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while (true) {
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for (uint32_t i = 0; i < signal_count; i++) {
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if (signals[i]->invalid_) return uint32_t(-1);
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// Handling special event.
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if (signals[i]->EopEvent() != NULL) {
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const HSA_EVENTTYPE event_type =
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signals[i]->EopEvent()->EventData.EventType;
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if (event_type == HSA_EVENTTYPE_MEMORY) {
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const HsaMemoryAccessFault& fault =
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signals[i]->EopEvent()->EventData.EventData.MemoryAccessFault;
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const uint32_t* failure =
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reinterpret_cast<const uint32_t*>(&fault.Failure);
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if (*failure != 0) {
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return i;
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}
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}
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}
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value =
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atomic::Load(&signals[i]->signal_.value, std::memory_order_relaxed);
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switch (conds[i]) {
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case HSA_SIGNAL_CONDITION_EQ: {
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condition_met = (value == values[i]);
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break;
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}
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case HSA_SIGNAL_CONDITION_NE: {
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condition_met = (value != values[i]);
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break;
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}
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case HSA_SIGNAL_CONDITION_GTE: {
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condition_met = (value >= values[i]);
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break;
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}
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case HSA_SIGNAL_CONDITION_LT: {
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condition_met = (value < values[i]);
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break;
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}
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default:
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return uint32_t(-1);
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}
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if (condition_met) {
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if (satisfying_value != NULL) *satisfying_value = value;
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return i;
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}
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}
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timer::fast_clock::time_point time = timer::fast_clock::now();
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if (time - start_time > kMaxElapsed) {
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if (time - start_time > fast_timeout) {
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return uint32_t(-1);
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}
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if (wait_hint != HSA_WAIT_STATE_ACTIVE) {
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uint32_t wait_ms;
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auto time_remaining = fast_timeout - (time - start_time);
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if ((timeout == -1) ||
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(time_remaining > std::chrono::milliseconds(uint32_t(-1))))
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wait_ms = uint32_t(-1);
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else
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wait_ms = timer::duration_cast<std::chrono::milliseconds>(
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time_remaining).count();
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hsaKmtWaitOnMultipleEvents(evts, unique_evts, false, wait_ms);
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}
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}
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}
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}
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} // namespace core
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#endif // header guard
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