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rocm-systems/tests/workloads/ipblocks_SQ_TA/MI100/pmc_perf.csv
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JoseSantosAMD da506ad9b5 Pytest add mi200 to analyze workloads (#334) 
* Updated links in documentation. (#328)

Updated to reflect new GitHub organization.
Fixed broken links to GitHub pages.

Signed-off-by: David Galiffi <David.Galiffi@amd.com>

* update branch for 2.x documentation builds

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* update checkout action and use concurrency instead of cancel-workflow-action

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* test addition of user option for container launch

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* remove --user option for container, try chown instead

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* fixing yaml syntax

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* reorder job step - start with checkout

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* restore missing run directive

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* Update workloads to include log.txt
Add missing MI200 workloads

Signed-off-by: Jose Santos <josantos@amd.com>

* Signed-off-by: Jose Santos <josantos@amd.com>
Add vcopy workload for tests

* Change exit codes for caught failures

Signed-off-by: Jose Santos <josantos@amd.com>

* reformat

Signed-off-by: Jose Santos <josantos@amd.com>

* Add pytest-xdist for pytest -n

Signed-off-by: Jose Santos <josantos@amd.com>

---------

Signed-off-by: David Galiffi <David.Galiffi@amd.com>
Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>
Signed-off-by: Jose Santos <josantos@amd.com>
Co-authored-by: David Galiffi <David.Galiffi@amd.com>
Co-authored-by: Karl W. Schulz <karl.schulz@amd.com>
2024-04-01 14:30:21 -05:00

4.1 KiB
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1Dispatch_IDKernel_NameGPU_IDGrid_SizeWorkgroup_SizeLDS_Per_WorkgroupScratch_Per_WorkitemArch_VGPRAccum_VGPRSGPRwave_sizeobjSQC_DCACHE_REQSQC_DCACHE_HITSSQC_DCACHE_MISSESSQC_DCACHE_MISSES_DUPLICATESQC_DCACHE_REQ_READ_1SQC_DCACHE_REQ_READ_2SQC_DCACHE_REQ_READ_4wave_size_1obj_1SQ_INST_CYCLES_SALUSQ_THREAD_CYCLES_VALUSQ_IFETCHSQ_LDS_BANK_CONFLICTSQ_LDS_ADDR_CONFLICTSQ_LDS_UNALIGNED_STALLSQ_WAVES_EQ_64SQ_WAVES_LT_64TA_ADDR_STALLED_BY_TC_CYCLES_sumTA_TOTAL_WAVEFRONTS_sumwave_size_2obj_2SQ_ACTIVE_INST_VALUSQ_ACTIVE_INST_SCASQ_ACTIVE_INST_EXP_GDSSQ_ACTIVE_INST_MISCSQ_ACTIVE_INST_FLATSQ_INST_CYCLES_VMEM_WRSQ_INST_CYCLES_VMEM_RDSQ_INST_CYCLES_SMEMTA_BUFFER_COALESCED_READ_CYCLES_sumTA_BUFFER_COALESCED_WRITE_CYCLES_sumwave_size_3obj_3SQ_CYCLESSQ_BUSY_CYCLESSQ_BUSY_CU_CYCLESSQ_WAVESSQ_WAVE_CYCLESSQ_INSTS_VMEM_WRSQ_INSTS_VMEM_RDSQ_INSTS_VMEMGRBM_COUNTGRBM_GUI_ACTIVETA_TA_BUSY_sumTA_BUFFER_WAVEFRONTS_sumwave_size_4obj_4SQC_DCACHE_REQ_READ_16SQC_ICACHE_REQSQC_ICACHE_HITSSQC_ICACHE_MISSESSQC_ICACHE_MISSES_DUPLICATESQC_DCACHE_INPUT_VALID_READYBSQC_DCACHE_ATOMICSQC_DCACHE_REQ_READ_8TA_FLAT_WRITE_WAVEFRONTS_sumTA_FLAT_ATOMIC_WAVEFRONTS_sumwave_size_5obj_5SQ_WAVES_SAVEDSQ_INSTS_SMEM_NORMSQC_TC_INST_REQSQC_TC_DATA_READ_REQSQC_TC_DATA_WRITE_REQSQC_TC_DATA_ATOMIC_REQSQC_TC_STALLSQC_TC_REQTA_FLAT_WAVEFRONTS_sumTA_FLAT_READ_WAVEFRONTS_sumwave_size_6obj_6SQ_WAVES_LT_48SQ_WAVES_LT_32SQ_WAVES_LT_16SQ_ITEMSSQ_LDS_MEM_VIOLATIONSSQ_LDS_ATOMIC_RETURNSQ_LDS_IDX_ACTIVESQ_WAVES_RESTOREDTA_ADDR_STALLED_BY_TD_CYCLES_sumTA_DATA_STALLED_BY_TC_CYCLES_sumwave_size_7obj_7SQ_INSTS_SENDMSGSQ_INSTSSQ_WAIT_ANYSQ_WAIT_INST_ANYSQ_ACTIVE_INST_ANYSQ_INSTS_VALUSQ_ACTIVE_INST_VMEMSQ_ACTIVE_INST_LDSTA_BUFFER_ATOMIC_WAVEFRONTS_sumTA_BUFFER_TOTAL_CYCLES_sumwave_size_8obj_8SQ_INSTS_SALUSQ_INSTS_VSKIPPEDSQ_INSTS_SMEMSQ_INSTS_FLATSQ_INSTS_LDSSQ_INSTS_GDSSQ_INSTS_EXP_GDSSQ_INSTS_BRANCHTA_BUFFER_READ_WAVEFRONTS_sumTA_BUFFER_WRITE_WAVEFRONTS_sumStart_TimestampEnd_Timestamp
20vecCopy(double*, double*, double*, int, int) [clone .kd]21048576256008816640x7f025f5b4ec0655366404848144032768327680640x7fcbcd2c8ec04915211534336655360001638401029496.032768.0640x7fa811618ec0180224114688032768327681638416384655360.00.0640x7fb8abfd0ec03955522443653555970163842648764016384163843276849443494432135930.00.0640x7faaa3b78ec0065536643914815141277200016384.00.0640x7fb8cf1e8ec001310721444800019232768.016384.0640x7f296b9d8ec0000104857600000.0655375.0640x7f327e610ec016384393216225305481805743360448163840000.00.0640x7f0ae8fbcec04915206553632768000163840.00.014100215945388361410021594563316
31vecCopy(double*, double*, double*, int, int) [clone .kd]21048576256008816640x7f025f5b4ec0655366404848144032768327680640x7fcbcd2c8ec04915211534336655360001638401033886.032768.0640x7fa811618ec0180224114688032768327681638416384655360.00.0640x7fb8abfd0ec03467282347293422670163842468928716384163843276843340433402125177.00.0640x7faaa3b78ec006553665536001472680016384.00.0640x7fb8cf1e8ec001310720480004832768.016384.0640x7f296b9d8ec0000104857600000.0595032.0640x7f327e610ec016384393216230425761153610360448163840000.00.0640x7f0ae8fbcec04915206553632768000163840.00.014100215946458761410021594664916
42vecCopy(double*, double*, double*, int, int) [clone .kd]21048576256008816640x7f025f5b4ec0655366404848144032768327680640x7fcbcd2c8ec04915211534336655360001638401040846.032768.0640x7fa811618ec0180224114688032768327681638416384655360.00.0640x7fb8abfd0ec03421042297863369384163842492292716384163843276842762427622145398.00.0640x7faaa3b78ec006553665536001904300016384.00.0640x7fb8cf1e8ec001310720480004832768.016384.0640x7f296b9d8ec0000104857600000.0582901.0640x7f327e610ec016384393216220934811254709360448163840000.00.0640x7f0ae8fbcec04915206553632768000163840.00.014100215946847561410021594703956
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