Files
rocm-systems/tests/workloads/ipblocks_SQ/MI200/pmc_perf.csv
T
JoseSantosAMD da506ad9b5 Pytest add mi200 to analyze workloads (#334)
* Updated links in documentation. (#328)

Updated to reflect new GitHub organization.
Fixed broken links to GitHub pages.

Signed-off-by: David Galiffi <David.Galiffi@amd.com>

* update branch for 2.x documentation builds

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* update checkout action and use concurrency instead of cancel-workflow-action

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* test addition of user option for container launch

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* remove --user option for container, try chown instead

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* fixing yaml syntax

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* reorder job step - start with checkout

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* restore missing run directive

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* Update workloads to include log.txt
Add missing MI200 workloads

Signed-off-by: Jose Santos <josantos@amd.com>

* Signed-off-by: Jose Santos <josantos@amd.com>
Add vcopy workload for tests

* Change exit codes for caught failures

Signed-off-by: Jose Santos <josantos@amd.com>

* reformat

Signed-off-by: Jose Santos <josantos@amd.com>

* Add pytest-xdist for pytest -n

Signed-off-by: Jose Santos <josantos@amd.com>

---------

Signed-off-by: David Galiffi <David.Galiffi@amd.com>
Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>
Signed-off-by: Jose Santos <josantos@amd.com>
Co-authored-by: David Galiffi <David.Galiffi@amd.com>
Co-authored-by: Karl W. Schulz <karl.schulz@amd.com>
2024-04-01 14:30:21 -05:00

4.5 KiB

1Dispatch_IDKernel_NameGPU_IDGrid_SizeWorkgroup_SizeLDS_Per_WorkgroupScratch_Per_WorkitemArch_VGPRAccum_VGPRSGPRwave_sizeobjSQ_ACTIVE_INST_ANYSQ_CYCLESSQ_BUSY_CYCLESSQ_BUSY_CU_CYCLESSQ_ACTIVE_INST_VMEMSQ_ACTIVE_INST_LDSSQ_ACTIVE_INST_VALUSQ_ACTIVE_INST_SCAwave_size_1obj_1SQC_DCACHE_REQ_READ_1SQC_DCACHE_REQ_READ_2SQC_DCACHE_REQ_READ_4wave_size_2obj_2SQ_INSTS_SMEM_NORMSQ_INSTS_MFMASQ_INSTS_VALU_MFMA_I8SQ_INSTS_VALU_MFMA_F16SQ_INSTS_VALU_MFMA_BF16SQ_INSTS_VALU_MFMA_F32SQ_INSTS_VALU_MFMA_F64SQ_VALU_MFMA_BUSY_CYCLESwave_size_3obj_3SQ_ACTIVE_INST_EXP_GDSSQ_ACTIVE_INST_MISCSQ_ACTIVE_INST_FLATSQ_INST_CYCLES_VMEM_WRSQ_INST_CYCLES_VMEM_RDSQ_INST_CYCLES_SMEMSQ_INST_CYCLES_SALUSQ_THREAD_CYCLES_VALUwave_size_4obj_4SQ_INSTS_VALU_ADD_F64SQ_INSTS_VALU_MUL_F64SQ_INSTS_VALU_FMA_F64SQ_INSTS_VALU_TRANS_F64SQ_INSTS_VALU_INT32SQ_INSTS_VALU_INT64SQ_INSTS_SMEMSQ_INSTS_FLATwave_size_5obj_5SQ_INSTS_VALU_ADD_F16SQ_INSTS_VALU_MUL_F16SQ_INSTS_VALU_FMA_F16SQ_INSTS_VALU_TRANS_F16SQ_INSTS_VALU_ADD_F32SQ_INSTS_VALU_MUL_F32SQ_INSTS_VALU_FMA_F32SQ_INSTS_VALU_TRANS_F32wave_size_6obj_6SQ_INSTS_LDSSQ_INSTS_GDSSQ_INSTS_EXP_GDSSQ_INSTS_BRANCHSQ_INSTS_SENDMSGSQ_WAVE_CYCLESSQ_WAIT_ANYSQ_WAIT_INST_ANYwave_size_7obj_7SQ_INSTS_VALU_CVTSQ_INSTS_VMEM_WRSQ_INSTS_VMEM_RDSQ_INSTS_VMEMSQ_INSTS_SALUSQ_INSTS_VSKIPPEDSQ_INSTSSQ_INSTS_VALUGRBM_COUNTGRBM_GUI_ACTIVEwave_size_8obj_8SQC_TC_DATA_WRITE_REQSQC_TC_DATA_ATOMIC_REQSQC_TC_STALLSQC_TC_REQSQC_DCACHE_REQ_READ_16SQC_ICACHE_REQSQC_ICACHE_HITSSQC_ICACHE_MISSESwave_size_9obj_9SQ_IFETCHSQ_LDS_BANK_CONFLICTSQ_LDS_ADDR_CONFLICTSQ_LDS_UNALIGNED_STALLSQ_WAVESSQ_WAVES_EQ_64SQ_WAVES_LT_64SQ_WAVES_LT_48wave_size_10obj_10SQ_INSTS_FLAT_LDS_ONLYSQ_INSTS_VALU_MFMA_MOPS_I8SQ_INSTS_VALU_MFMA_MOPS_F16SQ_INSTS_VALU_MFMA_MOPS_BF16SQ_INSTS_VALU_MFMA_MOPS_F32SQ_INSTS_VALU_MFMA_MOPS_F64SQC_TC_INST_REQSQC_TC_DATA_READ_REQwave_size_11obj_11SQC_ICACHE_MISSES_DUPLICATESQC_DCACHE_INPUT_VALID_READYBSQC_DCACHE_ATOMICSQC_DCACHE_REQ_READ_8SQC_DCACHE_REQSQC_DCACHE_HITSSQC_DCACHE_MISSESSQC_DCACHE_MISSES_DUPLICATEwave_size_12obj_12SQ_WAVES_LT_32SQ_WAVES_LT_16SQ_ITEMSSQ_LDS_MEM_VIOLATIONSSQ_LDS_ATOMIC_RETURNSQ_LDS_IDX_ACTIVESQ_WAVES_RESTOREDSQ_WAVES_SAVEDStart_TimestampEnd_Timestamp
20vecCopy(double*, double*, double*, int, int) [clone .kd]21048576256008016640x7fd72551cec0344064219576128624162619800163840114688640x7f6bfc378ec032768327680640x7f3ab34fcec01310720000000640x7f220e298ec0032768327681638416384655364915210485760640x7f8184484ec0000011468806553632768640x7ff602f68ec000000000640x7f68ddb04ec00001638416384107154059621596749745640x7f059b82cec001638416384327684915203932161638402835028350640x7f2ebb610ec00002240655366427356640x7f4194f10ec065536000163841638400640x7f18dcb60ec000000016856640x7f7fe7498ec01304121211006553663800561680640x7fdb6d3f8ec00010485760000014128326259086221412832625929262
31vecCopy(double*, double*, double*, int, int) [clone .kd]21048576256008016640x7fd72551cec0344064326784216282271201500163840114688640x7f6bfc378ec032768327680640x7f3ab34fcec01310720000000640x7f220e298ec0032768327681638416384655364915210485760640x7f8184484ec0000011468806553632768640x7ff602f68ec000000000640x7f68ddb04ec0000163841638419850019184642491041706640x7f059b82cec001638416384327684915203932161638404127141271640x7f2ebb610ec000056065536655360640x7f4194f10ec065536000163841638400640x7f18dcb60ec0000000056640x7f7fe7498ec00186578006553663800561680640x7fdb6d3f8ec00010485760000014128326259486221412832625964462
42vecCopy(double*, double*, double*, int, int) [clone .kd]21048576256008016640x7fd72551cec0344064326072213971269505100163840114688640x7f6bfc378ec032768327680640x7f3ab34fcec01310720000000640x7f220e298ec0032768327681638416384655364915210485760640x7f8184484ec0000011468806553632768640x7ff602f68ec000000000640x7f68ddb04ec000016384163841893145417773175814215640x7f059b82cec001638416384327684915203932161638404133241332640x7f2ebb610ec000056065536655360640x7f4194f10ec065536000163841638400640x7f18dcb60ec0000000056640x7f7fe7498ec00187127006553663800561680640x7fdb6d3f8ec00010485760000014128326260193421412832626036142