Files
rocm-systems/tests/workloads/ipblocks_SQ_SPI/MI200/pmc_perf.csv
T
JoseSantosAMD da506ad9b5 Pytest add mi200 to analyze workloads (#334)
* Updated links in documentation. (#328)

Updated to reflect new GitHub organization.
Fixed broken links to GitHub pages.

Signed-off-by: David Galiffi <David.Galiffi@amd.com>

* update branch for 2.x documentation builds

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* update checkout action and use concurrency instead of cancel-workflow-action

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* test addition of user option for container launch

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* remove --user option for container, try chown instead

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* fixing yaml syntax

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* reorder job step - start with checkout

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* restore missing run directive

Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>

* Update workloads to include log.txt
Add missing MI200 workloads

Signed-off-by: Jose Santos <josantos@amd.com>

* Signed-off-by: Jose Santos <josantos@amd.com>
Add vcopy workload for tests

* Change exit codes for caught failures

Signed-off-by: Jose Santos <josantos@amd.com>

* reformat

Signed-off-by: Jose Santos <josantos@amd.com>

* Add pytest-xdist for pytest -n

Signed-off-by: Jose Santos <josantos@amd.com>

---------

Signed-off-by: David Galiffi <David.Galiffi@amd.com>
Signed-off-by: Karl W. Schulz <karl.schulz@amd.com>
Signed-off-by: Jose Santos <josantos@amd.com>
Co-authored-by: David Galiffi <David.Galiffi@amd.com>
Co-authored-by: Karl W. Schulz <karl.schulz@amd.com>
2024-04-01 14:30:21 -05:00

5.1 KiB

1Dispatch_IDKernel_NameGPU_IDGrid_SizeWorkgroup_SizeLDS_Per_WorkgroupScratch_Per_WorkitemArch_VGPRAccum_VGPRSGPRwave_sizeobjSQ_INSTS_VALU_ADD_F16SQ_INSTS_VALU_MUL_F16SQ_INSTS_VALU_FMA_F16SQ_INSTS_VALU_TRANS_F16SQ_INSTS_VALU_ADD_F32SQ_INSTS_VALU_MUL_F32SQ_INSTS_VALU_FMA_F32SQ_INSTS_VALU_TRANS_F32GRBM_SPI_BUSYSPI_CSN_NUM_THREADGROUPSSPI_CSN_WAVEwave_size_1obj_1SQ_INSTS_SMEM_NORMSQ_INSTS_MFMASQ_INSTS_VALU_MFMA_I8SQ_INSTS_VALU_MFMA_F16SQ_INSTS_VALU_MFMA_BF16SQ_INSTS_VALU_MFMA_F32SQ_INSTS_VALU_MFMA_F64SQ_VALU_MFMA_BUSY_CYCLESSPI_VWC_CSC_WRSPI_RA_BULKY_CU_FULL_CSNwave_size_2obj_2SQC_ICACHE_MISSES_DUPLICATESQC_DCACHE_INPUT_VALID_READYBSQC_DCACHE_ATOMICSQC_DCACHE_REQ_READ_8SQC_DCACHE_REQSQC_DCACHE_HITSSQC_DCACHE_MISSESSQC_DCACHE_MISSES_DUPLICATEwave_size_3obj_3SQ_INSTS_VALU_CVTSQ_INSTS_VMEM_WRSQ_INSTS_VMEM_RDSQ_INSTS_VMEMSQ_INSTS_SALUSQ_INSTS_VSKIPPEDSQ_INSTSSQ_INSTS_VALUGRBM_COUNTGRBM_GUI_ACTIVESPI_CSN_WINDOW_VALIDSPI_CSN_BUSYwave_size_4obj_4SQ_IFETCHSQ_LDS_BANK_CONFLICTSQ_LDS_ADDR_CONFLICTSQ_LDS_UNALIGNED_STALLSQ_WAVESSQ_WAVES_EQ_64SQ_WAVES_LT_64SQ_WAVES_LT_48SPI_RA_BAR_CU_FULL_CSNSPI_RA_TGLIM_CU_FULL_CSNwave_size_5obj_5SQC_DCACHE_REQ_READ_1SQC_DCACHE_REQ_READ_2SQC_DCACHE_REQ_READ_4wave_size_6obj_6SQ_WAVES_LT_32SQ_WAVES_LT_16SQ_ITEMSSQ_LDS_MEM_VIOLATIONSSQ_LDS_ATOMIC_RETURNSQ_LDS_IDX_ACTIVESQ_WAVES_RESTOREDSQ_WAVES_SAVEDSPI_RA_WVLIM_STALL_CSNSPI_SWC_CSC_WRwave_size_7obj_7SQC_TC_DATA_WRITE_REQSQC_TC_DATA_ATOMIC_REQSQC_TC_STALLSQC_TC_REQSQC_DCACHE_REQ_READ_16SQC_ICACHE_REQSQC_ICACHE_HITSSQC_ICACHE_MISSESwave_size_8obj_8SQ_ACTIVE_INST_EXP_GDSSQ_ACTIVE_INST_MISCSQ_ACTIVE_INST_FLATSQ_INST_CYCLES_VMEM_WRSQ_INST_CYCLES_VMEM_RDSQ_INST_CYCLES_SMEMSQ_INST_CYCLES_SALUSQ_THREAD_CYCLES_VALUSPI_RA_SGPR_SIMD_FULL_CSNSPI_RA_LDS_CU_FULL_CSNwave_size_9obj_9SQ_INSTS_FLAT_LDS_ONLYSQ_INSTS_VALU_MFMA_MOPS_I8SQ_INSTS_VALU_MFMA_MOPS_F16SQ_INSTS_VALU_MFMA_MOPS_BF16SQ_INSTS_VALU_MFMA_MOPS_F32SQ_INSTS_VALU_MFMA_MOPS_F64SQC_TC_INST_REQSQC_TC_DATA_READ_REQwave_size_10obj_10SQ_ACTIVE_INST_ANYSQ_CYCLESSQ_BUSY_CYCLESSQ_BUSY_CU_CYCLESSQ_ACTIVE_INST_VMEMSQ_ACTIVE_INST_LDSSQ_ACTIVE_INST_VALUSQ_ACTIVE_INST_SCASPI_RA_WAVE_SIMD_FULL_CSNSPI_RA_VGPR_SIMD_FULL_CSNwave_size_11obj_11SQ_INSTS_LDSSQ_INSTS_GDSSQ_INSTS_EXP_GDSSQ_INSTS_BRANCHSQ_INSTS_SENDMSGSQ_WAVE_CYCLESSQ_WAIT_ANYSQ_WAIT_INST_ANYSPI_RA_RES_STALL_CSNSPI_RA_TMP_STALL_CSNwave_size_12obj_12SQ_INSTS_VALU_ADD_F64SQ_INSTS_VALU_MUL_F64SQ_INSTS_VALU_FMA_F64SQ_INSTS_VALU_TRANS_F64SQ_INSTS_VALU_INT32SQ_INSTS_VALU_INT64SQ_INSTS_SMEMSQ_INSTS_FLATSPI_RA_REQ_NO_ALLOCSPI_RA_REQ_NO_ALLOC_CSNStart_TimestampEnd_Timestamp
20vecCopy(double*, double*, double*, int, int) [clone .kd]21048576256008016640x7f60b2444ec00000000017624409616384640x7fd9612e8ec01310720000000163840640x7f21ea858ec01199119879006553663800561680640x7f9ac19c8ec001638416384327684915203932161638402751227512218393134670640x7ff9f9104ec06553600016384163840000640x7f6a15b9cec032768327680640x7f11cbd5cec000104857600000032768640x7f03bc60cec00002240655366428056640x7fce08ef4ec003276832768163841638465536491521048576000640x7f6157014ec000000016856640x7f0330014ec03440642199361274061615032001638401146884885250640x7f162504cec00001638416384108471349773211729859103360640x7f2513d74ec0000011468806553632768136521875214116547804030761411654780422756
31vecCopy(double*, double*, double*, int, int) [clone .kd]21048576256008016640x7f60b2444ec00000000029838409616384640x7fd9612e8ec01310720000000163840640x7f21ea858ec00186099006553663800561680640x7f9ac19c8ec001638416384327684915203932161638404143141431331448231545640x7ff9f9104ec06553600016384163840000640x7f6a15b9cec032768327680640x7f11cbd5cec000104857600000032768640x7f03bc60cec000056065536655360640x7fce08ef4ec003276832768163841638465536491521048576000640x7f6157014ec0000000056640x7f0330014ec03440643314162222482781574001638401146889868280640x7f162504cec000016384163841932637318172977809332205750640x7f2513d74ec0000011468806553632768339452785514116547805941161411654780610756
42vecCopy(double*, double*, double*, int, int) [clone .kd]21048576256008016640x7f60b2444ec00000000029277409616384640x7fd9612e8ec01310720000000163840640x7f21ea858ec00189505006553663800561680640x7f9ac19c8ec001638416384327684915203932161638404065740657325256228731640x7ff9f9104ec06553600016384163840000640x7f6a15b9cec032768327680640x7f11cbd5cec000104857600000032768640x7f03bc60cec000056065536655360640x7fce08ef4ec003276832768163841638465536491521048576000640x7f6157014ec0000000056640x7f0330014ec034406434040023027428994010016384011468810787630640x7f162504cec000016384163841982135518639520837771218440640x7f2513d74ec0000011468806553632768345042797814116547806323561411654780648036