da506ad9b5
* Updated links in documentation. (#328) Updated to reflect new GitHub organization. Fixed broken links to GitHub pages. Signed-off-by: David Galiffi <David.Galiffi@amd.com> * update branch for 2.x documentation builds Signed-off-by: Karl W. Schulz <karl.schulz@amd.com> * update checkout action and use concurrency instead of cancel-workflow-action Signed-off-by: Karl W. Schulz <karl.schulz@amd.com> * test addition of user option for container launch Signed-off-by: Karl W. Schulz <karl.schulz@amd.com> * remove --user option for container, try chown instead Signed-off-by: Karl W. Schulz <karl.schulz@amd.com> * fixing yaml syntax Signed-off-by: Karl W. Schulz <karl.schulz@amd.com> * reorder job step - start with checkout Signed-off-by: Karl W. Schulz <karl.schulz@amd.com> * restore missing run directive Signed-off-by: Karl W. Schulz <karl.schulz@amd.com> * Update workloads to include log.txt Add missing MI200 workloads Signed-off-by: Jose Santos <josantos@amd.com> * Signed-off-by: Jose Santos <josantos@amd.com> Add vcopy workload for tests * Change exit codes for caught failures Signed-off-by: Jose Santos <josantos@amd.com> * reformat Signed-off-by: Jose Santos <josantos@amd.com> * Add pytest-xdist for pytest -n Signed-off-by: Jose Santos <josantos@amd.com> --------- Signed-off-by: David Galiffi <David.Galiffi@amd.com> Signed-off-by: Karl W. Schulz <karl.schulz@amd.com> Signed-off-by: Jose Santos <josantos@amd.com> Co-authored-by: David Galiffi <David.Galiffi@amd.com> Co-authored-by: Karl W. Schulz <karl.schulz@amd.com>
5.2 KiB
5.2 KiB
| 1 | Dispatch_ID | Kernel_Name | GPU_ID | Grid_Size | Workgroup_Size | LDS_Per_Workgroup | Scratch_Per_Workitem | Arch_VGPR | Accum_VGPR | SGPR | wave_size | obj | SQC_DCACHE_REQ_READ_1 | SQC_DCACHE_REQ_READ_2 | SQC_DCACHE_REQ_READ_4 | wave_size_1 | obj_1 | SQ_INSTS_SMEM_NORM | SQ_INSTS_MFMA | SQ_INSTS_VALU_MFMA_I8 | SQ_INSTS_VALU_MFMA_F16 | SQ_INSTS_VALU_MFMA_BF16 | SQ_INSTS_VALU_MFMA_F32 | SQ_INSTS_VALU_MFMA_F64 | SQ_VALU_MFMA_BUSY_CYCLES | wave_size_2 | obj_2 | SQC_TC_DATA_WRITE_REQ | SQC_TC_DATA_ATOMIC_REQ | SQC_TC_STALL | SQC_TC_REQ | SQC_DCACHE_REQ_READ_16 | SQC_ICACHE_REQ | SQC_ICACHE_HITS | SQC_ICACHE_MISSES | wave_size_3 | obj_3 | SQ_INSTS_VALU_ADD_F64 | SQ_INSTS_VALU_MUL_F64 | SQ_INSTS_VALU_FMA_F64 | SQ_INSTS_VALU_TRANS_F64 | SQ_INSTS_VALU_INT32 | SQ_INSTS_VALU_INT64 | SQ_INSTS_SMEM | SQ_INSTS_FLAT | TA_BUFFER_ATOMIC_WAVEFRONTS_sum | TA_BUFFER_TOTAL_CYCLES_sum | wave_size_4 | obj_4 | SQ_INSTS_FLAT_LDS_ONLY | SQ_INSTS_VALU_MFMA_MOPS_I8 | SQ_INSTS_VALU_MFMA_MOPS_F16 | SQ_INSTS_VALU_MFMA_MOPS_BF16 | SQ_INSTS_VALU_MFMA_MOPS_F32 | SQ_INSTS_VALU_MFMA_MOPS_F64 | SQC_TC_INST_REQ | SQC_TC_DATA_READ_REQ | wave_size_5 | obj_5 | SQ_ACTIVE_INST_EXP_GDS | SQ_ACTIVE_INST_MISC | SQ_ACTIVE_INST_FLAT | SQ_INST_CYCLES_VMEM_WR | SQ_INST_CYCLES_VMEM_RD | SQ_INST_CYCLES_SMEM | SQ_INST_CYCLES_SALU | SQ_THREAD_CYCLES_VALU | TA_ADDR_STALLED_BY_TD_CYCLES_sum | TA_DATA_STALLED_BY_TC_CYCLES_sum | wave_size_6 | obj_6 | SQC_ICACHE_MISSES_DUPLICATE | SQC_DCACHE_INPUT_VALID_READYB | SQC_DCACHE_ATOMIC | SQC_DCACHE_REQ_READ_8 | SQC_DCACHE_REQ | SQC_DCACHE_HITS | SQC_DCACHE_MISSES | SQC_DCACHE_MISSES_DUPLICATE | wave_size_7 | obj_7 | SQ_INSTS_LDS | SQ_INSTS_GDS | SQ_INSTS_EXP_GDS | SQ_INSTS_BRANCH | SQ_INSTS_SENDMSG | SQ_WAVE_CYCLES | SQ_WAIT_ANY | SQ_WAIT_INST_ANY | TA_BUFFER_COALESCED_READ_CYCLES_sum | TA_BUFFER_COALESCED_WRITE_CYCLES_sum | wave_size_8 | obj_8 | SQ_ACTIVE_INST_ANY | SQ_CYCLES | SQ_BUSY_CYCLES | SQ_BUSY_CU_CYCLES | SQ_ACTIVE_INST_VMEM | SQ_ACTIVE_INST_LDS | SQ_ACTIVE_INST_VALU | SQ_ACTIVE_INST_SCA | TA_ADDR_STALLED_BY_TC_CYCLES_sum | TA_TOTAL_WAVEFRONTS_sum | wave_size_9 | obj_9 | SQ_INSTS_VALU_CVT | SQ_INSTS_VMEM_WR | SQ_INSTS_VMEM_RD | SQ_INSTS_VMEM | SQ_INSTS_SALU | SQ_INSTS_VSKIPPED | SQ_INSTS | SQ_INSTS_VALU | GRBM_COUNT | GRBM_GUI_ACTIVE | TA_TA_BUSY_sum | TA_BUFFER_WAVEFRONTS_sum | wave_size_10 | obj_10 | SQ_INSTS_VALU_ADD_F16 | SQ_INSTS_VALU_MUL_F16 | SQ_INSTS_VALU_FMA_F16 | SQ_INSTS_VALU_TRANS_F16 | SQ_INSTS_VALU_ADD_F32 | SQ_INSTS_VALU_MUL_F32 | SQ_INSTS_VALU_FMA_F32 | SQ_INSTS_VALU_TRANS_F32 | TA_BUFFER_READ_WAVEFRONTS_sum | TA_BUFFER_WRITE_WAVEFRONTS_sum | wave_size_11 | obj_11 | SQ_WAVES_LT_32 | SQ_WAVES_LT_16 | SQ_ITEMS | SQ_LDS_MEM_VIOLATIONS | SQ_LDS_ATOMIC_RETURN | SQ_LDS_IDX_ACTIVE | SQ_WAVES_RESTORED | SQ_WAVES_SAVED | TA_FLAT_WRITE_WAVEFRONTS_sum | TA_FLAT_ATOMIC_WAVEFRONTS_sum | wave_size_12 | obj_12 | SQ_IFETCH | SQ_LDS_BANK_CONFLICT | SQ_LDS_ADDR_CONFLICT | SQ_LDS_UNALIGNED_STALL | SQ_WAVES | SQ_WAVES_EQ_64 | SQ_WAVES_LT_64 | SQ_WAVES_LT_48 | TA_FLAT_WAVEFRONTS_sum | TA_FLAT_READ_WAVEFRONTS_sum | Start_Timestamp | End_Timestamp |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2 | 0 | vecCopy(double*, double*, double*, int, int) [clone .kd] | 2 | 1048576 | 256 | 0 | 0 | 8 | 0 | 16 | 64 | 0x7f079c7d4ec0 | 32768 | 32768 | 0 | 64 | 0x7f41578a8ec0 | 131072 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 64 | 0x7f8334b14ec0 | 0 | 0 | 0 | 224 | 0 | 65536 | 64209 | 56 | 64 | 0x7f2c267d0ec0 | 0 | 0 | 0 | 0 | 114688 | 0 | 65536 | 32768 | 0.0 | 0.0 | 64 | 0x7f9292d64ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 168 | 56 | 64 | 0x7feb8406cec0 | 0 | 32768 | 32768 | 16384 | 16384 | 65536 | 49152 | 10485760 | 0.0 | 215202.0 | 64 | 0x7f3b82a2cec0 | 1270 | 117219 | 0 | 0 | 65536 | 63800 | 56 | 1680 | 64 | 0x7fef1b3d8ec0 | 0 | 0 | 0 | 16384 | 16384 | 10890018 | 9697521 | 848433 | 0.0 | 0.0 | 64 | 0x7fc4fdb04ec0 | 344064 | 218456 | 126748 | 1604762 | 0 | 0 | 163840 | 114688 | 261933.0 | 32768.0 | 64 | 0x7f7570968ec0 | 0 | 16384 | 16384 | 32768 | 49152 | 0 | 393216 | 163840 | 27681 | 27681 | 1043868.0 | 0.0 | 64 | 0x7f2ef1860ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.0 | 0.0 | 64 | 0x7ffbc4cc4ec0 | 0 | 0 | 1048576 | 0 | 0 | 0 | 0 | 0 | 16384.0 | 0.0 | 64 | 0x7f9e0286cec0 | 65536 | 0 | 0 | 0 | 16384 | 16384 | 0 | 0 | 32768.0 | 16384.0 | 1411121747578549 | 1411121747599029 |
| 3 | 1 | vecCopy(double*, double*, double*, int, int) [clone .kd] | 2 | 1048576 | 256 | 0 | 0 | 8 | 0 | 16 | 64 | 0x7f079c7d4ec0 | 32768 | 32768 | 0 | 64 | 0x7f41578a8ec0 | 131072 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 64 | 0x7f8334b14ec0 | 0 | 0 | 0 | 56 | 0 | 65536 | 65536 | 0 | 64 | 0x7f2c267d0ec0 | 0 | 0 | 0 | 0 | 114688 | 0 | 65536 | 32768 | 0.0 | 0.0 | 64 | 0x7f9292d64ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 56 | 64 | 0x7feb8406cec0 | 0 | 32768 | 32768 | 16384 | 16384 | 65536 | 49152 | 10485760 | 0.0 | 503117.0 | 64 | 0x7f3b82a2cec0 | 0 | 182882 | 0 | 0 | 65536 | 63800 | 56 | 1680 | 64 | 0x7fef1b3d8ec0 | 0 | 0 | 0 | 16384 | 16384 | 17559288 | 16965320 | 249904 | 0.0 | 0.0 | 64 | 0x7fc4fdb04ec0 | 344064 | 297608 | 206066 | 2552676 | 0 | 0 | 163840 | 114688 | 507252.0 | 32768.0 | 64 | 0x7f7570968ec0 | 0 | 16384 | 16384 | 32768 | 49152 | 0 | 393216 | 163840 | 37652 | 37652 | 1704465.0 | 0.0 | 64 | 0x7f2ef1860ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.0 | 0.0 | 64 | 0x7ffbc4cc4ec0 | 0 | 0 | 1048576 | 0 | 0 | 0 | 0 | 0 | 16384.0 | 0.0 | 64 | 0x7f9e0286cec0 | 65536 | 0 | 0 | 0 | 16384 | 16384 | 0 | 0 | 32768.0 | 16384.0 | 1411121747618549 | 1411121747634229 |
| 4 | 2 | vecCopy(double*, double*, double*, int, int) [clone .kd] | 2 | 1048576 | 256 | 0 | 0 | 8 | 0 | 16 | 64 | 0x7f079c7d4ec0 | 32768 | 32768 | 0 | 64 | 0x7f41578a8ec0 | 131072 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 64 | 0x7f8334b14ec0 | 0 | 0 | 0 | 56 | 0 | 65536 | 65536 | 0 | 64 | 0x7f2c267d0ec0 | 0 | 0 | 0 | 0 | 114688 | 0 | 65536 | 32768 | 0.0 | 0.0 | 64 | 0x7f9292d64ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 56 | 64 | 0x7feb8406cec0 | 0 | 32768 | 32768 | 16384 | 16384 | 65536 | 49152 | 10485760 | 0.0 | 533694.0 | 64 | 0x7f3b82a2cec0 | 0 | 181788 | 0 | 0 | 65536 | 63800 | 56 | 1680 | 64 | 0x7fef1b3d8ec0 | 0 | 0 | 0 | 16384 | 16384 | 19578362 | 18272797 | 961501 | 0.0 | 0.0 | 64 | 0x7fc4fdb04ec0 | 344064 | 326312 | 218177 | 2742252 | 0 | 0 | 163840 | 114688 | 541899.0 | 32768.0 | 64 | 0x7f7570968ec0 | 0 | 16384 | 16384 | 32768 | 49152 | 0 | 393216 | 163840 | 41745 | 41745 | 1628141.0 | 0.0 | 64 | 0x7f2ef1860ec0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.0 | 0.0 | 64 | 0x7ffbc4cc4ec0 | 0 | 0 | 1048576 | 0 | 0 | 0 | 0 | 0 | 16384.0 | 0.0 | 64 | 0x7f9e0286cec0 | 65536 | 0 | 0 | 0 | 16384 | 16384 | 0 | 0 | 32768.0 | 16384.0 | 1411121747692949 | 1411121747709429 |